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| == Generation 1: CXR713120-201GB / CXR713120-201GB-TL (SysCon) == | | == Syscon CXR713120-201GB == |
| <div style="float:right">[[File:SYSCON_GEN1.JPG|thumb|Syscon [[CXR713120-201GB]]]]</div> | | <div style="float:right">[[File:SYSCON_GEN1.JPG|thumb|Syscon [[CXR713120-201GB]]]]</div> |
| 8-753-279-04 / IC4002 <br />
| | *Used in PS3 models: |
| Early PS3 : up to including [[CECHKxx]]/[[DIA-00x#DIA-002|DIA-002]]
| | **[[CECHAxx]] and [[CECHBxx]] with [[COK-001]] motherboard |
| | 8-753-279-04 / IC4002 |
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| <br style="clear: both;" /> | | <br style="clear: both;" /> |
| === Pinout === | | === Pinout === |
| {{Syscon Pinout BGA 200 pads}} | | {{Syscon Pinout BGA 200 pads}} |
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| === Intercepting signals ===
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| This points are availables to intercept signals by soldering wires, attaching probes, osciloscopes, etc... The photos are only orientatives to follow the traces, there's no need to remove the SYSCON to intercept this signals so can be done while its working
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| All this points has been hardware reverse engineered from a [[CECHHxx|CECHH02]]/[[DIA-00x#DIA-001|DIA-001]] motherboard
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| {{clear}}
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|
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| ==== Topside Pinout ====
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| <div style="float:right">[[File:syscon_top.jpg|thumbnail|Syscon Top Pinouts<br />[[CECHHxx|CECHH02]]/[[DIA-00x#DIA-001|DIA-001]]]]</div>
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|
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| {|class="wikitable"
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| ! Pin #
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| ! Name
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| ! Description
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| |-
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| !B3
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| |SW_10
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| |Unknown
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| |-
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| !A6
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| |MC_RESERVED2
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| |Unknown
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| |-
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| !E10
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| |MUL_CHKSTP_OUT
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| |Unknown
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| |-
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| !C15
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| |VSS
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| |Power Ground
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| |-
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| !B16
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| |OSCOUT
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| |Goes to unpopulated crystal
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| |-
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| !C16
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| |OSCIN
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| |From unpupulated crystal
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| |-
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| !B15
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| |POW_FAIL
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| |Power Failure Signal
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| |-
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| !H1
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| |PN5
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| |Unknown
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| |-
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| !H2
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| |PN6
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| |Unknown
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| |-
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| !R1
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| |PM7
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| |Unknown
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| |-
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| !R2
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| |PM6
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| |Unknown
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| |-
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| !M4
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| |SW9
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| |Unknown
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| |-
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| !M10
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| |XDR_FET_SCK
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| |Unknown
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| |}
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|
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| ==== Bottomside Pinout ====
| |
| <div style="float:right">[[File:syscon_bottom.jpg|thumbnail|Syscon Bottom Pinouts<br />[[CECHHxx|CECHH02]]/[[DIA-00x#DIA-001|DIA-001]]]]<br />[[File:Syscon uart soldered on dia-002.jpg|thumbnail|Syscon UART soldered<br />[[CECHJxx]]/[[CECHKxx]] [[DIA-00x#DIA-002|DIA-002]]]]</div>
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|
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| {|class="wikitable"
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| ! Pin #
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| ! Name
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| ! Description
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| |-
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| !R5
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| |VDD
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| | +3.3v
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| |-
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| !R7
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| |DVDD
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| | +1.8v
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| |-
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| !C15
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| |VSS
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| |Power Ground
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| |-
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| !N16
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| |DIAG_MODE
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| |Unknown
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| |-
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| !N15
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| |BACKUP_MODE
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| |Unknown
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| |-
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| !P16
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| |UART0_TxD
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| |Serial
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| |-
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| !P15
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| |UART0_RxD
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| |Serial
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| |-
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| !R9
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| |PQ1
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| |Unknown
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| |-
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| !B12
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| |POW_SW
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| |Power Switch
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| |-
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| !A12
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| |EJECT_SW
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| |Eject Switch
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| |-
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| !L7
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| |JNTAST
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| |JTAG
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| |-
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| !L8
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| |JRTCK
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| |JTAG
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| |-
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| !L9
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| |JTMS
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| |JTAG
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| |-
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| !K7
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| |JTDI
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| |JTAG
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| |-
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| !K8
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| |JTCK
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| |JTAG
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| |-
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| !K9
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| |JTDO
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| |JTAG
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| |-
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| !M6
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| |SW_7_B
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| |Unknown
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| |-
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| !M8
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| |FANPWM1
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| |Unknown
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| |-
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| !E5
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| |GX_VSRT
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| |Unknown
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| |-
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| !B5
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| |DVE_RST
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| |Unknown
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| |-
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| !G4
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| |HDMI_RST1
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| |Unknown
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| |-
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| !D4
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| |XDR_FET_RST
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| |Unknown
| |
| |}
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|
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| {{clear}}
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| {{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> | | {{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> |
