RSX

RSX - Reality Synthesizer
1st generation 90nm
CXD2971DGB

RSX - Reality Synthesizer
GDDR3 BGA lifted

RSX - Reality Synthesizer
GPUcore BGA lifted

RSX - Reality Synthesizer
BGA lifted
PCB underneath

Nvidia G70 die shot

RSX die, scraped with razorblade by by Héctor Martín

BGA Cracking (one of the reasons for YLOD error)

Hardware

RSX - Reality Synthesizer

The RSX 'Reality Synthesizer' is a proprietary graphics processing unit (GPU) codeveloped by Nvidia and Sony for the PlayStation 3 game console. It is a GPU based on the Nvidia 7800GTX graphics processor and, according to Nvidia, is a G70/G71 (previously known as NV47) hybrid architecture with some modifications. The RSX has separate vertex and pixel shader pipelines. The GPU makes use of 256 MB GDDR3 RAM clocked at 650 MHz with an effective transmission rate of 1.4 GHz and up to 224 MB of the 3.2 GHz XDR main memory via the CPU (480 MB max).

Specifications

• 500 MHz on 90 nm process (shrunk to 65 nm in 2008 and to 40 nm in 2010)
• Based on NV47 Chip (Nvidia GeForce 7800 Architecture)
  • early development tools had NV47 with 256 bit local memory interface and 16 ROPs
  • later RSX with 128bit local memory interface and 8 ROPs
• Little Endian
  • 300+ million transistors
  • Multi-way programmable parallel floating-point shader pipelines
    • Independent pixel/vertex shader architecture
    • 24 parallel pixel-shader ALU pipes clocked @ 550 MHz
      • 5 ALU operations per pipeline, per cycle (2 vector₄ , 2 scalar/dual/co-issue and fog ALU, 1 Texture ALU)
      • 27 floating-point operations per pipeline, per cycle
    • 8 parallel vertex pipelines
      • 2 ALU operations per pipeline, per cycle (1 vector₄ and 1 scalar, dual issue)
      • 10 FLOPS per pipeline, per cycle
    • Floating Point Operations: 400.4 Gigaflops ((24 * 27 Flops + 8 * 10 Flops) * 550)
  • 24 texture filtering units (TF) and 8 vertex texture addressing units (TA)
    • 24 filtered samples per clock
      • Maximum Texel fillrate: 12.0 GigaTexels per second (24 textures * 500 MHz)
    • 32 unfiltered texture samples per clock, ( 8 TA x 4 texture samples )
  • 8 Render Output units / pixel rendering pipelines
    • Peak pixel fillrate (theoretical): 4.0 Gigapixel per second
    • Maximum Z-buffering sample rate: 8.0 GigaSamples per second (2 Z-samples * 8 ROPs * 500 MHz)
  • Maximum Dot product operations: 51 billion per second (combined with Cell CPU)
  • 128-bit pixel precision offers rendering of scenes with High dynamic range rendering
  • 256 MB GDDR3 RAM at 650 MHz
    • Earlier PS3 Models: Samsung K4J52324QC-SC14 rated at 700Mhz
    • Later PS3 Models: Qimonda HYB18H512322AF-14
    • 128-bit memory bus width
    • 22.4 GB/s read and write bandwidth
  • Cell FlexIO bus interface
    • Rambus XDR Memory interface bus width: 56bit out of 64bit (serial)
    • 20 GB/s read to the Cell and XDR memory
    • 15 GB/s write to the Cell and XDR memory
  • Support for PSGL (OpenGL ES 1.1 + Nvidia Cg)
  • Support for S3 Texture Compression

More features are revealed in the following chart delineating the differences between the RSX and the nVidia 7800 GTX.

Difference	RSX	nVidia 7800GTX
GDDR3 Memory bus	128bit	256bit
ROPs	8	16
Post Transform and Lighting Cache	63 max vertices	45 max vertices
Total Texture Cache Per Quad of Pixel Pipes (L1 and L2)	96kB	48kB
CPU interface	FlexIO	PCI-Express 16x
Technology	40nm/65nm/90nm	110nm

Other RSX features/differences include:

   More shader instructions
       Extra texture lookup logic (helps RSX transport data from XDR)
       Fast vector normalize 

Note that the cache (Post Transform and Lighting Vertext Cache) is located between the vector shader and the triangle setup.

A sample flow of data inside the RSX would see them first processed by 8 vertex shaders. The output are then sent to the 24 active pixel shaders, which can involve the 24 active texture units. Finally, the data is passed to the 8 Raster Operation Pipeline units (ROPs), and on out to the GDDR3. Note that the pixel shaders are grouped into groups of four (called Quads). There are 7 Quads, with 1 redundant, leaving 6 Quads active, which provides us with the 24 active pixel shaders listed above (6 times 4 equals 24). Since each Quad has 96kB of L1 and L2 cache, the total RSX texture cache is 576kB. General RSX features include 2x and 4x hardware anti-aliasing, and support for Shader Model 3.0.

Chipnumers @ SKU's

The following is a small sample of serial numbers of the RSX by model number.

PS3 Model	Mobo Model	Mobo serial	RSX Serial	Die Tech	Die Size	Remark
CECHAxx	COK-001	1-871-868-12	CXD2971GB	90nm	258mm²	edepot ps3secrets
CECHAxx	COK-001	1-871-868-12	CXD2971AGB	90nm	258mm²	reballing.es
CECHAxx	COK-001	1-871-868-22	CXD2971DGB	90nm	258mm²	reballing.es
CECHAxx	COK-001	1-871-868-32	CXD2971DGB	90nm	258mm²	reballing.es
CECHAxx	COK-001	1-871-868-32	CXD2971AGB	90nm	258mm²	reballing.es
CECHBxx	COK-001	1-871-868-22	CXD2971DGB	90nm	258mm²	edepot ps3secrets
CECHBxx	COK-001	1-871-868-32	CXD2971DGB	90nm	258mm²	edepot ps3secrets
CECHCxx	COK-002	1-873-513-11	CXD2971DGB	90nm	258mm²	edepot ps3secrets
CECHCxx	COK-002	1-873-513-21	CXD2971GB	90nm	258mm²	reballing.es
CECHCxx	COK-002	1-873-513-31	CXD2971DGB	90nm	258mm²	reballing.es
CECHDxx	SKU never released
CECHExx	COK-002W	1-873-513-xx	-?	90nm	258mm²	-
CECHFxx	SKU never released
CECHGxx	SEM-001	1-875-384-xx	CXD2971DGB	90nm	258mm²	reballing.es
CECHGxx	SEM-001	1-875-384-xx	CXD2971BGB   or: CXD2971DGB	90nm	258mm²	reballing.es
CECHGxx	SEM-001	1-875-384-xx	CXD2971AGB	90nm	258mm²	reballing.es
CECHGxx	SEM-001	1-875-384-xx	CXD2971DGB	90nm	258mm²	edepot ps3secrets
CECHHxx	DIA-001	1-875-938-11	CXD2971AGB	90nm	258mm²	reballing.es
CECHHxx	DIA-001	1-875-368-11	CXD2971-1GB	90nm	258mm²	reballing.es
CECHHxx	DIA-001	1-875-368-11	CXD2971AGB	90nm	258mm²	reballing.es
CECHHxx	DIA-001	1-875-368-11	CXD2971AGB	90nm	258mm²	edepot ps3secrets
CECHIxx	SKU never released
CECHJxx	DIA-002	1-876-912-xx	-?	65nm	? 186mm² ?	-
CECHKxx	DIA-002	1-876-912-42	CXD2982GB	65nm	? 186mm² ?	reballing.es
CECHKxx	DIA-002	1-876-912-xx	CXD2982GB	65nm	? 186mm² ?	edepot ps3secrets
CECHLxx	VER-001	1-878-196-31	CXD2991GB	65nm	? 186mm² ?	reballing.es
CECHLxx	VER-001	1-878-196-31	CXD2991GB	65nm	? 186mm² ?	edepot ps3secrets
CECHMxx	VER-001	1-878-196-31	-?	65nm	? 186mm² ?	-
CECHNxx	SKU never released
CECHOxx	SKU never released
CECHPxx	VER-001	1-878-196-31	-?	65nm	? 186mm² ?	-
CECHQxx	VER-001	1-878-196-31	-?	65nm	? 186mm² ?	-
CECH-20xx	DYN-001	1-880-055-31	CXD2991CGB	65nm	? 186mm² ?	reballing.es
CECH-20xx	DYN-001	1-880-055-31	CXD2991EGB	65nm	? 186mm² ?	reballing.es
CECH-20xx	DYN-001	1-880-055-31	CXD2991EGB	65nm	? 186mm² ?	edepot ps3secrets
CECH-21xx	SUR-001	1-881-945-11	CXD5300AGB	40nm	? 114mm² ?	reballing.es
CECH-21xx	SUR-001	1-881-945-11	CXD5300AGB	40nm	? 114mm² ?	edepot ps3secrets
CECH-25xx	JTP-001	1-882-481-11	CXD5300A1GB	40nm	? 114mm² ?	edepot ps3secrets
CECH-25xx	JSD-001	1-882-770-11	CXD5300A1GB	40nm	? 114mm² ?	edepot ps3secrets
CECH-30xx	KTE-001	1-884-749-11	CXD5301DGB	40nm	? 114mm² ?	-
CECH-40xx	MSX-001	1-886-928-11	CXD5302DGB	40nm	? 114mm² ?	-
CECH-40xx	MPX-001	1-887-233-11	CXD5302A1GB	40nm	? 114mm² ?	- pocketnews dissasembly

Other unspecified: CXD297BGB and CXD2971-1GB (CECHA refurbished? note:lowest FW was 2.30)

Alternative list

• CECHAxx/COK-001, CECHBxx/COK-001, CECHCxx/COK-002, CECHExx/COK-002W and CECHHxx/DIA-001 : CXD2971AGB (RSX 90nm)
• CECHGxx/SEM-001 : CXD2971DGB (RSX 90nm)
• CECHJxx/DIA-002 and CECHKxx/DIA-002 : CXD2982 (RSX 65nm)
• CECHLxx/VER-001 up to including CECHQxx/VER-001 : CXD2991BGB (RSX 65nm)
• CECH-20xx/DYN-001 : CXD2991GGB (RSX 65nm)
• CECH-21xx/SUR-001 : CXD5300AGB (RSX 40nm)
• CECH-25xx/JTP-001 and CECH-25xx/JSD-001: CXD5300A1GB (RSX 40nm)
• CECH-30xx/KTE-001 : CXD5301DGB (RSX 40nm)

Local GDDR3 Memory Physical Structure

• Total Memory 256MB
• 2 Partitions (128MB)
• 64bit bus per partition
• 8 Banks per partition (16MB)
• 4096 Pages per bank (4KB) -> 12bit Row Address
• Memory block in a page -> 9bit Column Address
• Minimum access granularity = 8 bytes -> same as buswidth between RSX <> GDDR

Software

RSX Memorymap

Although the RSX has 256MB of GDDR3 RAM, not all of it is useable. The last 4MB is reserved for keeping track of the RSX internal state and issued commands. The 4MB of GPU Data contains RAMIN, RAMHT, RAMFC, DMA Objects, Graphic Objects, and the Graphic Context. The following is a breakdown of the address within 256MB of the RSX.

Address Range	Size	Comment
0000000-FBFFFFF	252 MB	Framebuffer
FC00000-FFFFFFF	4 MB	GPU Data
FF80000-FFFFFFF	512KB	RAMIN: Instance Memory
FF90000-FF93FFF	16KB	RAMHT: Hash Table
FFA0000-FFA0FFF	4KB/s	RAMFC: FIFO Context
FFC0000-FFCFFFF	64KB	DMA Objects
FFD0000-FFDFFFF	64KB	Graphic Objects
FFE0000-FFFFFFF	128KB	GRAPH: Graphic Context

Besides local GDDR3 memory, main XDR memory can be accessed by RSX too, which is limited to either:

• 0MB - 256MB (0x00000000 - 0x0FFFFFFF)

-or-

• 0MB - 512MB (0x00000000 - 0x1FFFFFFF)

Speed, Bandwidth, and Latency

System bandwith (theoretical maximum):

• Cell to/from 256MB XDR : 25.6 GB/s
• Cell to RSX (IOIFO): 20GB/s (practical : 15.8GB/s @ packetsize 128B)
• Cell from RSX (IOIFI) : 15GB/s (practical : 11.9GB/s @ packetsize 128B)
• RSX to/from 256MB GDDR3 : 20.8GB/s (@ 650MHz)

Because of the aforementioned layout of the communication path between the different chips, and the latency and bandwidth differences between the various components, there are different access speeds depending on the direction of the access in relation to the source and destination. The following is a chart showing the speed of reads and writes to the GDDR3 and XDR memory from the viewpoint of the Cell and RSX. Note that these are measured speeds (rather than calculated speeds) and they should be worse if RSX and GDDR3 access are involved because these figures were measured when the RSX was clocked at 550Mhz and the GDDR3 memory was clocked at 700Mhz. The shipped PS3 has the RSX clocked in at 500Mhz (front and back end, although the pixel shaders run separately inside at 550Mhz). In addition, the GDDR3 memory was also clocked lower at 650Mhz.

speed table

Processor	256MB XDR	256MB GDDR3
Cell Read	16.8GB/s	16MB/s (15.6MB/s @ 650MHz)
Cell Write	24.9GB/s	4GB/s
RSX Read	15.5GB/s	22.4GB/s (20.8GB/s @ 650MHz)
RSX Write	10.6GB/s	22.4GB/s (20.8GB/s @ 650MHz)

Because of the VERY slow Cell Read speed from the 256MB GDDR3 memory, it is more efficient for the Cell to work in XDR and then have the RSX pull data from XDR and write to GDDR3 for output to the HDMI display. This is why extra texture lookup instructions were included in the RSX to allow loading data from XDR memory (as opposed to the local GDDR3 memory).

RSX Libraries

The RSX is dedicated to 3D graphics, and developers are able to use different API libraries to access its features. The easiest way is to use high level PSGL, which is basicially OpenGL|ES with programmable pipeline added in - but hardly anyone uses PSGL these days, preferring to use the native GPU command buffer generation library, libgcm. At a lower level developers can use LibGCM, which is an API that talks to the RSX at a lower level. PSGL is actually implemented on top of LibGCM. For the advanced programmer, you can program the RSX by sending commands to it directly using C or assembly. This can be done by setting up commands (via FIFO Context) and DMA Objects and issuing them to the RSX via DMA calls.

Drivers (WiP/reference)

• ps3rsx.git
• xf86-video-ps3.git
• nouveau wiki
• libps3rsx
• Mesa/Gallium Cell Driver
• git://nouveau.git.sourceforge.net/gitroot/nouveau/envytools (docs are in hwdocs, commands are in the xml's in rnndb)

Other References

• http://7track.org/~durandal/ps3dox/ http://lol.notsoldierx.com/~durandal/ps3dox/ // http://173.220.0.157/~durandal/ps3dox/
• http://wiki.ps2dev.org/ps3:rsx
• Cg Toolkit User's Manual: A Developer's Guide to Programmable Graphics, Release 1.4.1
• The Cg Tutorial (ISBN: 0321194969, Addison-Wesley, 2003)
• cg-shader-tutorial.pdf (535.94 KB) + Git: Emulator-Shader-Pack
• http://pastie.org/private/qbpm88aml03vq8jexxvnsa PS3 RSX Glevand

• Good overview of quotes of how SPU's are used together with RSX for retail games:
  • PS3 games list & SPE usages part 1
  • PS3 games list & SPE usages part 2