RSX LV1 Info: Difference between revisions
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<pre> | <pre> | ||
b03 1f4/28a vpe:ff shd:3f [G8B644200:1:2:13:8:a:3:f:1][39:2:0:0:1:3:1][0:0:0] | b03 1f4/28a vpe:ff shd:3f [G8B644200:1:2:13:8:a:3:f:1][39:2:0:0:1:3:1][0:0:0] | ||
boot0_rev nvcore_clock/memory_clock vpe:vpe shd:shd [lot:revision:foundary:wafer_0:wafer_1:wafer_2:ds_0:ds_1:ds_2] [vid:vidbin:process:mstrap:mclkterm: | boot0_rev nvcore_clock/memory_clock vpe:vpe shd:shd [lot:revision:foundary:wafer_0:wafer_1:wafer_2:ds_0:ds_1:ds_2] [vid:vidbin:process:mstrap:mclkterm:svop:svop_en][pt:svop2:mp] | ||
boot0_rev: b03 | boot0_rev: b03 | ||
| Line 26: | Line 26: | ||
mstrap: 0 | mstrap: 0 | ||
mclkterm: 1 | mclkterm: 1 | ||
svop: 3 | |||
svop_en: 1 | |||
pt: 0 | |||
svop2: 0 | |||
mp: 0 | |||
</pre> | </pre> | ||
Latest revision as of 16:11, 2 June 2024
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Example[edit | edit source]
b03 1f4/28a vpe:ff shd:3f [G8B644200:1:2:13:8:a:3:f:1][39:2:0:0:1:3:1][0:0:0] boot0_rev nvcore_clock/memory_clock vpe:vpe shd:shd [lot:revision:foundary:wafer_0:wafer_1:wafer_2:ds_0:ds_1:ds_2] [vid:vidbin:process:mstrap:mclkterm:svop:svop_en][pt:svop2:mp] boot0_rev: b03 nvcore_clock: 0x1F4 memory_clock: 0x28A vpe: 0xFF shd: 0x3F lot: G8B644200 revision: 1 foundary: 2 wafer_0: 0x13 wafer_1: 8 wafer_2: 0xA ds_0: 3 ds_1: 0xF ds_2: 1 vid: 0x39 vidbin: 2 process: 0 mstrap: 0 mclkterm: 1 svop: 3 svop_en: 1 pt: 0 svop2: 0 mp: 0
Table[edit | edit source]
Foundary[edit | edit source]
| Foundary Number | Meaning | Notes |
|---|---|---|
| 0 | Unknown | Fallback Value |
| 1 | Toshiba | Toshiba Oita |
| 2 | Sony | Sony Nagasaki |
| 3 | Fujitsu | N.A. |
| 4 | TSMC | N.A. |
