K4Y50164UC-JCB3: Difference between revisions
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(Created page with "== Samsung K4Y50164UC-JCB3 == <div style="float:right">200px|thumb|left|104-ball FBGA<br />Samsung K4Y50164UC-JCB3</div> (CECHAxx/[[COK-00x#C...") |
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Datasheet: [http://www.samsung.com/global/system/business/semiconductor/product/2007/6/11/XDR_RDRAM/XDRDRAM/Component/512Mbit/K4Y50164UC/ds_k4y50xx4uc_rev11.pdf Samsung K4Y50164UC-JCB3] | Datasheet: [http://www.samsung.com/global/system/business/semiconductor/product/2007/6/11/XDR_RDRAM/XDRDRAM/Component/512Mbit/K4Y50164UC/ds_k4y50xx4uc_rev11.pdf Samsung K4Y50164UC-JCB3] | ||
{{Samsung memory product code}} | |||
{{Wikify}} | |||
[[Category: | {{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> | ||
Latest revision as of 09:44, 14 April 2021
Samsung K4Y50164UC-JCB3[edit | edit source]
(CECHAxx/COK-001, CECHBxx/COK-001, CECHCxx/COK-002, CECHExx/COK-002W)
Datasheet: Samsung K4Y50164UC-JCB3
| Manufacturer | DRAM | DRAM type | Density | Organization | Banks | Interface | Revision | Package type | Power & Temp. | Speed |
|---|---|---|---|---|---|---|---|---|---|---|
| K: Samsung | 4: DRAM | J: GDDR3 SDRAM Y: XDR DRAM G: GDDR5 SDRAM |
10: 1G, 8K/32ms 50: 512M, 32K/16ms 52: 512M, 8K/32ms 12: ? |
16: x16bit 32: x32bit |
4: 8 Banks 5: 16 Banks |
U: DRSL, 1.8V, 1.2V Q: SSTL-2 1.8V, 1.8V K: ? T: ? F: POD_15(1.5V,1.5V) |
C: 4th Gen. E: 6th Gen. G: 8th Gen. I: 10th Gen. J: 11th Gen. |
J: BOC (Lead-free) S: ? K: ? H (GDDR5): FBGA-170 |
C: Normal Power (0ºC–95ºC) | B3 (XDR): 3.2Gbps, 35ns, 20Cycles 14 (GDDR3): 1.4ns (700MHz) 15 (GDDR5): 1.5ns (667MHz) |
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