CXD9208GP: Difference between revisions

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(Undo revision 68273 by Sandungas (talk) Mistake)
Tag: Undo
(→‎Pinout: Added "GPIO" pads)
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! data-sort-value="A99" style="line-height:2em; border-right:hidden" |   || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" |   || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" |   || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" |   || data-sort-value="ZZZ" style="border-left:hidden" |  
! data-sort-value="A99" style="line-height:2em; border-right:hidden" |   || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" |   || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" |   || data-sort-value="ZZZ" style="border-left:hidden; border-right:hidden" |   || data-sort-value="ZZZ" style="border-left:hidden" |  
|-
|-
| data-sort-value="B01" | B1 || ? || ? || ? || ?
| data-sort-value="B01" | B1 || {{cellcolors|#eee|#888}} GPIO33_6 || CL7307 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="B02" | B2 || ? || ? || ? || ?
| data-sort-value="B02" | B2 || {{cellcolors|#eee|#888}} GPIO33_5 || CL7302 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="B03" | B3 || {{cellcolors|#d90}} PLLAVD1 || +1.5V_BRIDGE || {{pin}} ||  
| data-sort-value="B03" | B3 || {{cellcolors|#d90}} PLLAVD1 || +1.5V_BRIDGE || {{pin}} ||  
Line 186: Line 186:
| data-sort-value="F11" | F11 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground
| data-sort-value="F11" | F11 || {{cellcolors|#333|#fff}} VSS2 || GND || {{pin}} || style="color:#888" | Ground
|-
|-
| data-sort-value="F12" | F12 || ? || ? || ? || ?
| data-sort-value="F12" | F12 || {{cellcolors|#eee|#888}} GPIO15_0 || CL7306 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="F13" | F13 || {{cellcolors|#8f8}} SIF_AD12 || SIF_BC_AD12 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
| data-sort-value="F13" | F13 || {{cellcolors|#8f8}} SIF_AD12 || SIF_BC_AD12 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
Line 216: Line 216:
| data-sort-value="G11" | G11 || {{cellcolors|#d90}} VDDC || +1.5V_BRIDGE || {{pin}} ||  
| data-sort-value="G11" | G11 || {{cellcolors|#d90}} VDDC || +1.5V_BRIDGE || {{pin}} ||  
|-
|-
| data-sort-value="G12" | G12 || ? || ? || ? || ?
| data-sort-value="G12" | G12 || {{cellcolors|#eee|#888}} GPIO15_1 || CL7311 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="G13" | G13 || {{cellcolors|#8f8}} SIF_AD16 || SIF_BC_AD16 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
| data-sort-value="G13" | G13 || {{cellcolors|#8f8}} SIF_AD16 || SIF_BC_AD16 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
Line 246: Line 246:
| data-sort-value="H11" | H11 || {{cellcolors|#943|#fff}} VDD || +1.5V_EEGS_VDDO || {{pin}} ||  
| data-sort-value="H11" | H11 || {{cellcolors|#943|#fff}} VDD || +1.5V_EEGS_VDDO || {{pin}} ||  
|-
|-
| data-sort-value="H12" | H12 || ? || ? || ? || ?
| data-sort-value="H12" | H12 || {{cellcolors|#eee|#888}} GPIO15_2 || CL7305 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="H13" | H13 || {{cellcolors|#8f8}} SIF_AD22 || SIF_BC_AD22 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
| data-sort-value="H13" | H13 || {{cellcolors|#8f8}} SIF_AD22 || SIF_BC_AD22 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
Line 276: Line 276:
| data-sort-value="J11" | J11 || {{cellcolors|#d90}} VDDC || +1.5V_BRIDGE || {{pin}} ||  
| data-sort-value="J11" | J11 || {{cellcolors|#d90}} VDDC || +1.5V_BRIDGE || {{pin}} ||  
|-
|-
| data-sort-value="J12" | J12 || ? || ? || ? || ?
| data-sort-value="J12" | J12 || {{cellcolors|#eee|#888}} GPIO33_0 || CL7310 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="J13" | J13 || {{cellcolors|#8f8}} SIF_AD19 || SIF_BC_AD19 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
| data-sort-value="J13" | J13 || {{cellcolors|#8f8}} SIF_AD19 || SIF_BC_AD19 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
Line 306: Line 306:
| data-sort-value="K11" | K11 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground
| data-sort-value="K11" | K11 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground
|-
|-
| data-sort-value="K12" | K12 || ? || ? || ? || ?
| data-sort-value="K12" | K12 || {{cellcolors|#eee|#888}} GPIO33_1 || CL7304 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="K13" | K13 || {{cellcolors|#8f8}} SIF_AD17 || SIF_BC_AD17 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
| data-sort-value="K13" | K13 || {{cellcolors|#8f8}} SIF_AD17 || SIF_BC_AD17 || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
Line 336: Line 336:
| data-sort-value="L11" | L11 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground
| data-sort-value="L11" | L11 || {{cellcolors|#333|#fff}} VSS || GND || {{pin}} || style="color:#888" | Ground
|-
|-
| data-sort-value="L12" | L12 || ? || ? || ? || ?
| data-sort-value="L12" | L12 || {{cellcolors|#eee|#888}} GPIO33_2 || CL7309 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="L13" | L13 || {{cellcolors|#8f8}} SIF_BGNT || BGNT_BC || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
| data-sort-value="L13" | L13 || {{cellcolors|#8f8}} SIF_BGNT || BGNT_BC || {{pini}} || Connected to EEGS pad <abbr title="Unknown">UNK</abbr> ?
Line 366: Line 366:
| data-sort-value="M11" | M11 || {{cellcolors|#66f|#ff0}} SW1.5 || SW1.5 || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad <abbr title="Unknown">UNK</abbr> ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) ?
| data-sort-value="M11" | M11 || {{cellcolors|#66f|#ff0}} SW1.5 || SW1.5 || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad <abbr title="Unknown">UNK</abbr> ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) ?
|-
|-
| data-sort-value="M12" | M12 || ? || ? || ? || ?
| data-sort-value="M12" | M12 || {{cellcolors|#eee|#888}} GPIO33_3 || CL7303 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="M13" | M13 || {{cellcolors|#aaf}} VBLK || EEGS_VBLK1 || {{pino}} || Connected to EEGS ? ('''V'''ertical '''BL'''an'''K''', control signal ?)
| data-sort-value="M13" | M13 || {{cellcolors|#aaf}} VBLK || EEGS_VBLK1 || {{pino}} || Connected to EEGS ? ('''V'''ertical '''BL'''an'''K''', control signal ?)
Line 396: Line 396:
| data-sort-value="N11" | N11 || {{cellcolors|#66f|#ff0}} SW1.81 || SW1.81 || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad <abbr title="Unknown">UNK</abbr> ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) ?
| data-sort-value="N11" | N11 || {{cellcolors|#66f|#ff0}} SW1.81 || SW1.81 || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad <abbr title="Unknown">UNK</abbr> ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) ?
|-
|-
| data-sort-value="N12" | N12 || ? || ? || ? || ?
| data-sort-value="N12" | N12 || {{cellcolors|#eee|#888}} GPIO33_4 || CL7308 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="N13" | N13 || PCLKEN || PCLKEN || {{pini}} ||  
| data-sort-value="N13" | N13 || PCLKEN || PCLKEN || {{pini}} ||  
Line 428: Line 428:
| data-sort-value="P12" | P12 || {{cellcolors|#66f|#ff0}} SW3.1 || SW3.1 || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad <abbr title="Unknown">UNK</abbr> ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) ?
| data-sort-value="P12" | P12 || {{cellcolors|#66f|#ff0}} SW3.1 || SW3.1 || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad <abbr title="Unknown">UNK</abbr> ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) ?
|-
|-
| data-sort-value="P13" | P13 || ? || ? || ? || ?
| data-sort-value="P13" | P13 || {{cellcolors|#eee|#888}} GPIO33_7 || CL7301 || {{pinnc}} || data-sort-value="Z" style="color:#888" | Testpad
|-
|-
| data-sort-value="P14" | P14 || {{cellcolors|#88f|#ff0}} PWRUP_EE || PWRUP_EE || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad <abbr title="Unknown">UNK</abbr> ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) ?. It seems this line is shared with EEGS, both are powered up together
| data-sort-value="P14" | P14 || {{cellcolors|#88f|#ff0}} PWRUP_EE || PWRUP_EE || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad <abbr title="Unknown">UNK</abbr> ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) ?. It seems this line is shared with EEGS, both are powered up together

Revision as of 18:23, 4 October 2022

Sony CXD9208GP (PS2 bridge chip)

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You can help PS3 Developer wiki by editing it.
bridge chip from EE+GS to the CXM4024R

6-710-433-01 / IC7301
Used on PS3 FAT CECHAxx/COK-001 and CECHBxx/COK-001
Unknown bridge chip from EE+GS to the CXM4024R (see MultiAV) and the RSX

Pinout

Pad Name Type Description
Internal External
A1 TEST_IN_0 GND
Others
 Ground
A2 PLLAVS1 GND
Others
 Ground
A3 SIF_MSCLK MSCLK
In
 Connected to EEGS pad UNK ?
A4 SIF_WRAC SIF_WRAC_BC
In
 Connected to EEGS pad UNK ?
A5 SIF_DACK SIF_DACK_BC
In
 Connected to EEGS pad UNK ?
A6 SIF_DREQ0 SIF_DREQ0_BC
In
 Connected to EEGS pad UNK ?
A7 SIF_RDAC SIF_RDAC_BC
In
 Connected to EEGS pad UNK ?
A8 SIF_AD4 SIF_BC_AD4
In
 Connected to EEGS pad UNK ?
A9 SIF_AD7 SIF_BC_AD7
In
 Connected to EEGS pad UNK ?
A10 SIF_AD9 SIF_BC_AD9
In
 Connected to EEGS pad UNK ?
A11 SIF_AD18 SIF_BC_AD18
In
 Connected to EEGS pad UNK ?
A12 SIF_AD21 SIF_BC_AD21
In
 Connected to EEGS pad UNK ?
A13 SIF_AD29 SIF_BC_AD29
In
 Connected to EEGS pad UNK ?
A14 SIF_AD6 SIF_BC_AD6
In
 Connected to EEGS pad UNK ?
         
B1 GPIO33_6 CL7307
Not Connected
 Testpad
B2 GPIO33_5 CL7302
Not Connected
 Testpad
B3 PLLAVD1 +1.5V_BRIDGE
Others
B4 SIF_SINT SINT_BC
Out
 Connected to EEGS pad UNK ?
B5 SIF_BE3 SIF_BE3_BC
Out
 Connected to EEGS pad UNK ?
B6 SIF_DREQ1 SIF_DREQ1_BC
In
 Connected to EEGS pad UNK ?
B7 SIF_RDY SIF_RDY_BC
In
 Connected to EEGS pad UNK ?
B8 SIF_BE2 SIF_BE2_BC
Out
 Connected to EEGS pad UNK ?
B9 SIF_AD1 SIF_BC_AD1
In
 Connected to EEGS pad UNK ?
B10 SIF_AD3 SIF_BC_AD3
In
 Connected to EEGS pad UNK ?
B11 SIF_AD20 SIF_BC_AD20
In
 Connected to EEGS pad UNK ?
B12 SIF_AD30 SIF_BC_AD30
In
 Connected to EEGS pad UNK ?
B13 SIF_AD26 SIF_BC_AD26
In
 Connected to EEGS pad UNK ?
B14 SIF_AD11 SIF_BC_AD11
In
 Connected to EEGS pad UNK ?
         
C1 PCI_AD30 BC_PCI_AD30
In
 Connected to EEGS pad UNK ?
C2 PCI_AD29 BC_PCI_AD29
In
 Connected to EEGS pad UNK ?
C3 TEST_IN_1 GND
Others
 Ground
C4 VSS2 GND
Others
 Ground
C5 VSS2 GND
Others
 Ground
C6 SIF_BE0 SIF_BE0_BC
Out
 Connected to EEGS pad UNK ?
C7 SIF_BE1 SIF_BE1_BC
Out
 Connected to EEGS pad UNK ?
C8 SIF_AD2 SIF_BC_AD2
In
 Connected to EEGS pad UNK ?
C9 SIF_AD0 SIF_BC_AD0
In
 Connected to EEGS pad UNK ?
C10 SIF_AD28 SIF_BC_AD28
In
 Connected to EEGS pad UNK ?
C11 VSS GND
Others
 Ground
C12 VSS GND
Others
 Ground
C13 SIF_AD31 SIF_BC_AD31
In
 Connected to EEGS pad UNK ?
C14 SIF_AD15 SIF_BC_AD15
In
 Connected to EEGS pad UNK ?
         
D1 PCI_AD26 BC_PCI_AD26
In
 Connected to EEGS pad UNK ?
D2 PCI_AD28 BC_PCI_AD28
In
 Connected to EEGS pad UNK ?
D3 PCI_AD31 BC_PCI_AD31
In
 Connected to EEGS pad UNK ?
D4 VSS GND
Others
 Ground
D5 VDDC +1.5V_BRIDGE
Others
D6 VDD +1.5V_EEGS_VDDO
Others
D7 VSS GND
Others
 Ground
D8 VDDC +1.5V_BRIDGE
Others
D9 VDD +1.5V_EEGS_VDDO
Others
D10 VSS GND
Others
 Ground
D11 VDD +1.5V_EEGS_VDDO
Others
D12 SIF_AD10 SIF_BC_AD10
In
 Connected to EEGS pad UNK ?
D13 SIF_AD5 SIF_BC_AD5
In
 Connected to EEGS pad UNK ?
D14 SIF_AD14 SIF_BC_AD14
In
 Connected to EEGS pad UNK ?
         
E1 PCI_AD25 BC_PCI_AD25
In
 Connected to EEGS pad UNK ?
E2 PCI_AD27 BC_PCI_AD27
In
 Connected to EEGS pad UNK ?
E3 PCI_AD24 BC_PCI_AD24
In
 Connected to EEGS pad UNK ?
E4 VSS2 GND
Others
 Ground
E5 VDDS +3.3V_BRIDGE
Others
E6 VDDC +1.5V_BRIDGE
Others
E7 VDD +1.5V_EEGS_VDDO
Others
E8 VSS2 GND
Others
 Ground
E9 TEST_IN_3 GND
Others
 Ground
E10 VDD2 +1.5V_EEGS_VDDO
Others
E11 VDD2 +1.5V_EEGS_VDDO
Others
E12 TEST_IN_4 GND
Others
 Ground
E13 SIF_AD8 SIF_BC_AD8
In
 Connected to EEGS pad UNK ?
E14 SIF_AD13 SIF_BC_AD13
In
 Connected to EEGS pad UNK ?
         
F1 PCI_AD20 BC_PCI_AD20
In
 Connected to EEGS pad UNK ?
F2 PCI_AD22 BC_PCI_AD22
In
 Connected to EEGS pad UNK ?
F3 PCI_AD18 BC_PCI_AD18
In
 Connected to EEGS pad UNK ?
F4 VDDC +1.5V_BRIDGE
Others
F5 VDDS +3.3V_BRIDGE
Others
F6 VSS GND
Others
 Ground
F7 VSS GND
Others
 Ground
F8 TEST_IN_2 GND
Others
 Ground
F9 VDDS +3.3V_BRIDGE
Others
F10 VDD +1.5V_EEGS_VDDO
Others
F11 VSS2 GND
Others
 Ground
F12 GPIO15_0 CL7306
Not Connected
 Testpad
F13 SIF_AD12 SIF_BC_AD12
In
 Connected to EEGS pad UNK ?
F14 SIF_AD24 SIF_BC_AD24
In
 Connected to EEGS pad UNK ?
         
G1 PCI_AD21 BC_PCI_AD21
In
 Connected to EEGS pad UNK ?
G2 PCI_AD23 BC_PCI_AD23
In
 Connected to EEGS pad UNK ?
G3 ? ? ? ?
G4 VSS GND
Others
 Ground
G5 VSS2 GND
Others
 Ground
G6 VSS GND
Others
 Ground
G7 VDDS +3.3V_BRIDGE
Others
G8 VDD2 +1.5V_EEGS_VDDO
Others
G9 VDDC +1.5V_BRIDGE
Others
G10 VSS2 GND
Others
 Ground
G11 VDDC +1.5V_BRIDGE
Others
G12 GPIO15_1 CL7311
Not Connected
 Testpad
G13 SIF_AD16 SIF_BC_AD16
In
 Connected to EEGS pad UNK ?
G14 SIF_AD23 SIF_BC_AD23
In
 Connected to EEGS pad UNK ?
         
H1 PCI_AD15 BC_PCI_AD15
In
 Connected to EEGS pad UNK ?
H2 PCI_AD16 BC_PCI_AD16
In
 Connected to EEGS pad UNK ?
H3 PCI_AD19 BC_PCI_AD19
In
 Connected to EEGS pad UNK ?
H4 VDDC +1.5V_BRIDGE
Others
H5 TEST_PLL_BP_0 GND
Others
 Ground
H6 VSS2 GND
Others
 Ground
H7 VDDC +1.5V_BRIDGE
Others
H8 VDDS +3.3V_BRIDGE
Others
H9 VDD2 +1.5V_EEGS_VDDO
Others
H10 VSS GND
Others
 Ground
H11 VDD +1.5V_EEGS_VDDO
Others
H12 GPIO15_2 CL7305
Not Connected
 Testpad
H13 SIF_AD22 SIF_BC_AD22
In
 Connected to EEGS pad UNK ?
H14 SIF_AD25 SIF_BC_AD25
In
 Connected to EEGS pad UNK ?
         
J1 PCI_AD14 BC_PCI_AD14
In
 Connected to EEGS pad UNK ?
J2 PCI_AD17 BC_PCI_AD17
In
 Connected to EEGS pad UNK ?
J3 PCI_AD6 BC_PCI_AD6
In
 Connected to EEGS pad UNK ?
J4 VDDC +1.5V_BRIDGE
Others
J5 VDDS +3.3V_BRIDGE
Others
J6 VSS GND
Others
 Ground
J7 VDDS +3.3V_BRIDGE
Others
J8 VSS GND
Others
 Ground
J9 VSS GND
Others
 Ground
J10 VSS2 GND
Others
 Ground
J11 VDDC +1.5V_BRIDGE
Others
J12 GPIO33_0 CL7310
Not Connected
 Testpad
J13 SIF_AD19 SIF_BC_AD19
In
 Connected to EEGS pad UNK ?
J14 SIF_AD27 SIF_BC_AD27
In
 Connected to EEGS pad UNK ?
         
K1 PCI_AD9 BC_PCI_AD9
In
 Connected to EEGS pad UNK ?
K2 PCI_AD11 BC_PCI_AD11
In
 Connected to EEGS pad UNK ?
K3 PCI_AD10 BC_PCI_AD10
In
 Connected to EEGS pad UNK ?
K4 VSS GND
Others
 Ground
K5 VDDC +1.5V_BRIDGE
Others
K6 VDDS +3.3V_BRIDGE
Others
K7 VDDS +3.3V_BRIDGE
Others
K8 TEST_PLL_BP_1 GND
Others
 Ground
K9 VSS GND
Others
 Ground
K10 VDD +1.5V_EEGS_VDDO
Others
K11 VSS GND
Others
 Ground
K12 GPIO33_1 CL7304
Not Connected
 Testpad
K13 SIF_AD17 SIF_BC_AD17
In
 Connected to EEGS pad UNK ?
K14 SIF_BREQ BREQ_BC
Out
 Connected to EEGS pad UNK ?
         
L1 PCI_AD3 BC_PCI_AD3
In
 Connected to EEGS pad UNK ?
L2 PCI_AD7 BC_PCI_AD7
In
 Connected to EEGS pad UNK ?
L3 PCI_AD13 BC_PCI_AD13
In
 Connected to EEGS pad UNK ?
L4 VDDC +1.5V_BRIDGE
Others
L5 VSS2 GND
Others
 Ground
L6 VSS GND
Others
 Ground
L7 VSS2 GND
Others
 Ground
L8 VSS GND
Others
 Ground
L9 VDDS +3.3V_BRIDGE
Others
L10 VDDS +3.3V_BRIDGE
Others
L11 VSS GND
Others
 Ground
L12 GPIO33_2 CL7309
Not Connected
 Testpad
L13 SIF_BGNT BGNT_BC
In
 Connected to EEGS pad UNK ?
L14 SIF_GINT SGINT_BC
In
 Connected to EEGS pad UNK ?
         
M1 PCI_AD4 BC_PCI_AD4
In
 Connected to EEGS pad UNK ?
M2 PCI_AD2 BC_PCI_AD2
In
 Connected to EEGS pad UNK ?
M3 PCI_AD1 BC_PCI_AD1
In
 Connected to EEGS pad UNK ?
M4 VSS2 GND
Others
 Ground
M5 PCI_STOP BC_PCI_STOP
In
 Connected to EEGS pad UNK ?
M6 PCI_PAR BC_PCI_PAR
In
 Connected to EEGS pad UNK ?
M7 PCI_TRDY BC_PCI_TRDY
In
 Connected to EEGS pad UNK ?
M8 PCI_CBE0 BC_PCI_CBE0
In
 Connected to EEGS pad UNK ?
M9 PCI_FRAME BC_PCI_FRAME
In
 Connected to EEGS pad UNK ?
M10 PCI_RST BC_PCI_RST
In
 Connected to EEGS pad UNK ? through a 22 ohm resistor
M11 SW1.5 SW1.5
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?
M12 GPIO33_3 CL7303
Not Connected
 Testpad
M13 VBLK EEGS_VBLK1
Out
 Connected to EEGS ? (Vertical BLanK, control signal ?)
M14 HBLK EEGS_HBLK1
Out
 Connected to EEGS ? (Horizontal BLanK, control signal ?)
         
N1 PCI_AD8 BC_PCI_AD8
In
 Connected to EEGS pad UNK ?
N2 PCI_AD5 BC_PCI_AD5
In
 Connected to EEGS pad UNK ?
N3 PLLAVD0 +1.5V_BRIDGE
Others
N4 PCI_AD0 BC_PCI_AD0
In
 Connected to EEGS pad UNK ?
N5 PCI_SERR BC_PCI_SERR
Out
 Connected to EEGS pad UNK ?
N6 PCI_DEVSEL BC_PCI_DEVSEL
In
 Connected to EEGS pad UNK ?
N7 PCI_CBE2 BC_PCI_CBE2
In
 Connected to EEGS pad UNK ?
N8 PCI_GNT BC_PCI_GNT1
In
 Connected to EEGS pad UNK ?
N9 SW2.65 SW2.65
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?
N10 SW3.3 SW3.3
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?
N11 SW1.81 SW1.81
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?
N12 GPIO33_4 CL7308
Not Connected
 Testpad
N13 PCLKEN PCLKEN
In
N14 EGRST EGRST
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?. It seems this line is shared with EEGS, both are reset together
         
P1 PCI_AD12 BC_PCI_AD12
In
 Connected to EEGS pad UNK ?
P2 PLLAVS0 GND
Others
 Ground
P3 PCI_CLK BC_PCI_CLK
Out
 Connected to EEGS pad UNK ? through a 49.9 ohm resistor
P4 PCI_CBE1 BC_PCI_CBE1
In
 Connected to EEGS pad UNK ?
P5 PCI_PERR BC_PCI_PERR
Out
 Connected to EEGS pad UNK ?
P6 PCI_IRDY BC_PCI_IRDY
In
 Connected to EEGS pad UNK ?
P7 PCI_CBE3 BC_PCI_CBE3
In
 Connected to EEGS pad UNK ?
P8 PCI_REQ BC_PCI_REQ1
In
 Connected to EEGS pad UNK ?
P9 SW1.8 SW1.8
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?
P10 SW2.5 SW2.5
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?
P11 SW1.2 SW1.2
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?
P12 SW3.1 SW3.1
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?
P13 GPIO33_7 CL7301
Not Connected
 Testpad
P14 PWRUP_EE PWRUP_EE
In
 Connected to Syscon pad UNK (BGA 200 pads layout) ?. It seems this line is shared with EEGS, both are powered up together
Syscon
CXR713F Series
CELL
90 nm
65 nm
45 nm
RSX
90 nm
65 nm
40 nm
28 nm
CELL RAM
(XDR)
Elpida
Qimonda
Samsung
RSX RAM
(GDDR3 or 5)
Elpida
Infineon & Qimonda
Samsung
Hynix
PS2
Compatibility
EEGS
RDRAM
Bridge
South Bridge
Starship2
Flash
NAND
Samsung
NOR
Macronix
Samsung
Spansion
eMMC
Samsung
Panasonic
BD SATA/PATA
BD Controllers
On BD board
Sony
Renesas SCEI
Integrated
Sony
Renesas SCEI
Others
IDT SCEI
Wireless
Connectors
Other
Diverse Comp.
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