EBUS: Difference between revisions

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Proprietary 78-lines Interface with 54 testpads of the ''partial'' communication between [[South Bridge]] + [[Syscon Hardware]] with [[Starship2]] towards dual [[Flash (Hardware)|NAND]] 15pin (+ 2x VCC + 2x GND) interface.
Proprietary 78-lines Interface with 54 testpads of the ''partial'' communication between [[South Bridge]] + [[Syscon Hardware]] with [[Starship2]] towards dual [[Flash (Hardware)|NAND]] 15pin (+ 2x VCC + 2x GND) interface.


(in comparison, a Teensy 2.00++ only has 51 lines, not all are useable as programmable I/O)
(in comparison, a [[Teensy 2.0++]] only has 51 lines, not all are useable as programmable I/O)


Because the exposed EBUS is only partial, entire flash will never be accessable, not even when the protocol is 100% reversed. The lower interface of NAND is exposed complete and also lesser wires/pins than the EBUS.
The lower interface of NAND is exposed complete and also lesser wires/pins than the EBUS.


For this reason, reading/writing to flash is adviced using the <abbr title="Common Flash Interface">CFI</abbr> of the standardised dual [[Flash (Hardware)|NANDs]] (perfectly useable with a Teensy 2.00++).
For this reason, reading/writing to flash is adviced using the <abbr title="Common Flash Interface">CFI</abbr> of the standardised dual [[Flash (Hardware)|NANDs]] (perfectly useable with a [[Teensy 2.0++]]).


== Protocol / line usage ==
== Protocol / line usage ==
Line 42: Line 42:
! No. !! TP Name !! Usage !! COK-001 !! COK-002 !! SEM-001 !! Remark
! No. !! TP Name !! Usage !! COK-001 !! COK-002 !! SEM-001 !! Remark
|-
|-
| 0 || JL9300 || RESET || - || /SB_EBUS_RESET (/EBUSRESETZ / AL29)|| /SB_EBUS_RESET (/EBUSRESETZ / P29) ||
| 0 || JL9300 || RESET || /SB_EBUS_RESET (PIO[7] / E1) || /SB_EBUS_RESET (/EBUSRESETZ / AL29) || /SB_EBUS_RESET (/EBUSRESETZ / P29) ||
|-  
|-  
| 1 || JL9301 || MOD0 || /SB_MOD0 (MODZ0 / W8) || /SB_MOD0 (MODZ0 / J30) ||  ||
| 1 || JL9301 || MOD0 || /SB_MOD0 (MODZ0 / W8) || /SB_MOD0 (MODZ0 / J30) ||  ||
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| 69 || - || A27 || - (EBUSADDR[27] / H4) || - (EBUSADDR[27] / AL23) || - SB_EBUS_ADDR0 (EBUSADDR[27] / W27) ||  
| 69 || - || A27 || - (EBUSADDR[27] / H4) || - (EBUSADDR[27] / AL23) || - SB_EBUS_ADDR0 (EBUSADDR[27] / W27) || Not used
|-
|-
| 70 || - || A26 || - (EBUSADDR[26] / H3) || - (EBUSADDR[26] / AK23) || - SB_EBUS_ADDR0 (EBUSADDR[26] / W26) ||  
| 70 || - || A26 || - (EBUSADDR[26] / H3) || - (EBUSADDR[26] / AK23) || - SB_EBUS_ADDR0 (EBUSADDR[26] / W26) || Not used
|-
|-
| 71 || - || A25 || - (EBUSADDR[25] / V4) || - (EBUSADDR[25] / AC30) || - SB_EBUS_ADDR0 (EBUSADDR[25] / H26) ||  
| 71 || - || A25 || - (EBUSADDR[25] / V4) || - (EBUSADDR[25] / AC30) || - SB_EBUS_ADDR0 (EBUSADDR[25] / H26) || Not used
|-
|-
| 72 || - || A24 || - (EBUSADDR[24] / U2) || - (EBUSADDR[24] / AC29) || - SB_EBUS_ADDR0 (EBUSADDR[24] / H27) ||  
| 72 || - || A24 || - (EBUSADDR[24] / U2) || - (EBUSADDR[24] / AC29) || - SB_EBUS_ADDR0 (EBUSADDR[24] / H27) || Not used
|-
|-
| 73 || - || A23 || - (EBUSADDR[23] / U3) || - (EBUSADDR[23] / AC28) || - SB_EBUS_ADDR0 (EBUSADDR[23] / H29) ||  
| 73 || - || A23 || - (EBUSADDR[23] / U3) || - (EBUSADDR[23] / AC28) || - SB_EBUS_ADDR0 (EBUSADDR[23] / H29) || Not used
|-
|-
| 74 || - || A22 || - (EBUSADDR[22] / U1) || - (EBUSADDR[22] / AE29) || - SB_EBUS_ADDR0 (EBUSADDR[22] / H30) ||  
| 74 || - || A22 || - (EBUSADDR[22] / U1) || - (EBUSADDR[22] / AE29) || - SB_EBUS_ADDR0 (EBUSADDR[22] / H30) || Not used
|-
|-
| 75 || - || A21 || - (EBUSADDR[21] / M3) || - (EBUSADDR[21] / AJ29) || - SB_EBUS_ADDR0 (EBUSADDR[21] / P26) ||  
| 75 || - || A21 || - (EBUSADDR[21] / M3) || - (EBUSADDR[21] / AJ29) || - SB_EBUS_ADDR0 (EBUSADDR[21] / P26) || Not used
|-
|-
| 76 || - || A20 || - (EBUSADDR[20] / N1) || - (EBUSADDR[20] / AJ31) || - SB_EBUS_ADDR0 (EBUSADDR[20] / N27) ||  
| 76 || - || A20 || - (EBUSADDR[20] / N1) || - (EBUSADDR[20] / AJ31) || - SB_EBUS_ADDR0 (EBUSADDR[20] / N27) || Not used
|-
|-
| 77 || - || A19 || - (EBUSADDR[19] / N2) || - (EBUSADDR[19] / AH28) || - SB_EBUS_ADDR0 (EBUSADDR[19] / N26) ||  
| 77 || - || A19 || - (EBUSADDR[19] / N2) || - (EBUSADDR[19] / AH28) || - SB_EBUS_ADDR0 (EBUSADDR[19] / N26) || Not used
|-
|-
| 78 || - || A18 || - (EBUSADDR[18] / L4) || - (EBUSADDR[18] / AJ28) || - SB_EBUS_ADDR0 (EBUSADDR[18] / P27) ||  
| 78 || - || A18 || - (EBUSADDR[18] / L4) || - (EBUSADDR[18] / AJ28) || - SB_EBUS_ADDR0 (EBUSADDR[18] / P27) || Not used
|-
|-
| 21 || JL9321 || A17 || SB_EBUS_ADDR17 (EBUSADDR[17] / L3) || SB_EBUS_ADDR17 (EBUSADDR[17] / AH27) || SB_EBUS_ADDR0 (EBUSADDR[17] / P30) ||  
| 21 || JL9321 || A17 || SB_EBUS_ADDR17 (EBUSADDR[17] / L3) || SB_EBUS_ADDR17 (EBUSADDR[17] / AH27) || SB_EBUS_ADDR0 (EBUSADDR[17] / P30) ||  
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|-
|-
|}
|}
{{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude>

Latest revision as of 14:11, 14 August 2021

EBUS - diagram

EBUS[edit | edit source]

Proprietary 78-lines Interface with 54 testpads of the partial communication between South Bridge + Syscon Hardware with Starship2 towards dual NAND 15pin (+ 2x VCC + 2x GND) interface.

(in comparison, a Teensy 2.0++ only has 51 lines, not all are useable as programmable I/O)

The lower interface of NAND is exposed complete and also lesser wires/pins than the EBUS.

For this reason, reading/writing to flash is adviced using the CFI of the standardised dual NANDs (perfectly useable with a Teensy 2.0++).

Protocol / line usage[edit | edit source]

  • Datastream:
    • 16 datalines
    • 28 addresslines (only first 18 exposed)
  • Controllines:
    • 7x Chip Enable : CE0, CE1, CE2, CE3, CE4, CE5, CE6 (thus splitted into 7 virtual banks but only 3 exposed)
    • RBW : I/O R, I/O B, I/O W (only read exposed)
    • 2x BWE (not exposed)
    • SWE
    • Output Enable
    • Reset
    • Ready
    • INT
  • Other:
    • 3x MODlines (only 1 exposed)
    • 4x clocklines (only 1 exposed)
    • Tristate

Notes[edit | edit source]

On  CEX ,  DEX ,  ARC  consoles with NAND, only 256MB (2x 128MB) is used.

On  DECR  consoles with NAND, only 256 MB (1x 258MB) is used (although there is an empty TSOP pad for a second one).

This points that the EBUS needs to address at least 512MB

See also: flash format , sb_rom_base and SS2_WORK inside lv0ldr

Hardware lines / pads[edit | edit source]

No. TP Name Usage COK-001 COK-002 SEM-001 Remark
0 JL9300 RESET /SB_EBUS_RESET (PIO[7] / E1) /SB_EBUS_RESET (/EBUSRESETZ / AL29) /SB_EBUS_RESET (/EBUSRESETZ / P29)
1 JL9301 MOD0 /SB_MOD0 (MODZ0 / W8) /SB_MOD0 (MODZ0 / J30)
55 - MOD1 /SB_MOD1 (MODZ1 / V8)
56 - MOD2 /SB_MOD2 (MODZ2 / U8)
2 JL9302 SYSCLK SB_EBUS_SYSCLK (EBUSSYSCLK / W1) SB_EBUS_SYSCLKO0 SB_EBUS_SYSCLKO0
57 - CLK SB_EBUS_CLK (EBUSCLK / AJ30) SB_EBUS_CLK (EBUSCLK / F30)
58 - CLK SB_EBUS_CLK0[0] (/SB_EBUS_CLKO0 / AD28) SB_EBUS_CLK0[0] (/SB_EBUS_CLKO0 / G30)
59 - CLK SB_EBUS_CLK0[1] (/SB_EBUS_CLKO1 / AD29) SB_EBUS_CLK0[1] (/SB_EBUS_CLKO0 / F29)
3 JL9303 IOR/BE /SB_EBUS_IOR SB_EBUS_BE (/EBUSBEZ / AE31) SB_EBUS_BE (/EBUSBEZ / G29)
60 - IOR /SB_BUS_IOR (EBUSIORZ / N3)
61 - IOW - (EBUSIOWZ / N4)
4 JL9304 SWE /SB_EBUS_SWE (/EBUSSWEZ / M4) /SB_EBUS_SWE (/EBUSSWEZ / AK29) /SB_EBUS_SWE (/EBUSSWEZ / N30)
5 JL9305 OE /SB_EBUS_OE (/EBUSOEZ / L5) /SB_EBUS_OE (/EBUSOEZ / AK25) /SB_EBUS_OE (/EBUSOEZ / V30)
62 - BWE0 - (/EBUSBWEZ[0] / W2) - (/EBUSBWEZ[0] / AC31) - (/EBUSBWEZ[0] / G27)
63 - BWE1 - (/EBUSBWEZ[1] / W3) - (/EBUSBWEZ[1] / AB28) - (/EBUSBWEZ[1] / G26)
64 - CE6 - (EBUSCEZ[6] / L7) - -
65 - CE4 - (EBUSCEZ[4] / K5) - -
66 - CE5 - (EBUSCEZ[5] / K7) - -
67 - CE3 - (EBUSCEZ[3] / J7) - (EBUSCEZ[3] / AJ23) - (/EBUSCEZ[3] / Y27)
6 JL9306 CE2 /SB_EBUS_CE2 (/EBUSCEZ[2] / J5) /SB_EBUS_CE2 (/EBUSCEZ[2] / AH23) /SB_EBUS_CE2 (/EBUSCEZ[2] / Y30)
68 CL3005 / CL3002 / CL3012 CE1 - (EBUSCEZ[1] / J7) - (EBUSCEZ[1] / AJ24) - (EBUSCEZ[1] / Y29)
7 JL9307 CE0 /SB_EBUS_CE0 (/EBUSCEZ[0] / H5) /SB_EBUS_CE0 (/EBUSCEZ[0] / AL25) /SB_EBUS_CE0 (/EBUSCEZ[0] / W29)
8 JL9308 ACK/RDY /SB_EBUS_ACK (/EBUSACKZ / V3) /SB_EBUS_RDY (EBUSRDY / AH22) /SB_EBUS_RDY (EBUSRDY / AA29)
9 JL9309 BRDY SS2_BRDY SS2_BRDY SS2_BRDY
10 JL9310 INT /SS2_INT /SB_EBUS_INT (/EBUSINTZ / AJ22) /SB_EBUS_INT (/EBUSINTZ / AA30)
11 JL9311 GND Ground Ground Ground
12 JL9312 GND Ground Ground Ground
13 JL9313 GND Ground Ground Ground
14 JL9314 GND Ground Ground Ground
15 JL9315 GND Ground Ground Ground
16 JL9316 GND Ground Ground Ground
17 JL9317 GND Ground Ground Ground
18 JL9318 GND Ground Ground Ground
19 JL9319 GND Ground Ground Ground
20 JL9320 GND Ground Ground Ground
69 - A27 - (EBUSADDR[27] / H4) - (EBUSADDR[27] / AL23) - SB_EBUS_ADDR0 (EBUSADDR[27] / W27) Not used
70 - A26 - (EBUSADDR[26] / H3) - (EBUSADDR[26] / AK23) - SB_EBUS_ADDR0 (EBUSADDR[26] / W26) Not used
71 - A25 - (EBUSADDR[25] / V4) - (EBUSADDR[25] / AC30) - SB_EBUS_ADDR0 (EBUSADDR[25] / H26) Not used
72 - A24 - (EBUSADDR[24] / U2) - (EBUSADDR[24] / AC29) - SB_EBUS_ADDR0 (EBUSADDR[24] / H27) Not used
73 - A23 - (EBUSADDR[23] / U3) - (EBUSADDR[23] / AC28) - SB_EBUS_ADDR0 (EBUSADDR[23] / H29) Not used
74 - A22 - (EBUSADDR[22] / U1) - (EBUSADDR[22] / AE29) - SB_EBUS_ADDR0 (EBUSADDR[22] / H30) Not used
75 - A21 - (EBUSADDR[21] / M3) - (EBUSADDR[21] / AJ29) - SB_EBUS_ADDR0 (EBUSADDR[21] / P26) Not used
76 - A20 - (EBUSADDR[20] / N1) - (EBUSADDR[20] / AJ31) - SB_EBUS_ADDR0 (EBUSADDR[20] / N27) Not used
77 - A19 - (EBUSADDR[19] / N2) - (EBUSADDR[19] / AH28) - SB_EBUS_ADDR0 (EBUSADDR[19] / N26) Not used
78 - A18 - (EBUSADDR[18] / L4) - (EBUSADDR[18] / AJ28) - SB_EBUS_ADDR0 (EBUSADDR[18] / P27) Not used
21 JL9321 A17 SB_EBUS_ADDR17 (EBUSADDR[17] / L3) SB_EBUS_ADDR17 (EBUSADDR[17] / AH27) SB_EBUS_ADDR0 (EBUSADDR[17] / P30)
22 JL9322 A16 SB_EBUS_ADDR16 (EBUSADDR[16] / U4) SB_EBUS_ADDR16 (EBUSADDR[16] / AE30) SB_EBUS_ADDR0 (EBUSADDR[16] / J29)
23 JL9323 A15 SB_EBUS_ADDR15 (EBUSADDR[15] / T4) SB_EBUS_ADDR15 (EBUSADDR[15] / AE28) SB_EBUS_ADDR0 (EBUSADDR[15] / J30)
24 JL9324 A14 SB_EBUS_ADDR14 (EBUSADDR[14] / T3) SB_EBUS_ADDR14 (EBUSADDR[14] / AF29) SB_EBUS_ADDR0 (EBUSADDR[14] / K29)
25 JL9325 A13 SB_EBUS_ADDR13 (EBUSADDR[13] / R4) SB_EBUS_ADDR13 (EBUSADDR[13] / AF28) SB_EBUS_ADDR0 (EBUSADDR[13] / K30)
26 JL9326 A12 SB_EBUS_ADDR12 (EBUSADDR[12] / R3) SB_EBUS_ADDR12 (EBUSADDR[12] / AG31) SB_EBUS_ADDR0 (EBUSADDR[12] / L29)
27 JL9327 A11 SB_EBUS_ADDR11 (EBUSADDR[11] / R2) SB_EBUS_ADDR11 (EBUSADDR[11] / AG30) SB_EBUS_ADDR0 (EBUSADDR[11] / L30)
28 JL9328 A10 SB_EBUS_ADDR10 (EBUSADDR[10] / R1) SB_EBUS_ADDR10 (EBUSADDR[10] / AG29) SB_EBUS_ADDR0 (EBUSADDR[10] / M29)
29 JL9329 A9 SB_EBUS_ADDR9 (EBUSADDR[8] / P4) SB_EBUS_ADDR9 (EBUSADDR[9] / AG28) SB_EBUS_ADDR0 (EBUSADDR[9] / M30)
30 JL9330 A8 SB_EBUS_ADDR8 (EBUSADDR[8] / P3) SB_EBUS_ADDR8 (EBUSADDR[8] / AH29) SB_EBUS_ADDR0 (EBUSADDR[8] / N29)
31 JL9331 A7 SB_EBUS_ADDR7 (EBUSADDR[7] / L2) SB_EBUS_ADDR7 (EBUSADDR[7] / AJ25) SB_EBUS_ADDR0 (EBUSADDR[7] / R29)
32 JL9332 A6 SB_EBUS_ADDR6 (EBUSADDR[6] / L1) SB_EBUS_ADDR6 (EBUSADDR[6] / AK27) SB_EBUS_ADDR0 (EBUSADDR[6] / R30)
33 JL9333 A5 SB_EBUS_ADDR5 (EBUSADDR[5] / K4) SB_EBUS_ADDR5 (EBUSADDR[5] / AL27) SB_EBUS_ADDR0 (EBUSADDR[5] / T29)
34 JL9334 A4 SB_EBUS_ADDR4 (EBUSADDR[4] / K3) SB_EBUS_ADDR4 (EBUSADDR[4] / AH26) SB_EBUS_ADDR0 (EBUSADDR[4] / T30)
35 JL9335 A3 SB_EBUS_ADDR3 (EBUSADDR[3] / J3) SB_EBUS_ADDR3 (EBUSADDR[3] / AJ25) SB_EBUS_ADDR0 (EBUSADDR[3] / U29)
36 JL9336 A2 SB_EBUS_ADDR2 (EBUSADDR[2] / J2) SB_EBUS_ADDR2 (EBUSADDR[2] / AH25) SB_EBUS_ADDR0 (EBUSADDR[2] / U30)
37 JL9337 A1 SB_EBUS_ADDR1 (EBUSADDR[1] / J1) SB_EBUS_ADDR1 (EBUSADDR[1] / AJ25) SB_EBUS_ADDR0 (EBUSADDR[1] / V29)
38 JL9338 A0 SB_EBUS_ADDR0 (EBUSADDR[0] / J4) SB_EBUS_ADDR0 (EBUSADDR[0] / AH24) SB_EBUS_ADDR0 (EBUSADDR[0] / W30)
39 JL9339 D15 SB_EBUS_DATA15 (EBUSDATA[15] / W7) SB_EBUS_DATA15 (EBUSDATA[15] / AB26) SB_EBUS_DATA15 (EBUSDATA[15] / J26)
40 JL9340 D14 SB_EBUS_DATA14 (EBUSDATA[14] / V7) SB_EBUS_DATA14 (EBUSDATA[14] / AC26) SB_EBUS_DATA14 (EBUSDATA[14] / K26)
41 JL9341 D13 SB_EBUS_DATA13 (EBUSDATA[13] / U7) SB_EBUS_DATA13 (EBUSDATA[13] / AD26) SB_EBUS_DATA13 (EBUSDATA[13] / L26)
42 JL9342 D12 SB_EBUS_DATA12 (EBUSDATA[12] / T7) SB_EBUS_DATA12 (EBUSDATA[12] / AE26) SB_EBUS_DATA12 (EBUSDATA[12] / M26)
43 JL9343 D11 SB_EBUS_DATA11 (EBUSDATA[11] / R7) SB_EBUS_DATA11 (EBUSDATA[11] / AF26) SB_EBUS_DATA11 (EBUSDATA[11] / R26)
44 JL9344 D10 SB_EBUS_DATA10 (EBUSDATA[10] / P7) SB_EBUS_DATA10 (EBUSDATA[10] / AB24) SB_EBUS_DATA10 (EBUSDATA[10] / T26)
45 JL9345 D9 SB_EBUS_DATA9 (EBUSDATA[9] / N7) SB_EBUS_DATA9 (EBUSDATA[9] / AE23) SB_EBUS_DATA9 (EBUSDATA[9] / U26)
46 JL9346 D8 SB_EBUS_DATA8 (EBUSDATA[8] / M7) SB_EBUS_DATA8 (EBUSDATA[8] / AE22) SB_EBUS_DATA8 (EBUSDATA[8] / V26)
47 JL9347 D7 SB_EBUS_DATA7 (EBUSDATA[7] / W5) SB_EBUS_DATA7 (EBUSDATA[7] / AB25) SB_EBUS_DATA7 (EBUSDATA[7] / J27)
48 JL9348 D6 SB_EBUS_DATA6 (EBUSDATA[6] / V5) SB_EBUS_DATA6 (EBUSDATA[6] / AC25) SB_EBUS_DATA6 (EBUSDATA[6] / K27)
49 JL9349 D5 SB_EBUS_DATA5 (EBUSDATA[5] / U5) SB_EBUS_DATA5 (EBUSDATA[5] / AD25) SB_EBUS_DATA5 (EBUSDATA[5] / L27)
50 JL9350 D4 SB_EBUS_DATA4 (EBUSDATA[4] / T5) SB_EBUS_DATA4 (EBUSDATA[4] / AE25) SB_EBUS_DATA4 (EBUSDATA[4] / M27)
51 JL9351 D3 SB_EBUS_DATA3 (EBUSDATA[3] / R5) SB_EBUS_DATA3 (EBUSDATA[3] / AF25) SB_EBUS_DATA3 (EBUSDATA[3] / R27)
52 JL9352 D2 SB_EBUS_DATA2 (EBUSDATA[2] / P5) SB_EBUS_DATA2 (EBUSDATA[2] / AF24) SB_EBUS_DATA2 (EBUSDATA[2] / T27)
53 JL9353 D1 SB_EBUS_DATA1 (EBUSDATA[1] / N5) SB_EBUS_DATA1 (EBUSDATA[1] / AF23) SB_EBUS_DATA1 (EBUSDATA[1] / U27)
54 JL9354 D0 SB_EBUS_DATA0 (EBUSDATA[0] / M5 SB_EBUS_DATA0 (EBUSDATA[0] / AF22) SB_EBUS_DATA0 (EBUSDATA[0] / V27)


Syscon
CXR713F Series
CELL
90 nm
65 nm
45 nm
RSX
90 nm
65 nm
40 nm
28 nm
CELL RAM
(XDR)
Elpida
Qimonda
Samsung
RSX RAM
(GDDR3 or 5)
Elpida
Infineon & Qimonda
Samsung
Hynix
PS2
Compatibility
EEGS
RDRAM
Bridge
South Bridge
Starship2
Flash
NAND
Samsung
NOR
Macronix
Samsung
Spansion
eMMC
Samsung
Panasonic
BD SATA/PATA
BD Controllers
On BD board
Sony
Renesas SCEI
Integrated
Sony
Renesas SCEI
Others
IDT SCEI
Wireless
Connectors
Other
Diverse Comp.
Retrieved from "http://www.psdevwiki.com/ps3/index.php?title=EBUS&oldid=61140"