W1132BBBG-28-E-F: Difference between revisions
Jump to navigation
Jump to search
[[
(Created page with "== Elpida W1132BBBG-28-E-F == <div style="float:right"><br />[[200px|thumb|left|[[RSX D5305'''L''' with...") |
No edit summary |
||
| Line 1: | Line 1: | ||
== Elpida W1132BBBG-28-E-F == | == Elpida W1132BBBG-28-E-F == | ||
<div style="float:right"><br />[[[[File:RSX D5305L with elpida W1132BBBG in CECH-43xx REX-001.jpg|200px|thumb|left|[[RSX]] [[D5305]]'''L''' with elpida [[W1132BBBG-28-E-F]] memory in [[CECH-43xx]] [[REX-001]]]]</div> | <div style="float:right"><br />[[[[File:RSX D5305L with elpida W1132BBBG in CECH-43xx REX-001.jpg|200px|thumb|left|[[RSX]] [[D5305]]'''L''' with elpida [[W1132BBBG-28-E-F]] memory in [[CECH-43xx]] [[REX-001]]]]</div> | ||
1 Gbit GDDR5 SDRAM used on 28 nm RSX | |||
*Used on | *Used on | ||
**[[CECH-43xx]] with motherboard [[REX-001]] and [[RSX]] [[D5305]]L | **[[CECH-43xx]] with motherboard [[REX-001]] and [[RSX]] [[D5305]]L | ||
Revision as of 14:46, 11 February 2023
Elpida W1132BBBG-28-E-F
[[
1 Gbit GDDR5 SDRAM used on 28 nm RSX
| Product Family | Density | Organization | Power Supply, Interface | Die Rev. | Package | Speed | Internal Code (optional) |
Enviroment Code |
|---|---|---|---|---|---|---|---|---|
| X: XDR DRAM W: GDDR5 SDRAM |
51: 512M 10: 1Gb 11: ? |
16: x16bit 32: x32bit |
A: 1.8V, DRSL B: 1.5V +/- 0.075V, DRSL |
A: Rev1 B: Rev2 C: Rev3 D: Rev4 |
SE: FBGA BG: FBGA |
3C: 3.2Gbps (tRAC = 35ns, C Bin) 4D: 4.0Gbps (tRAC = 34ns, D Bin) 28: ? |
A2: ? | E: Lead Free F: Lead & Halogen Free |
| This article is marked for rewrite/restructuring in proper wiki format. You can help PS3 Developer wiki by editing it. |
| |||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
