CXD4302GB-1

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Sony CXD4302GB-1 / CXD4302GB-T6 (Starship 2)

alt.part no.: CXD4302GB-T6
8-753-265-45 / IC3801
Seen in early NAND FAT: CECHAxx/COK-001 and CECHBxx/COK-001

Documented in sm-ps3-0013e-02-0.pdf

IC3801 (StarShip 2)
BALL-GRID-ARRAY overview
IC view, facing BGA
A1 marker:northeast/topright

IC3801 (StarShip 2)
BALL-GRID-ARRAY overview
PCB view, facing BGA
A1 marker:northwest/topleft
Pad # Name Description
A1 HA[0] /SB_EBUS_ADDR0 (via JL9338 EBUS)
A2 XHOE /SB_EBU_OE (via JL9305 EBUS)
A3 HA[2] /SB_EBUS_ADDR2 (via JL9336 EBUS)
A4 HA[4] /SB_EBUS_ADDR4 (via JL9334 EBUS)
A5 HA[6] /SB_EBUS_ADDR6 (via JL9332 EBUS)
A6 HA[17] /SB_EBUS_ADDR17 (via JL9321 EBUS)
A7 XHWE /SB_EBUS_SWE (via JL9304 EBUS)
A8 HA[9] /SB_EBUS_ADDR9 (via JL9329 EBUS)
A9 HA[11] /SB_EBUS_ADDR11 (via JL9327 EBUS)
A10 VDD33 +3.3V VDD
A11 HA[14] /SB_EBUS_ADDR14 (via JL9324 EBUS)
A12 HA[16] /SB_EBUS_ADDR16 (via JL9322 EBUS)
A13 BSTCLK /SB_EBUS_SYSCLK with R3806 0 Ohm inline (via JL9302 EBUS)
A14 IA[3]
B1 XHCE0 /SB_EBUS_CE0 (via JL9307 EBUS)
B2 HA[1] /SB_EBUS_ADDR1 (via JL9337 EBUS)
B3 HA[3] /SB_EBUS_ADDR3 (via JL9335 EBUS)
B4 HA[5] /SB_EBUS_ADDR5 (via JL9333 EBUS)
B5 HA[7] /SB_EBUS_ADDR7 (via JL9331 EBUS)
B6 XHRST (C3827 100pF CH 50V & R3801 10kOhm) to /SB_EBUS_RESET (with R3838 0 Ohm inline) + /SS2_RESET (with R3839 0 Ohm inline)
B7 HA[8] /SB_EBUS_ADDR8 (via JL9330 EBUS)
B8 HA[10] /SB_EBUS_ADDR10 (via JL9328 EBUS)
B9 HA[12] /SB_EBUS_ADDR12 (via JL9326 EBUS)
B10 HA[13] /SB_EBUS_ADDR13 (via JL9325 EBUS)
B11 HA[15] /SB_EBUS_ADDR15 (via JL9323 EBUS)
B12 XHBE /SB_EBUS_IOR (via JL9303 EBUS)
B13 IA[2]
B14 VDD33 +3.3V VDD
C1 HRDY /SB_EBUS_ACK (via JL9308 EBUS)
C2 XHCE1 /SB_EBUS_CE2 (via JL9306 EBUS)
C3 HD[2] /SB_EBUS_DATA2 (via JL9352 EBUS)
C4 HD[3] /SB_EBUS_DATA3 (via JL9351 EBUS)
C5 HD[11] /SB_EBUS_DATA11 (via JL9343 EBUS)
C6 HD[4] /SB_EBUS_DATA4 (via JL9350 EBUS)
C7 HD[5] /SB_EBUS_DATA5 (via JL9349 EBUS)
C8 HD[6] /SB_EBUS_DATA6 (via JL9348 EBUS)
C9 HD[14] /SB_EBUS_DATA14 (via JL9340 EBUS)
C10 HD[7] /SB_EBUS_DATA7 (via JL9347 EBUS)
C11 HD[15] /SB_EBUS_DATA15 (via JL9339 EBUS)
C12 IA[4]
C13 IA[1]
C14 IA[0]
D1 BRDY R3802 22 Ohm inline and R3807 10KOhm pullup to /SS2_BRDY (via JL9309 EBUS)
D2 XINT R3808 10KOhm pullup to /SS2_INT (via JL9310 EBUS)
D3 HD[10] /SB_EBUS_DATA10 (via JL9344 EBUS)
D4 GND Ground
D5 VDD33 +3.3V VDD
D6 VDD33 +3.3V VDD
D7 HD[12] /SB_EBUS_DATA12 (via JL9342 EBUS)
D8 HD[13] /SB_EBUS_DATA13 (via JL9341 EBUS)
D9 VDD33 +3.3V VDD
D10 VDD33 +3.3V VDD
D11 GND Ground
D12 IA[5]
D13 ID[0]
D14 ID[1]
E1 VDD33 +3.3V VDD
E2 HD[8] /SB_EBUS_DATA8 (via JL9346 EBUS)
E3 HD[1] /SB_EBUS_DATA1 (via JL9353 EBUS)
E4 HD[9] /SB_EBUS_DATA9 (via JL9345 EBUS)
E11 IA[7]
E12 IA[6]
E13 ID[2]
E14 ID[3]
F1 CPOUT via R3809 1k Ohm to G1 (VCOIN)
F2 PLLSEL[3] to VDD33
F3 PLLSEL[1] to VDD33
F4 HD[0] /SB_EBUS_DATA0 (via JL9354 EBUS)
F6 GND Ground
F7 GND Ground
F8 GND Ground
F9 GND Ground
F11 VDD18 +1.8V VDD
F12 IA[12]
F13 ID[4]
F14 ID[5]
G1 VCOIN via R3810 180 Ohm and C3801 0.01uF B 25V to Ground
G2 VDDP +1.8V VDD
G3 VDD18 +1.8V VDD
G4 PLLSEL[2] via R3822 0 Ohm to Ground
G6 GND Ground
G7 GND Ground
G8 GND Ground
G9 GND Ground
G11 IA[15]
G12 VDD33 +3.3V VDD
G13 ID[6]
G14 ID[7]
H1 PLLSEL[2] via R3824 0 Ohm to Ground
H2 GNDP Ground
H3 CLKSEL via R3843 0 Ohm to Ground
H4 VDD33 +3.3V VDD
H6 GND Ground
H7 GND Ground
H8 GND Ground
H9 GND Ground
H11 VDD33 +3.3V VDD
H12 IA[13]
H13 IA[10]
H14 XICE
J1 CNTCLK SB_SS2_CLK (R3811 0 Ohm inline)
J2 VDD33 +3.3V VDD
J3 SCAN[1]
J4 PLLEN via R3844 0 Ohm to VDD33
J6 GND Ground
J7 GND Ground
J8 GND Ground
J9 GND Ground
J11 IA[9]
J12 IA[8]
J13 IA[14]
J14 XIRD
K1 XIN via R3842 0 Ohm to VDD33
K2 GND Ground
K3 PLLSEL[0] via R3820 0 Ohm to Ground
K4 PLLTEST via R3845 0 Ohm to Ground
K11 VDD33 +3.3V VDD
K12 IA[11]
K13 SCAN[0]
K14 INMIN
L1 XOUT
L2 XFRB1 SS2_XFRB1
L3 XFCE1 SS2_XFCE1
L4 GND Ground
L5 FALE1 SS2_FALE1
L6 VDD33 +3.3V VDD
L7 VDD33 +3.3V VDD
L8 VDD18 +1.8V VDD
L9 FALE0 SS2_FALE0
L10 VDD33 +3.3V VDD
L11 GND Ground
L12 FD0[8]
L13 XIWR
L14 XEXPOR via R3846 0 Ohm to VDD33
M1 FD1[15]
M2 FD1[7]
M3 XFRE1 SS2_XFRE1
M4 FCLE1 SS2_FCLE1
M5 XFWE1 SS2_XFWE1
M6 XFWP1 SS2_XFWP1
M7 XFRB0 SS2_XFRB0
M8 XFCE0 SS2_XFCE0
M9 FCLE0 SS2_FCLE0
M10 XFWE0 SS2_XFWE0
M11 XFWP0 SS2_XFWP0
M12 VDD33 +3.3V VDD
M13 FD0[1] SS2_FD0_1
M14 FD0[0] SS2_FD0_0
N1 FD1[14]
N2 FD1[13]
N3 FD1[12]
N4 FD1[11]
N5 FD1[10]
N6 FD1[9]
N7 FD1[8]
N8 FD0[15]
N9 FD0[14]
N10 FD0[13]
N11 FD0[12]
N12 FD0[11] SS2_FD0_11
N13 FD0[2] SS2_FD0_2
N14 FD0[9] SS2_FD0_9
P1 FD1[6] SS2_FD1_6
P2 FD1[5] SS2_FD1_5
P3 FD1[4] SS2_FD1_4
P4 FD1[3] SS2_FD1_3
P5 FD1[2] SS2_FD1_2
P6 FD1[1] SS2_FD1_1
P7 FD1[0] SS2_FD1_0
P8 XFRE0 SS2_XFRE0
P9 FD0[7] SS2_FD0_7
P10 FD0[6] SS2_FD0_6
P11 FD0[5] SS2_FD0_5
P12 FD0[4] SS2_FD0_4
P13 FD0[3] SS2_FD0_3
P14 FD0[10] SS2_FD0_10

remark: the following Pad #letter's are not used: I, O, Q, S, X, Z, AI, AO, AQ, AS, AX, AZ