CXD2981GB: Difference between revisions
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(This CELL revision is one of the missing links in between mullions and sherwoods) |
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! Pad # !! Name !! Description | ! Pad # !! Name !! Description | ||
|- | |- | ||
| AV13 || SPI_SI/BE_SPI_DO || < Connected to | | AV13 || SPI_SI/BE_SPI_DO || < Connected to [[Syscon Hardware|Syscon]] pad N2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | ||
|- | |- | ||
| AV23 || THERMAL_OVERLOAD/SYS_THR_ALRT || > Connected to | | AV23 || THERMAL_OVERLOAD/SYS_THR_ALRT || > Connected to [[Syscon Hardware|Syscon]] pad E9 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) through transistor | ||
|- | |- | ||
| AW13 || SPI_EN/BE_SPI_CS || < Connected to | | AW13 || SPI_EN/BE_SPI_CS || < Connected to [[Syscon Hardware|Syscon]] pad M2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | ||
|- | |- | ||
| AW18 || HARD_RESET/BE_RESET_AND || < Connected to | | AW18 || HARD_RESET/BE_RESET_AND || < Connected to [[Syscon Hardware|Syscon]] pad P2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | ||
|- | |- | ||
| AY13 || SPI_CLK/BE_SPI_CLK || < Connected to | | AY13 || SPI_CLK/BE_SPI_CLK || < Connected to [[Syscon Hardware|Syscon]] pad N1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | ||
|- | |- | ||
| BA13 || SPI_SO/BE_SPI_DI || > Connected to | | BA13 || SPI_SO/BE_SPI_DI || > Connected to [[Syscon Hardware|Syscon]] pad M1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) through 47 resistor | ||
|- | |- | ||
| BA17 || ATTENTION/BE_INT || < Connected to | | BA17 || ATTENTION/BE_INT || < Connected to [[Syscon Hardware|Syscon]] pad T2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | ||
|- | |- | ||
| BA19 || POWER_GOOD/BE_POWGOOD || < Connected to | | BA19 || POWER_GOOD/BE_POWGOOD || < Connected to [[Syscon Hardware|Syscon]] pad P1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin <abbr title="Unknown>UNK</abbr> ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | ||
|} | |} | ||
Revision as of 05:53, 2 July 2022
CXD2981GB (CELL BE - 65nm)
65nm variants: CXD2981AGB · CXD2981GB · CXD2989 · CXD2989AGB · CXD2989GB · CXD2990GB · CXD2990AGB
For pinout reference, see : CXD2964GB (CELL BE - 90nm)
| Pad # | Name | Description |
|---|---|---|
| AV13 | SPI_SI/BE_SPI_DO | < Connected to Syscon pad N2 (BGA 200 pads layout), or pin UNK (LQFP 128 pins layout) |
| AV23 | THERMAL_OVERLOAD/SYS_THR_ALRT | > Connected to Syscon pad E9 (BGA 200 pads layout), or pin UNK (LQFP 128 pins layout) through transistor |
| AW13 | SPI_EN/BE_SPI_CS | < Connected to Syscon pad M2 (BGA 200 pads layout), or pin UNK (LQFP 128 pins layout) |
| AW18 | HARD_RESET/BE_RESET_AND | < Connected to Syscon pad P2 (BGA 200 pads layout), or pin UNK (LQFP 128 pins layout) |
| AY13 | SPI_CLK/BE_SPI_CLK | < Connected to Syscon pad N1 (BGA 200 pads layout), or pin UNK (LQFP 128 pins layout) |
| BA13 | SPI_SO/BE_SPI_DI | > Connected to Syscon pad M1 (BGA 200 pads layout), or pin UNK (LQFP 128 pins layout) through 47 resistor |
| BA17 | ATTENTION/BE_INT | < Connected to Syscon pad T2 (BGA 200 pads layout), or pin UNK (LQFP 128 pins layout) |
| BA19 | POWER_GOOD/BE_POWGOOD | < Connected to Syscon pad P1 (BGA 200 pads layout), or pin UNK (LQFP 128 pins layout) |
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