CXD5302DGB: Difference between revisions
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== CXD5302DGB ([[RSX]] - 40nm) == | == CXD5302DGB ([[RSX]] - 40nm) == | ||
<div style="float:right">[[File:RSX CXD5302DGB with HYNIX | <div style="float:right">[[File:RSX CXD5302DGB with HYNIX H5RS5223DFR in CECH-4001B MSX-001.jpg|200px|thumb|left|CXD5302DGB as seen on [[CECH-40xx]] with MSX-001 board]]</div> | ||
40nm variants: [[CXD5300AGB]] · [[CXD5300A1GB]] · [[CXD5301DGB]] · [[CXD5302DGB]] · [[CXD5302A1GB]] | 40nm variants: [[CXD5300AGB]] · [[CXD5300A1GB]] · [[CXD5301DGB]] · [[CXD5302DGB]] · [[CXD5302A1GB]] |
Revision as of 06:54, 20 April 2021
CXD5302DGB (RSX - 40nm)
40nm variants: CXD5300AGB · CXD5300A1GB · CXD5301DGB · CXD5302DGB · CXD5302A1GB
For pinout, see : CXD2971GB (RSX - 90nm)
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