Template:Minimum Firmware Version: Difference between revisions
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! style="text-align:left;" | [[CECH-42xx]]B/C | ! style="text-align:left;" | [[CECH-42xx]]B/C | ||
! style="text-align:left;" | [[PPX-001]] (NOR) | ! style="text-align:left;" | [[PPX-001]]<small>(NOR)</small> | ||
| CokP10 || rowspan="2" | 0x11 || rowspan="2" | 0x11 || rowspan="4" | 4.40 || rowspan="2" | | | CokP10 || rowspan="2" | 0x11 || rowspan="2" | 0x11 || rowspan="4" | 4.40 || rowspan="2" | | ||
|- | |- | ||
! style="text-align:left;" | [[CECH-42xx]]A !! style="text-align:left;" | [[PPX-001]] (eMMC) | ! style="text-align:left;" | [[CECH-42xx]]A !! style="text-align:left;" | [[PPX-001]]<small>(eMMC)</small> | ||
| CokP30 | | CokP30 | ||
|- | |- | ||
! style="text-align:left;" | [[CECH-42xx]]B/C | ! style="text-align:left;" | [[CECH-42xx]]B/C | ||
! style="text-align:left;" | [[PQX-001]] (NOR) | ! style="text-align:left;" | [[PQX-001]]<small>(NOR)</small> | ||
| CokP20 || rowspan="2" | 0x12 || rowspan="2" | 0x12 || rowspan="2" | | | CokP20 || rowspan="2" | 0x12 || rowspan="2" | 0x12 || rowspan="2" | | ||
|- | |- | ||
! style="text-align:left;" | [[CECH-42xx]]A !! style="text-align:left;" | [[PQX-001]] (eMMC) | ! style="text-align:left;" | [[CECH-42xx]]A !! style="text-align:left;" | [[PQX-001]]<small>(eMMC)</small> | ||
| CokP40 | | CokP40 | ||
|- | |- | ||
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! style="text-align:left;" | [[CECH-43xx]]B/C | ! style="text-align:left;" | [[CECH-43xx]]B/C | ||
! style="text-align:left;" | [[RTX-001]] (NOR) | ! style="text-align:left;" | [[RTX-001]]<small>(NOR)</small> | ||
| CokR10 || rowspan="2" | 0x13 || rowspan="2" | 0x15 || rowspan="4" | 4.50 || rowspan="2" | | | CokR10 || rowspan="2" | 0x13 || rowspan="2" | 0x15 || rowspan="4" | 4.50 || rowspan="2" | | ||
|- | |- | ||
! style="text-align:left;" | [[CECH-43xx]]A !! style="text-align:left;" | [[RTX-001]] (eMMC) | ! style="text-align:left;" | [[CECH-43xx]]A !! style="text-align:left;" | [[RTX-001]]<small>(eMMC)</small> | ||
| CokR30 | | CokR30 | ||
|- | |- | ||
! style="text-align:left;" | [[CECH-43xx]]B/C | ! style="text-align:left;" | [[CECH-43xx]]B/C | ||
! style="text-align:left;" | [[REX-001]] (NOR) | ! style="text-align:left;" | [[REX-001]]<small>(NOR)</small> | ||
| CokR20 || rowspan="2" | 0x14 || rowspan="2" | 0x16 || rowspan="2" | | | CokR20 || rowspan="2" | 0x14 || rowspan="2" | 0x16 || rowspan="2" | | ||
|- | |- | ||
! style="text-align:left;" | [[CECH-43xx]]A !! style="text-align:left;" | [[REX-001]] (eMMC) | ! style="text-align:left;" | [[CECH-43xx]]A !! style="text-align:left;" | [[REX-001]]<small>(eMMC)</small> | ||
| CokR40 | | CokR40 | ||
|} | |} | ||
Revision as of 19:43, 11 November 2021
| PS3 Model | Motherboard | Platform ID | Product Sub Code (IDPS 8th byte) |
Chassis ID/Type | Minimum firmware supported by LV1 | Notes |
|---|---|---|---|---|---|---|
| DECR-1000 | TMU-520 | Cyt3.2 | 0x01 | 0x01 | 0.85 | "DEH compatible" |
| CECHAxx | COK-001 | Cok14 | 0x01 | 0x02 (A) | 1.00 | |
| CECHBxx | 0x02 | 0x02 (A') | ||||
| CECHCxx | COK-002 | CokB10 | 0x03 | 0x03 (B) | ||
| CECHExx | 0x04 | 0x03 (B') | ||||
| CECHGxx | SEM-001 | CokC12 | 0x05 | 0x04 (C) | 1.90 | |
| CECHHxx | DIA-001 | CokD10 | 0x06 | 0x05 (D) | 1.97 | 1.95 on < 1.97 |
| CECHJxx | DIA-002 | CokE10 | 0x07 | 0x06 (E) | 2.16 | |
| CECHKxx | ||||||
| CECHLxx | VER-001 | CokF10 | 0x08 | 0x07 (F) | 2.45 | 2.40 on < 2.45 |
| CECHMxx | ||||||
| CECHPxx | ||||||
| CECHQxx | ||||||
| DECR-1400 | DEB-001 | Deb01 | 0x09 | 0x08 | 2.60 | "DEH XB compatible" |
| CECH-20xxA/B | DYN-001 | CokG11 | 0x09 | 0x09 (G) | 2.70 | |
| CECH-21xxA/B | SUR-001 | CokH11 | 0x0A | 0x0A (H) | 3.20 | |
| CECH-25xxA/B | JTP-001 | CokJ13 | 0x0B | 0x0B (J) | 3.40 | |
| JSD-001 | CokJ20 | |||||
| CECH-30xxA/B | KTE-001 | CokK10 | 0x0C | 0x0C (K) | 3.65 | |
| CECH-40xxB/C v1 | ? | ? | 0x0D | 0x0D | 4.15 | |
| CECH-40xxA v1 | ? | ? | 0x0E | 0x0E | 4.20 | |
| CECH-40xxB/C v2 | ? | ? | 0x0F | 0x0F | ||
| Non-retail ? | N?X-001(NOR) ? | CokN20 | 0x10 | 0x10 | ||
| Non-retail ? | N?X-001(eMMC) ? | CokN40 | ||||
| CECH-42xxB/C | ? | ? | 0x11 | 0x11 | 4.40 | |
| CECH-42xxA | ? | ? | 0x12 | 0x12 | ||
| Non-retail ? | Non-retail ? | UnkXXX | 0x8F | 0x13 | 4.31 | uses arcade hdd keys |
| UnkXXX | 0x90 | 0x14 | ||||
| CECH-43xxB/C | ? | ? | 0x13 | 0x15 | 4.50 | |
| CECH-43xxA | ? | ? | 0x14 | 0x16 | ||
| - | - | - | anything else | 0x00 | current version | |
- This table was originated from TemplateTest#Generic Tables. Sadly there is not enough info in wiki yet to know accurately which motherboard belongs to every PS3 superslim model.
- The Product Sub Code value inside the superslim tables on SKU Models seems to be wrong and outdated !!! (but dont change it yet, let's take some time to review this before doing a change so important in wiki).
- List of retail product sub codes by littlebalup/pyps3checker [1]
| PS3 Model | Motherboard | Platform ID | Product Sub Code (IDPS 8th byte) |
Chassis ID/Type | Minimum firmware supported by LV1 | Notes |
|---|---|---|---|---|---|---|
| CECH-42xxB/C | PPX-001(NOR) | CokP10 | 0x11 | 0x11 | 4.40 | |
| CECH-42xxA | PPX-001(eMMC) | CokP30 | ||||
| CECH-42xxB/C | PQX-001(NOR) | CokP20 | 0x12 | 0x12 | ||
| CECH-42xxA | PQX-001(eMMC) | CokP40 | ||||
| CECH-43xxB/C | RTX-001(NOR) | CokR10 | 0x13 | 0x15 | 4.50 | |
| CECH-43xxA | RTX-001(eMMC) | CokR30 | ||||
| CECH-43xxB/C | REX-001(NOR) | CokR20 | 0x14 | 0x16 | ||
| CECH-43xxA | REX-001(eMMC) | CokR40 | ||||