Template:Motherboard Components: Difference between revisions

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  |group2    = [[CELL BE|CELL]]
  |group2    = [[CELL BE|CELL]]
  |list2    = {{Navbox subgroup
  |list2    = {{Navbox subgroup
   |group1  = 90nm
   |group1  = 90 nm
   |list1    = [[CXD2964AGB]]{{dot}}[[CXD2964GB]]
   |list1    = [[CXD2964AGB]]{{dot}}[[CXD2964GB]]
   |group2  = 65nm
   |group2  = 65 nm
   |list2    = [[CXD2981AGB]]{{dot}}[[CXD2981GB]]{{dot}}[[CXD2989]]{{dot}}[[CXD2989AGB]]{{dot}}[[CXD2989GB]]{{dot}}[[CXD2990ABG]]{{dot}}[[CXD2990GB]]{{dot}}[[CXD2990AGB]]
   |list2    = [[CXD2981AGB]]{{dot}}[[CXD2981GB]]{{dot}}[[CXD2989]]{{dot}}[[CXD2989AGB]]{{dot}}[[CXD2989GB]]{{dot}}[[CXD2990ABG]]{{dot}}[[CXD2990GB]]{{dot}}[[CXD2990AGB]]
   |group3  = 45nm
   |group3  = 45 nm
   |list3    = [[CXD2992AGB]]{{dot}}[[CXD2992GB]]{{dot}}[[CXD2996GB]]{{dot}}[[CXD2999AGG]]
   |list3    = [[CXD2992AGB]]{{dot}}[[CXD2992GB]]{{dot}}[[CXD2996GB]]{{dot}}[[CXD2999AGG]]
  }}
  }}
Line 32: Line 32:
  |group3    = [[RSX]]
  |group3    = [[RSX]]
  |list3    = {{Navbox subgroup
  |list3    = {{Navbox subgroup
   |group1  = 90nm
   |group1  = 90 nm
   |list1    = [[CXD2971AGB]]{{dot}}[[CXD2971DGB]]{{dot}}[[CXD2971GB]]{{dot}}[[CXD2971-1GB]]{{dot}}[[CXD2971BGB]]{{dot}}[[CXD297BGB]]
   |list1    = [[CXD2971AGB]]{{dot}}[[CXD2971DGB]]{{dot}}[[CXD2971GB]]{{dot}}[[CXD2971-1GB]]{{dot}}[[CXD2971BGB]]{{dot}}[[CXD297BGB]]
   |group2  = 65nm
   |group2  = 65 nm
   |list2    = [[CXD2982]]{{dot}}[[CXD2982GB]]{{dot}}[[CXD2991GB]]{{dot}}[[CXD2991BGB]]{{dot}}[[CXD2991GGB]]{{dot}}[[CXD2991CGB]]{{dot}}[[CXD2991EGB]]
   |list2    = [[CXD2982]]{{dot}}[[CXD2982GB]]{{dot}}[[CXD2991GB]]{{dot}}[[CXD2991BGB]]{{dot}}[[CXD2991GGB]]{{dot}}[[CXD2991CGB]]{{dot}}[[CXD2991EGB]]
   |group3  = 40nm
   |group3  = 40 nm
   |list3    = [[CXD5300AGB]]{{dot}}[[CXD5300A1GB]]{{dot}}[[CXD5300DGB]]{{dot}}[[CXD5301A1GB]]{{dot}}[[CXD5301DGB]]{{dot}}[[CXD5302A1GB]]{{dot}}[[CXD5302DGB]]
   |list3    = [[CXD5300AGB]]{{dot}}[[CXD5300A1GB]]{{dot}}[[CXD5300DGB]]{{dot}}[[CXD5301A1GB]]{{dot}}[[CXD5301DGB]]{{dot}}[[CXD5302A1GB]]{{dot}}[[CXD5302DGB]]
  }}
  }}


  |group4    = CELL<br>XDR [[RAM]]
  |group4    = CELL [[RAM]]<br>(XDR)
  |list4    = {{Navbox subgroup
  |list4    = {{Navbox subgroup
   |group1  = Elpida
   |group1  = Elpida
Line 50: Line 50:
  }}
  }}


  |group5    = RSX<br>GDDR3 [[RAM]]
  |group5    = RSX [[RAM]]<br>(GDDR3)
  |list5    = {{Navbox subgroup
  |list5    = {{Navbox subgroup
   |group1  = Qimonda
   |group1  = Qimonda
Line 92: Line 92:
   |list3  = [[S29GL128N90TFIR2]]{{dot}}[[S29GL128P90TFIR2]]
   |list3  = [[S29GL128N90TFIR2]]{{dot}}[[S29GL128P90TFIR2]]
   }}
   }}
   |group3  = Others
   |group3  = Others<!--eMMC subgroup needed here-->
   |list3    = {{Navbox subgroup
   |list3    = {{Navbox subgroup
   |group1  = Panasonic
   |group1  = Panasonic

Revision as of 20:41, 16 July 2017