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(Created page with "== MediaCon == Secundairy processor with its own DDR3 DRAM that handles several tasks to offload the main processor/APU: * Network connections (Wireless and GbLAN, in...") |
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= | <div style="float:right">[[File:MediaCon.jpg|200px|thumb|left|Aeolia [[CXD90025G]] <br/> Marvell 88EC120-BNS2<br/> [[SAA-001]]/[[SAB-001]]]]</div> | ||
<gallery> | |||
File:CXD90025G - pic01.jpg|CXD90025G - SCEI and Marvell naming | |||
File:CXD90025G - pic02.jpg|CXD90025G - sideview | |||
File:CXD90025G - pic03.jpg|CXD90025G - 20x20 BGA | |||
File:CXD90025G - pic04.jpg|CXD90025G - MRVL inside die detail | |||
File:CXD90025G_EC120R3-3P0A_151217_diemrk1.jpg|CXD90025G - MRVL inside die detail | |||
File:CXD90025G_EC120R3-3P0A_151217_diemrk2.jpg|CXD90025G - Marvell inside die detail | |||
File:CXD90025G - pic05.jpg|CXD90025G - pic05 - inside die overview | |||
</gallery> | |||
'''Source:''' [https://web.archive.org/web/20150425203314/http://www.chipworks.com/en/technical-competitive-analysis/resources/blog/inside-the-sony-ps4/ PS4 CUH-10XX motherboard decapped by Chipworks], see their section on "Network Co-Processor". | |||
See also [[:File:PS4_-_SAA-001_diagram.png]]. | |||
{{Motherboard Components}} | {{Motherboard Components}} | ||
<noinclude>[[Category:Main]]</noinclude> | <noinclude>[[Category:Main]]</noinclude> | ||
Latest revision as of 20:24, 3 March 2021
CXD90025G - SCEI and Marvell naming
CXD90025G - sideview
CXD90025G - 20x20 BGA
CXD90025G - MRVL inside die detail
CXD90025G - MRVL inside die detail
CXD90025G - Marvell inside die detail
CXD90025G - pic05 - inside die overview
Source: PS4 CUH-10XX motherboard decapped by Chipworks, see their section on "Network Co-Processor".
See also File:PS4_-_SAA-001_diagram.png.
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