CXD90025G: Difference between revisions
Jump to navigation
Jump to search
mNo edit summary |
mNo edit summary |
||
| Line 1: | Line 1: | ||
<div style="float:right"> | <div style="float:right">[[File:01.jpg|200px|thumb|left|CXD90025G as seen on [[SAA-001]]]]</div> | ||
[[File:01.jpg | |||
== SCEI CXD90025G == | == SCEI CXD90025G == | ||
Revision as of 17:45, 20 November 2013
CXD90025G as seen on SAA-001
SCEI CXD90025G
Custom ASIC from Marvell (it even has the 88EC120-BNS2 Marvell naming)
Decapped by Chipworks, see the section on "Network Co-Processor"
Note: It's likely that this chip is way more than simply a "Network Co-Processor"
| ||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||||
