Dipsw: Difference between revisions
Jump to navigation
Jump to search
mNo edit summary |
mNo edit summary |
||
(2 intermediate revisions by one other user not shown) | |||
Line 13: | Line 13: | ||
| 0x02 || IsAssistMode || libSceDipsw.sprx | | 0x02 || IsAssistMode || libSceDipsw.sprx | ||
|- | |- | ||
| 0x10 || | | 0x10 || MemMode? || SceShellCore.elf | ||
|- | |- | ||
| 0x11 || | | 0x11 || MemMode? || SceShellCore.elf | ||
|- | |- | ||
| 0x18 || IsDisableRazor || libSceDipsw.sprx, avbase.elf | | 0x18 || IsDisableRazor || libSceDipsw.sprx, avbase.elf | ||
Line 27: | Line 27: | ||
| 0x3C || ???? || SceShellCore.elf | | 0x3C || ???? || SceShellCore.elf | ||
|- | |- | ||
| 0x40 || | | 0x40 || System CPU cores? || SceSysCore.elf | ||
|- | |- | ||
| 0x41 || | | 0x41 || System CPU cores? || SceSysCore.elf | ||
|- | |- | ||
| 0x4C || ???? || SceSysCore.elf | | 0x4C || ???? || SceSysCore.elf | ||
Line 49: | Line 49: | ||
|} | |} | ||
{{ | |||
{{Reverse Engineering}} | |||
<noinclude>[[Category:Main]]</noinclude> | <noinclude>[[Category:Main]]</noinclude> |
Latest revision as of 18:05, 11 February 2023
There are a total of 256 Dipswitches, labeled from 0 to 255. Here, they will be described
Dipsw Table[edit | edit source]
Number | Description | Used In |
---|---|---|
0x00 | IsDevelopmentMode | libSceDipsw.sprx |
0x01 | ???? | orbis_setip.elf |
0x02 | IsAssistMode | libSceDipsw.sprx |
0x10 | MemMode? | SceShellCore.elf |
0x11 | MemMode? | SceShellCore.elf |
0x18 | IsDisableRazor | libSceDipsw.sprx, avbase.elf |
0x1E | ???? | libSceDipsw.sprx |
0x38 | IsLimitKeepProcess | SceShellCore.elf |
0x39 | Coredump debug? | SceSysCore.elf |
0x3C | ???? | SceShellCore.elf |
0x40 | System CPU cores? | SceSysCore.elf |
0x41 | System CPU cores? | SceSysCore.elf |
0x4C | ???? | SceSysCore.elf |
0x5F | ???? | SceSysCore.elf |
0x60 | ???? | SceSysCore.elf |
0x61 | ???? | SceSysCore.elf |
0x66 | HasCp | SceShellCore.elf |
0x80 | ???? | SceShellCore.elf |
0xFA | ???? | SceSysCore.elf |
0xFB | ???? | SceSysCore.elf |
|