Template:CELL pad layout 90nm: Difference between revisions

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(Trying to fix the visual look of the "sortable" feature added the other day)
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<span style="font-size:175%; font-family:Times New Roman;">Pinout</span>
<span style="font-size:175%; font-family:Times New Roman;">Pinout</span>
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<div style="float:right">[[File:CELL-GRID-bw-cpu-bottomside.png|300px|thumb|left|CELL BE, padlayout<br />CPU view facing BGA<br />A1 marker:northeast/topright]]<br />[[File:CELL-GRID-color-vcc-gnd-spi-pcbview.png|300px|thumb|left|CELL BE, padlayout<br />PCB view facing BGA<br />A1 marker:northwest/topleft]]<br />[[File:CELL-GRID-bw-pcbview.png|300px|thumb|left|CELL BE, padlayout<br />PCB view facing BGA<br />A1 marker:northwest/topleft]]</div>
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<div style="float:right">[[File:CELL-GRID-bw-pcbview.png|300px|thumb|left|CELL BE, padlayout<br>PCB view facing BGA<br>A1 marker:northwest/topleft]]<br>[[File:CELL-GRID-color-vcc-gnd-spi-pcbview.png|300px|thumb|left|CELL BE, padlayout<br>PCB view facing BGA<br>A1 marker:northwest/topleft]]<br>[[File:CELL-GRID-bw-cpu-bottomside.png|300px|thumb|left|CELL BE, padlayout<br>CPU view facing BGA<br>A1 marker:northeast/topright]]<br>[[File:Cell 90nm (1200dpi scan).bmp|300px|thumb|left|CELL 90nm pad layout (CELL view)<br>Pad A1 at bottom-left corner]]</div>
<div style="overflow:auto; <includeonly>height:1200px;</includeonly>">
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<div style="overflow:auto; <includeonly>height:1200px;</includeonly>">
{| class="wikitable mw-datatable sortable" style="width:100%; line-height:1em; font-size:0.9em"
{| class="wikitable mw-datatable sortable" style="width:100%; line-height:120%; font-size:90%"
|+{{captionlinks|CELL pad layout 90nm}}
|+ {{captionlinks|CELL pad layout 41x41}}
! Pad !! colspan="2" | Name !! style="padding:1px" | Type !! Description
! style="width:35px; min-width:35px; padding:0px; text-align:left" | Pad !! style="width:35px; min-width:35px; padding:0px" | Name !! class="unsortable" | Description
|-
! style="border-top:hidden; background-position:50%" | !! style="padding-right:0px" | Internal !! style="padding-right:0px" | External !! style="border-top:hidden; background-position:50%" | !! style="border-top:hidden; background-position:50%" |
|-
| data-sort-value="0A01" | A1 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0A02" | A2 || Y0_DQ1N_5 || Y0_XDR0_DQN10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A03" | A3 || Y0_DQ1N_2 || data-sort-value="Y0_XDR0_DQN06" | Y0_XDR0_DQN6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A04" | A4 || Y0_DQ0N_6 || Y0_XDR0_DQN14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A05" | A5 || Y0_DQ0N_4 || data-sort-value="Y0_XDR0_DQN02" | Y0_XDR0_DQN2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A06" | A6 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0A07" | A7 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="0A08" | A8 || Y0_DQ0N_1 || Y0_XDR1_DQN14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="0A09" | A9 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="0A10" | A10 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="0A11" | A11 || Y0_DQ0_RLOAD || BE_Y0_DQ0_RLOAD || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="0A12" | A12 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A13" | A13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="0A14" | A14 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A15" | A15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="0A16" | A16 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A17" | A17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="0A18" | A18 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A19" | A19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="0A20" | A20 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A21" | A21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="0A22" | A22 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="0A23" | A23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="0A24" | A24 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| A1 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0A25" | A25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A2 || Y0_DQ1N_5 || &gt; Y0_XDR0_DQN10
| data-sort-value="0A26" | A26 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| A3 || Y0_DQ1N_2 || &gt; Y0_XDR0_DQN6
| data-sort-value="0A27" | A27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A4 || Y0_DQ0N_6 || &gt; Y0_XDR0_DQN14
| data-sort-value="0A28" | A28 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| A5 || Y0_DQ0N_4 || &gt; Y0_XDR0_DQN2
| data-sort-value="0A29" | A29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A6 || style="color:white; background-color:#993333;" | Y0_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0A30" | A30 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| A8 || Y0_DQ0N_1 || &gt; Y0_XDR1_DQN14
| data-sort-value="0A31" | A31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A10 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0A32" | A32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| A11 || Y0_DQ0_RLOAD || &lt; BE_Y0_DQ0_RLOAD
| data-sort-value="0A33" | A33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A12 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0A34" | A34 || {{cellcolors|#333|#fff}} RC_XCLK_EN || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A13 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0A35" | A35 || RC_SCAN_CLK2 ||  || {{pin}} || Resistor 470K ohms (R1001) to GND
|-
|-
| A14 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0A36" | A36 || RC_SCAN_CLK1 ||  || {{pin}} || Resistor 470K ohms (R1002) to GND
|-
|-
| A15 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0A37" | A37 || RC_SCAN_CLK0 ||  || {{pin}} || Resistor 470K ohms (R1003) to GND
|-
|-
| A16 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0A38" | A38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A17 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0A39" | A39 || {{cellcolors|#d53|#fff}} RC_VDDIO || data-sort-value="+1.2V_YC_RC_VDDIO" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| A18 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0A40" | A40 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| A19 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0A41" | A41 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A20 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0A99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| A21 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B01" | B1 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| A22 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B02" | B2 || Y0_DQ1_5 || Y0_XDR0_DQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| A23 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B03" | B3 || Y0_DQ1_2 || data-sort-value="Y0_XDR0_DQ06" | Y0_XDR0_DQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| A24 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B04" | B4 || Y0_DQ0_6 || Y0_XDR0_DQ14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| A25 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B05" | B5 || Y0_DQ0_4 || data-sort-value="Y0_XDR0_DQ02" | Y0_XDR0_DQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| A26 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B06" | B6 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| A27 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B07" | B7 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| A28 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B08" | B8 || Y0_DQ0_1 || Y0_XDR1_DQ14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| A29 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B09" | B9 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| A30 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B10" | B10 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| A31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B11" | B11 || {{cellcolors|#d53|#fff}} Y0_DQ0_VREF || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| A32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B12" | B12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A33 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B13" | B13 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| A34 || RC_XCLK_EN || &gt; Ground
| data-sort-value="0B14" | B14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A35 || RC_SCAN_CLK2 || &gt; R1001 470K &gt; Ground
| data-sort-value="0B15" | B15 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| A36 || RC_SCAN_CLK1 || &gt; R1002 470K &gt; Ground
| data-sort-value="0B16" | B16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A37 || RC_SCAN_CLK0 || &gt; R1003 470K &gt; Ground
| data-sort-value="0B17" | B17 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| A38 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B18" | B18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A39 || RC_VDDIO || (Not connected?)
| data-sort-value="0B19" | B19 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| A40 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0B20" | B20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| A41 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B21" | B21 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0B22" | B22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B1 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0B23" | B23 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B2 || Y0_DQ1_5 || &gt; Y0_XDR0_DQ10
| data-sort-value="0B24" | B24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B3 || Y0_DQ1_2 || &gt; Y0_XDR0_DQ6
| data-sort-value="0B25" | B25 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B4 || Y0_DQ0_6 || &gt; Y0_XDR0_DQ14
| data-sort-value="0B26" | B26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B5 || Y0_DQ0_4 || &gt; Y0_XDR0_DQ2
| data-sort-value="0B27" | B27 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B6 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0B28" | B28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B8 || Y0_DQ0_1 || &gt; Y0_XDR1_DQ14
| data-sort-value="0B29" | B29 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B10 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0B30" | B30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B11 || style="color:white; background-color:#993333;" | YC_DQ0_VREF || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0B31" | B31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B12 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B32" | B32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B13 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B33" | B33 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B14 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B34" | B34 || RC_SCAN_CLK3 ||  || {{pin}} || Resistor 470K ohms (R1004) to GND
|-
|-
| B15 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B35" | B35 || TX0_TXN1 || BE_TX0_TXN1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| B16 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B36" | B36 || TX0_TXP1 || BE_TX0_TXP1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| B17 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B37" | B37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B18 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B38" | B38 || TX0_TXN2 || BE_TX0_TXN2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| B19 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B39" | B39 || TX0_TXP2 || BE_TX0_TXP2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| B20 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B40" | B40 || TX0_TXN0 || BE_TX0_TXN0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| B21 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0B41" | B41 || TX0_TXP0 || BE_TX0_TXP0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| B22 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0B99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| B23 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C01" | C1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B24 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C02" | C2 || Y0_DQ1N_6 || data-sort-value="Y0_XDR0_DQN00" | Y0_XDR0_DQN0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| B25 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C03" | C3 || Y0_DQ1N_4 || Y0_XDR0_DQN12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| B26 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C04" | C4 || Y0_DQ0N_0 || data-sort-value="Y0_XDR0_DQN04" | Y0_XDR0_DQN4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| B27 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C05" | C5 || Y0_DQ0N_5 || data-sort-value="Y0_XDR0_DQN08" | Y0_XDR0_DQN8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| B28 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C06" | C6 || Y0_DQ1N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| B29 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C07" | C7 || Y0_DQ1N_3 || Y0_XDR1_DQN10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| B30 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C08" | C8 || Y0_DQ1N_1 || data-sort-value="Y0_XDR1_DQN06" | Y0_XDR1_DQN6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| B31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C09" | C9 || Y0_DQ0N_3 || data-sort-value="Y0_XDR1_DQN02" | Y0_XDR1_DQN2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| B32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C10" | C10 || Y0_DQ0N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| B33 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C11" | C11 || {{cellcolors|#930|#fff}} VDDS1 || BE_VDDS1 || {{pino}} || data-sort-value="Z1.6V" | Connected to [[Regulators#OnSemi_NCP5318FTR2G_.28Two.2FThree.2FFour-Phase_Buck_CPU_Controller.29| Onsemi NCP5318FTR2G]] pin 5 (VFFB) and 11 (VFB)
|-
|-
| B34 || RC_SCAN_CLK3 || &gt; R1004 470K &gt; Ground
| data-sort-value="0C12" | C12 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B35 || TX0_TXN1 || &gt; BE_TX0_TXN1
| data-sort-value="0C13" | C13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B36 || TX0_TXP1 || &gt; BE_TX0_TXP1
| data-sort-value="0C14" | C14 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C15" | C15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B38 || TX0_TXN2 || &gt; BE_TX0_TXN2
| data-sort-value="0C16" | C16 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B39 || TX0_TXP2 || &gt; BE_TX0_TXP2
| data-sort-value="0C17" | C17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| B40 || TX0_TXN0 || &gt; BE_TX0_TXN0
| data-sort-value="0C18" | C18 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| B41 || TX0_TXP0 || &gt; BE_TX0_TXP0
| data-sort-value="0C19" | C19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0C20" | C20 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| C1 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C21" | C21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C2 || Y0_DQ1N_6 || &gt; Y0_XDR0_DQN0
| data-sort-value="0C22" | C22 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| C3 || Y0_DQ1N_4 || &gt; Y0_XDR0_DQN12
| data-sort-value="0C23" | C23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C4 || Y0_DQ0N_0 || &gt; Y0_XDR0_DQN4
| data-sort-value="0C24" | C24 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| C5 || Y0_DQ0N_5 || &gt; Y0_XDR0_DQN8
| data-sort-value="0C25" | C25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C6 || Y0_DQ1N_8 || .
| data-sort-value="0C26" | C26 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| C7 || Y0_DQ1N_3 || &gt; Y0_XDR1_DQN10
| data-sort-value="0C27" | C27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C8 || Y0_DQ1N_1 || &gt; Y0_XDR1_DQN6
| data-sort-value="0C28" | C28 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| C9 || Y0_DQ0N_3 || &gt; Y0_XDR1_DQN2
| data-sort-value="0C29" | C29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C10 || Y0_DQ0N_8 || .
| data-sort-value="0C30" | C30 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| C11 || VDDS1 || &gt; BE_VDDS1
| data-sort-value="0C31" | C31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C12 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C32" | C32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| C13 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C33" | C33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C14 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C34" | C34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C15 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C35" | C35 || TX0_TXN3 || BE_TX0_TXN3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| C16 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C36" | C36 || TX0_TXP3 || BE_TX0_TXP3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| C17 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C37" | C37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C18 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C38" | C38 || TX0_TXCLKN || BE_TX0_TXCLKN || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| C19 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C39" | C39 || TX0_TXCLKP || BE_TX0_TXCLKP || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| C20 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C40" | C40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| C21 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0C41" | C41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| C22 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0C99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| C23 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D01" | D1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C24 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D02" | D2 || Y0_DQ1_6 || data-sort-value="Y0_XDR0_DQ00" | Y0_XDR0_DQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| C25 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D03" | D3 || Y0_DQ1_4 || Y0_XDR0_DQ12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| C26 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D04" | D4 || Y0_DQ0_0 || data-sort-value="Y0_XDR0_DQ04" | Y0_XDR0_DQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| C27 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D05" | D5 || Y0_DQ0_5 || data-sort-value="Y0_XDR0_DQ08" | Y0_XDR0_DQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| C28 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D06" | D6 || Y0_DQ1_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| C29 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D07" | D7 || Y0_DQ1_3 || Y0_XDR1_DQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| C30 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D08" | D8 || Y0_DQ1_1 || data-sort-value="Y0_XDR1_DQ06" | Y0_XDR1_DQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| C31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D09" | D9 || Y0_DQ0_3 || data-sort-value="Y0_XDR1_DQ02" | Y0_XDR1_DQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| C32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D10" | D10 || Y0_DQ0_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| C33 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D11" | D11 || {{cellcolors|#930|#fff}} VDDS2 || BE_VDDS2 || {{pino}} || data-sort-value="Z1.6V" | Connected to [[Regulators#OnSemi_NCP5318FTR2G_.28Two.2FThree.2FFour-Phase_Buck_CPU_Controller.29| Onsemi NCP5318FTR2G]] pin 9 (SGND)
|-
|-
| C34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D12" | D12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C35 || TX0_TXN3 || &gt; BE_TX0_TXN3
| data-sort-value="0D13" | D13 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| C36 || TX0_TXP3 || &gt; BE_TX0_TXP3
| data-sort-value="0D14" | D14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D15" | D15 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| C38 || TX0_TXCLKN || &gt; BE_TX0_TXCLKN
| data-sort-value="0D16" | D16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| C39 || TX0_TXCLKP || &gt; BE_TX0_TXCLKP
| data-sort-value="0D17" | D17 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0D18" | D18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D1 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D19" | D19 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D2 || Y0_DQ1_6 || &gt; Y0_XDR0_DQ0
| data-sort-value="0D20" | D20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D3 || Y0_DQ1_4 || &gt; Y0_XDR0_DQ12
| data-sort-value="0D21" | D21 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D4 || Y0_DQ0_0 || &gt; Y0_XDR0_DQ8
| data-sort-value="0D22" | D22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D5 || Y0_DQ0_5 || &gt; Y0_XDR0_DQ8
| data-sort-value="0D23" | D23 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D6 || Y0_DQ1_8 || .
| data-sort-value="0D24" | D24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D7 || Y0_DQ1_3 || &gt; Y0_XDR1_DQ10
| data-sort-value="0D25" | D25 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D8 || Y0_DQ1_1 || &gt; Y0_XDR1_DQ6
| data-sort-value="0D26" | D26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D9 || Y0_DQ0_3 || &gt; Y0_XDR1_DQ2
| data-sort-value="0D27" | D27 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D10 || Y0_DQ0_8 || .
| data-sort-value="0D28" | D28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D11 || VDDS2 || &gt; BE_VDDS2
| data-sort-value="0D29" | D29 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D12 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D30" | D30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D13 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D31" | D31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D14 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D32" | D32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D15 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D33" | D33 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D16 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D34" | D34 || {{cellcolors|#333|#fff}} TX0_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D17 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D35" | D35 || TX0_TXN5 || BE_TX0_TXN5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| D18 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D36" | D36 || TX0_TXP5 || BE_TX0_TXP5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| D19 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D37" | D37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| D20 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D38" | D38 || TX0_TXN6 || BE_TX0_TXN6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| D21 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D39" | D39 || TX0_TXP6 || BE_TX0_TXP6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| D22 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D40" | D40 || TX0_TXN4 || BE_TX0_TXN4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| D23 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0D41" | D41 || TX0_TXP4 || BE_TX0_TXP4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| D24 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0D99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| D25 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E01" | E1 || Y0_RQ_RST || BE_Y0_RQ_RST || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad C15. Serial reset
|-
|-
| D26 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E02" | E2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D27 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E03" | E3 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| D28 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E04" | E4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D29 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E05" | E5 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| D30 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E06" | E6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E07" | E7 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| D32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E08" | E8 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| D33 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E09" | E9 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D34 || style="color:white; background-color:#333333;" | TX0_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E10" | E10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D35 || TX0_TXN5 || &gt; BE_TX0_TXN5
| data-sort-value="0E11" | E11 || {{cellcolors|#333|#fff}} VDDE || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D36 || TX0_TXP5 || &gt; BE_TX0_TXP5
| data-sort-value="0E12" | E12 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0E13" | E13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D38 || TX0_TXN6 || &gt; BE_TX0_TXN6
| data-sort-value="0E14" | E14 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D39 || TX0_TXP6 || &gt; BE_TX0_TXP6
| data-sort-value="0E15" | E15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| D40 || TX0_TXN4 || &gt; BE_TX0_TXN4
| data-sort-value="0E16" | E16 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| D41 || TX0_TXP4 || &gt; BE_TX0_TXP4
| data-sort-value="0E17" | E17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0E18" | E18 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| E1 || Y0_RQ_RST || &gt; BE_Y0_RQ_RST
| data-sort-value="0E19" | E19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E2 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E20" | E20 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| E3 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0E21" | E21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E4 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E22" | E22 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| E5 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0E23" | E23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E24" | E24 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| E7 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0E25" | E25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E8 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0E26" | E26 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| E9 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E27" | E27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E28" | E28 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| E11 || VDDE || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E29" | E29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E12 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E30" | E30 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| E13 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E31" | E31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E14 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E32" | E32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| E15 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E33" | E33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E16 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E34" | E34 || {{cellcolors|#c33|#fff}} TX0_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
|-
| E17 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E35" | E35 || RX0_RXP7 || BE_RX0_RXP7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| E18 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E36" | E36 || RX0_RXN7 || BE_RX0_RXN7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| E19 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E37" | E37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| E20 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E38" | E38 || TX0_TXN7 || BE_TX0_TXN7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| E21 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E39" | E39 || TX0_TXP7 || BE_TX0_TXP7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| E22 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E40" | E40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| E23 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0E41" | E41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| E24 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0E99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| E25 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F01" | F1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E26 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F02" | F2 || data-sort-value="Y0_RQ00" {{cellcolors|#ff0}} Y0_RQ0 || data-sort-value="BE_Y0_RQ00" | BE_Y0_RQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad C3. 12-bit request/command bus
|-
|-
| E27 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F03" | F3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E28 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F04" | F4 || data-sort-value="Y0_RQ01" {{cellcolors|#ff0}} Y0_RQ1 || data-sort-value="BE_Y0_RQ01" | BE_Y0_RQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D13. 12-bit request/command bus
|-
|-
| E29 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F05" | F5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E30 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F06" | F6 || Y0_RQ_SRD || BE_Y0_RQ_SRD || {{pini}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad C16. Serial data in/out ?
|-
|-
| E31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F07" | F7 || Y0_DQ1N_7 || data-sort-value="Y0_XDR1_DQN00" | Y0_XDR1_DQN0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| E32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F08" | F8 || Y0_DQ1N_0 || Y0_XDR1_DQN12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| E33 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F09" | F9 || Y0_DQ0N_7 || data-sort-value="Y0_XDR1_DQN04" | Y0_XDR1_DQN4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| E34 || style="color:white; background-color:#CC3333;" | TX0_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0F10" | F10 || Y0_DQ0N_2 || data-sort-value="Y0_XDR1_DQN08" | Y0_XDR1_DQN8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| E35 || RX0_RXP7 || &lt; BE_RX0_RXP7
| data-sort-value="0F11" | F11 || {{cellcolors|#333|#fff}} YC_SCAN_CLK4 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E36 || RX0_RXN7 || &lt; BE_RX0_RXN7
| data-sort-value="0F12" | F12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E37 || style="color:white; background-color:#993333;" | RC0_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0F13" | F13 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| E38 || TX0_TXN7 || &lt; BE_TX0_TXN7
| data-sort-value="0F14" | F14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| E39 || TX0_TXP7 || &lt; BE_TX0_TXP7
| data-sort-value="0F15" | F15 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0F16" | F16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F1 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F17" | F17 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F2 || Y0_RQ0 || &gt; BE_Y0_RQ0
| data-sort-value="0F18" | F18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F3 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F19" | F19 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F4 || Y0_RQ1 || &gt; BE_Y0_RQ1
| data-sort-value="0F20" | F20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F21" | F21 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F6 || Y0_RQ_SRD || &lt; BE_Y0_RQ_SRD
| data-sort-value="0F22" | F22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F7 || Y0_DQ1N_7 || &gt; Y0_XDR1_DQN0
| data-sort-value="0F23" | F23 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F8 || Y0_DQ1N_0 || &gt; Y0_XDR1_DQN12
| data-sort-value="0F24" | F24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F9 || Y0_DQ0N_7 || &gt; Y0_XDR1_DQN1
| data-sort-value="0F25" | F25 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F10 || Y0_DQ0N_2 || &gt; Y0_XDR1_DQN8
| data-sort-value="0F26" | F26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F11 || YC_SCAN_CLK4 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F27" | F27 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F12 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F28" | F28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F13 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F29" | F29 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F14 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F30" | F30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F15 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F31" | F31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F16 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F32" | F32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F17 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F33" | F33 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F18 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F34" | F34 || {{cellcolors|#c33|#fff}} RX0_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
|-
| F19 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F35" | F35 || RX0_RXP5 || BE_RX0_RXP5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| F20 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F36" | F36 || RX0_RXN5 || BE_RX0_RXN5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| F21 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F37" | F37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F22 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F38" | F38 || RX0_RXP4 || BE_RX0_RXP4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| F23 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F39" | F39 || RX0_RXN4 || BE_RX0_RXN4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| F24 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F40" | F40 || RX0_RXP6 || BE_RX0_RXP6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| F25 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0F41" | F41 || RX0_RXN6 || BE_RX0_RXN6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| F26 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0F99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| F27 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G01" | G1 || data-sort-value="Y0_RQ03" {{cellcolors|#ff0}} Y0_RQ3 || data-sort-value="BE_Y0_RQ03" | BE_Y0_RQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D4. 12-bit request/command bus
|-
|-
| F28 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G02" | G2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F29 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G03" | G3 || data-sort-value="Y0_RQ05" {{cellcolors|#ff0}} Y0_RQ5 || data-sort-value="BE_Y0_RQ05" | BE_Y0_RQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad E14. 12-bit request/command bus
|-
|-
| F30 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G04" | G4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G05" | G5 || data-sort-value="Y0_RQ02" {{cellcolors|#ff0}} Y0_RQ2 || data-sort-value="BE_Y0_RQ02" | BE_Y0_RQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D14. 12-bit request/command bus
|-
|-
| F32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G06" | G6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F33 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G07" | G7 || Y0_DQ1_7 || data-sort-value="Y0_XDR1_DQ00" | Y0_XDR1_DQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| F34 || style="color:white; background-color:#CC3333;" | RX0_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0G08" | G8 || Y0_DQ1_0 || Y0_XDR1_DQ12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| F35 || RX0_RXP5 || &lt; BE_RX0_RXP5
| data-sort-value="0G09" | G9 || Y0_DQ0_7 || data-sort-value="Y0_XDR1_DQ04" | Y0_XDR1_DQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| F36 || RX0_RXN5 || &lt; BE_RX0_RXN5
| data-sort-value="0G10" | G10 || Y0_DQ0_2 || data-sort-value="Y0_XDR1_DQ08" | Y0_XDR1_DQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| F37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G11" | G11 || {{cellcolors|#333|#fff}} YC_SCAN_CLK3 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F38 || RX0_RXP4 || &lt; BE_RX0_RXP4
| data-sort-value="0G12" | G12 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F39 || RX0_RXN4 || &lt; BE_RX0_RXN4
| data-sort-value="0G13" | G13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| F40 || RX0_RXP6 || &lt; BE_RX0_RXP6
| data-sort-value="0G14" | G14 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| F41 || RX0_RXN6 || &lt; BE_RX0_RXN6
| data-sort-value="0G15" | G15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0G16" | G16 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| G1 || Y0_RQ3 || &gt; BE_Y0_RQ3
| data-sort-value="0G17" | G17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G2 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G18" | G18 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| G3 || Y0_RQ5 || &gt; BE_Y0_RQ5
| data-sort-value="0G19" | G19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G4 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G20" | G20 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| G5 || Y0_RQ2 || &gt; BE_Y0_RQ2
| data-sort-value="0G21" | G21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G22" | G22 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| G7 || Y0_DQ1_7 || &gt; Y0_XDR1_DQ0
| data-sort-value="0G23" | G23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G8 || Y0_DQ1_0 || &gt; Y0_XDR1_DQ12
| data-sort-value="0G24" | G24 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| G9 || Y0_DQ0_7 || &gt; Y0_XDR1_DQ4
| data-sort-value="0G25" | G25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G10 || Y0_DQ0_2 || &gt; Y0_XDR1_DQ8
| data-sort-value="0G26" | G26 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| G11 || YC_SCAN_CLK3 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G27" | G27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G12 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G28" | G28 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| G13 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G29" | G29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G14 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G30" | G30 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| G15 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G31" | G31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G16 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G32" | G32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| G17 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G33" | G33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G18 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G34" | G34 || {{cellcolors|#333|#fff}} RX0_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G19 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G35" | G35 || RX0_RXP3 || BE_RX0_RXP3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| G20 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G36" | G36 || RX0_RXN3 || BE_RX0_RXN3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| G21 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G37" | G37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G22 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G38" | G38 || RX0_RXCLKP || BE_RX0_RXCLKP || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| G23 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G39" | G39 || RX0_RXCLKN || BE_RX0_RXCLKN || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| G24 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G40" | G40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| G25 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0G41" | G41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| G26 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0G99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| G27 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H01" | H1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G28 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H02" | H2 || data-sort-value="Y0_RQ04" {{cellcolors|#ff0}} Y0_RQ4 || data-sort-value="BE_Y0_RQ04" | BE_Y0_RQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D3. 12-bit request/command bus
|-
|-
| G29 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H03" | H3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G30 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H04" | H4 || data-sort-value="Y0_RQ06" {{cellcolors|#ff0}} Y0_RQ6 || data-sort-value="BE_Y0_RQ06" | BE_Y0_RQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G14. 12-bit request/command bus
|-
|-
| G31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H05" | H5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H06" | H6 || Y0_RQ_VREF || BE_Y0_RQ_VREF || {{pini}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) power circuit
|-
|-
| G33 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H07" | H7 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G34 || style="color:white; background-color:#333333;" | RX0_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H08" | H8 || {{cellcolors|#c33|#fff}} Y0_DQ0_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
|-
| G35 || RX0_RXP3 || &lt; BE_RX0_RXP3
| data-sort-value="0H09" | H9 || {{cellcolors|#333|#fff}} Y0_DQ0_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G36 || RX0_RXN3 || &lt; BE_RX0_RXN3
| data-sort-value="0H10" | H10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H11" | H11 || {{cellcolors|#333|#fff}} YC_SCAN_CLK2 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G38 || RX0_RXCLKP || &lt; BE_RX0_RXCLKP
| data-sort-value="0H12" | H12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| G39 || RX0_RXCLKN || &lt; BE_RX0_RXCLKN
| data-sort-value="0H13" | H13 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0H14" | H14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H1 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H15" | H15 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H2 || Y0_RQ4 || &gt; BE_Y0_RQ4
| data-sort-value="0H16" | H16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H3 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H17" | H17 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H4 || Y0_RQ6 || &gt; BE_Y0_RQ6
| data-sort-value="0H18" | H18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H19" | H19 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H6 || Y0_RQ_VREF || &lt; BE_Y0_RQ_VREG
| data-sort-value="0H20" | H20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H7 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H21" | H21 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H8 || style="color:white; background-color:#CC3333;" | Y0_DQ0_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0H22" | H22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H9 || style="color:white; background-color:#333333;" | Y0_DQ0_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H23" | H23 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H24" | H24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H11 || YC_SCAN_CLK2 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H25" | H25 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H12 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H26" | H26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H13 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H27" | H27 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H14 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H28" | H28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H15 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H29" | H29 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H16 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H30" | H30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H17 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H31" | H31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H18 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H32" | H32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H19 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H33" | H33 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H20 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H34" | H34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H21 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H35" | H35 || RX0_RXP1 || BE_RX0_RXP1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| H22 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H36" | H36 || RX0_RXN1 || BE_RX0_RXN1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| H23 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H37" | H37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| H24 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H38" | H38 || RX0_RXP0 || BE_RX0_RXP0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| H25 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H39" | H39 || RX0_RXN0 || BE_RX0_RXN0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| H26 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H40" | H40 || RX0_RXP2 || BE_RX0_RXP2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| H27 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0H41" | H41 || RX0_RXN2 || BE_RX0_RXN2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| H28 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0H99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| H29 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J01" | J1 || Y0_RQ_CTMP || BE_Y0_RQ_CTM || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] clock generator (IC5002) pin 24 (Clock To Master)
|-
|-
| H30 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J02" | J2 || Y0_RQ_CTMN || BE_Y0_RQ_CTMN || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] clock generator (IC5002) pin 25 (Clock To Master)
|-
|-
| H31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J03" | J3 || data-sort-value="Y0_RQ07" {{cellcolors|#ff0}} Y0_RQ7 || data-sort-value="BE_Y0_RQ07" | BE_Y0_RQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G13. 12-bit request/command bus
|-
|-
| H32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J04" | J4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H33 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J05" | J5 || data-sort-value="Y0_RQ08" {{cellcolors|#ff0}} Y0_RQ8 || data-sort-value="BE_Y0_RQ08" | BE_Y0_RQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H14. 12-bit request/command bus
|-
|-
| H34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J06" | J6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H35 || RX0_RXP1 || &lt; BE_RX0_RXP1
| data-sort-value="0J07" | J7 || Y0_DQC_ROLREF || BE_Y0_DQC_ROLREF || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
|-
| H36 || RX0_RXN1 || &lt; BE_RX0_RXN1
| data-sort-value="0J08" | J8 || {{cellcolors|#c33|#fff}} Y0_DQ1_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
|-
| H37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0J09" | J9 || {{cellcolors|#333|#fff}} NC_OPEN25 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H38 || RX0_RXP0 || &lt; BE_RX0_RXP0
| data-sort-value="0J10" | J10 || {{cellcolors|#333|#fff}} YC_SCAN_CLK0 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H39 || RX0_RXN0 || &lt; BE_RX0_RXN0
| data-sort-value="0J11" | J11 || {{cellcolors|#333|#fff}} YC_SCAN_CLK1 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| H40 || RX0_RXP2 || &lt; BE_RX0_RXP2
| data-sort-value="0J12" | J12 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| H41 || RX0_RXN2 || &lt; BE_RX0_RXN2
| data-sort-value="0J13" | J13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0J14" | J14 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J1 || Y0_RQ_CTMP || &lt; BE_Y0_RQ_CTM
| data-sort-value="0J15" | J15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J2 || Y0_RQ_CTMN || &lt; BE_Y0_RQ_CTMN
| data-sort-value="0J16" | J16 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J3 || Y0_RQ7 || &gt; BE_Y0_RQ7
| data-sort-value="0J17" | J17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J4 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J18" | J18 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J5 || Y0_RQ8 || &gt; BE_Y0_RQ8
| data-sort-value="0J19" | J19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J20" | J20 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J7 || Y0_DQC_ROLREF || &lt; BE_Y0_DQC_ROLREF
| data-sort-value="0J21" | J21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J8 || style="color:white; background-color:#CC3333;" | Y0_DQ1_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0J22" | J22 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J9 || NC_OPEN25 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J23" | J23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J10 || YC_SCAN_CLK0 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J24" | J24 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J11 || YC_SCAN_CLK1 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J25" | J25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J12 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J26" | J26 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J13 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J27" | J27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J14 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J28" | J28 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J15 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J29" | J29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J16 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J30" | J30 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J17 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J31" | J31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J18 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J32" | J32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| J19 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J33" | J33 || {{cellcolors|#333|#fff}} NC_OPEN50 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J20 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J34" | J34 || RC_VOLGND0 || BE_RC_VOLGND0 || {{pini}} || Capacitor 0.1uf/10v to +1.2V_YC_RC_VDDIO
|-
|-
| J21 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J35" | J35 || NT_TST03 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| J22 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J36" | J36 || RC_VOLREF0 || BE_RC_VOLREF0 || {{pini}} || Resistor 56.2 ohms to +1.2V_YC_RC_VDDIO
|-
|-
| J23 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J37" | J37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| J24 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J38" | J38 || {{cellcolors|#d53|#fff}} RC_ROLREF0 || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| J25 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J39" | J39 || RC_RLOAD0 || BE_RC_RLOAD0 || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
|-
| J26 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J40" | J40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| J27 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0J41" | J41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| J28 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0J99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| J29 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K01" | K1 || Y0_RQ_CFMN || BE_Y0_RQ_CFMN || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G4. (Clock From Master)
|-
|-
| J30 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K02" | K2 || Y0_RQ_CFMP || BE_Y0_RQ_CFM || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G3. (Clock From Master)
|-
|-
| J31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K03" | K3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K04" | K4 || data-sort-value="Y0_RQ09" {{cellcolors|#ff0}} Y0_RQ9 || data-sort-value="BE_Y0_RQ09" | BE_Y0_RQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H13. 12-bit request/command bus
|-
|-
| J33 || NC_OPEN50 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K05" | K5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J34 || RC_VOLGND0 || &lt; BE_RC_VOLGND0
| data-sort-value="0K06" | K6 || Y0_RQ_SCK || BE_Y0_RQ_SCK || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad J15. Serial clock
|-
|-
| J35 || NT_TST03 || .
| data-sort-value="0K07" | K7 || Y0_DQC_VOLGND || BE_Y0_DQC_VOLGND || {{pini}} || Capacitor 0.1uf/10v to +1.2V_YC_RC_VDDIO
|-
|-
| J36 || RC_VOLREF0 || &lt; BE_RC_VOLREF0
| data-sort-value="0K08" | K8 || {{cellcolors|#333|#fff}} Y0_DQ1_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0K09" | K9 || {{cellcolors|#333|#fff}} NC_OPEN24 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J38 || style="color:white; background-color:#993333;" | RC_ROLREF0 || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0K10" | K10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| J39 || RC_RLOAD0 || &lt; BE_RC_RLOAD0
| data-sort-value="0K11" | K11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0K12" | K12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K1 || Y0_RQ_CFMN || &gt; BE_Y0_RQ_CFMN
| data-sort-value="0K13" | K13 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K2 || Y0_RQ_CFMP || &gt; BE_Y0_RQ_CFM
| data-sort-value="0K14" | K14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K3 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K15" | K15 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K4 || Y0_RQ9 || &gt; BE_Y0_RQ9
| data-sort-value="0K16" | K16 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K17" | K17 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K6 || Y0_RQ_SCK || &gt; BE_Y0_SCK
| data-sort-value="0K18" | K18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K7 || Y0_DQC_VOLGND || &lt; BE_Y0_DQC_VOLGND
| data-sort-value="0K19" | K19 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K8 || style="color:white; background-color:#333333;" | Y0_DQ1_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K20" | K20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K9 || NC_OPEN24 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K21" | K21 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K22" | K22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K23" | K23 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K12 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K24" | K24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K13 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K25" | K25 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K14 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K26" | K26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K15 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K27" | K27 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K16 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K28" | K28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K17 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K29" | K29 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K18 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K30" | K30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K19 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K31" | K31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K20 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K32" | K32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K21 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K33" | K33 || {{cellcolors|#333|#fff}} NC_OPEN49 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K22 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K34" | K34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K23 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K35" | K35 || TX1_TXN1 || BE_TX1_TXN1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| K24 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K36" | K36 || TX1_TXP1 || BE_TX1_TXP1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| K25 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K37" | K37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K26 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K38" | K38 || TX1_TXN2 || BE_TX1_TXN2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| K27 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K39" | K39 || TX1_TXP2 || BE_TX1_TXP2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| K28 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K40" | K40 || TX1_TXN0 || BE_TX1_TXN0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| K29 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0K41" | K41 || TX1_TXP0 || BE_TX1_TXP0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| K30 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0K99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| K31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L01" | L1 || {{cellcolors|#ff0}} Y0_RQ10 || BE_Y0_RQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H3. 12-bit request/command bus
|-
|-
| K32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L02" | L2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K33 || NC_OPEN49 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L03" | L3 || {{cellcolors|#ff0}} Y0_RQ11 || BE_Y0_RQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H4. 12-bit request/command bus
|-
|-
| K34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L04" | L4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K35 || TX1_TXN1 || &gt; BE_TX1_TXN1
| data-sort-value="0L05" | L5 || Y0_RQ_CMD || BE_Y0_RQ_CMD || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad J14. Serial commands
|-
|-
| K36 || TX1_TXP1 || &gt; BE_TX1_TXP1
| data-sort-value="0L06" | L6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L07" | L7 || Y0_DQC_VOLREF || BE_Y0_DQC_VOLREF || {{pini}} || Resistor 95.3 ohms to +1.2V_YC_RC_VDDIO
|-
|-
| K38 || TX1_TXN2 || &gt; BE_TX1_TXN2
| data-sort-value="0L08" | L8 || {{cellcolors|#c33|#fff}} Y0_RQ_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
|-
| K39 || TX1_TXP2 || &gt; BE_TX1_TXP2
| data-sort-value="0L09" | L9 || {{cellcolors|#333|#fff}} NC_OPEN23 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| K40 || TX1_TXN0 || &gt; BE_TX1_TXN0
| data-sort-value="0L10" | L10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| K41 || TX1_TXP0 || &gt; BE_TX1_TXP0
| data-sort-value="0L11" | L11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0L12" | L12 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L1 || Y0_RQ10 || &gt; BE_Y0_RQ10
| data-sort-value="0L13" | L13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L2 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L14" | L14 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L3 || Y0_RQ11 || &gt; BE_Y0_RQ11
| data-sort-value="0L15" | L15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L4 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L16" | L16 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L5 || Y0_RQ_CMD || &gt; BE_Y0_RQ_CMD
| data-sort-value="0L17" | L17 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L18" | L18 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L7 || Y0_DQC_VOLREF || &lt; BE_Y0_DQC_VOLREF
| data-sort-value="0L19" | L19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L8 || style="color:white; background-color:#CC3333;" | Y0_RQ0_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0L20" | L20 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L9 || NC_OPEN23 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L21" | L21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L22" | L22 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L23" | L23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L12 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L24" | L24 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L13 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L25" | L25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L14 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L26" | L26 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L15 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L27" | L27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L16 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L28" | L28 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L17 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L29" | L29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L18 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L30" | L30 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L19 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L31" | L31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L20 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L32" | L32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| L21 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L33" | L33 || {{cellcolors|#333|#fff}} NC_OPEN48 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L22 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L34" | L34 || {{cellcolors|#333|#fff}} TX1_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L23 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L35" | L35 || TX1_TXN3 || BE_TX1_TXN3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| L24 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L36" | L36 || TX1_TXP3 || BE_TX1_TXP3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| L25 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L37" | L37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L26 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L38" | L38 || TX1_TXCLKN || BE_TX1_TXCLKN || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| L27 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L39" | L39 || TX1_TXCLKP || BE_TX1_TXCLKP || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| L28 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L40" | L40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| L29 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0L41" | L41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| L30 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0L99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| L31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M01" | M1 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| L32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0M02" | M2 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| L33 || NC_OPEN48 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M03" | M3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L34 || style="color:white; background-color:#333333;" | TX1_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M04" | M4 || Y0_DQ2_RLOAD || BE_Y0_DQ2_RLOAD || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
|-
| L35 || TX1_TXN3 || &gt; BE_TX1_TXN3
| data-sort-value="0M05" | M5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L36 || TX1_TXP3 || &gt; BE_TX1_TXP3
| data-sort-value="0M06" | M6 || {{cellcolors|#d53|#fff}} Y0_DQ2_VREF || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| L37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M07" | M7 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L38 || TX1_TXCLKN || &gt; BE_TX1_TXCLKN
| data-sort-value="0M08" | M8 || {{cellcolors|#333|#fff}} Y0_RQ_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| L39 || TX1_TXCLKP || &gt; BE_TX1_TXCLKP
| data-sort-value="0M09" | M9 || {{cellcolors|#333|#fff}} NC_OPEN22 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0M10" | M10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| M1 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0M11" | M11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| M2 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0M12" | M12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M3 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M13" | M13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M4 || Y0_DQ2_RLOAD || &lt; BE_Y0_DQ2_RLOAD
| data-sort-value="0M14" | M14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M15" | M15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M6 || style="color:white; background-color:#993333;" | Y0_DQ2_VREF || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0M16" | M16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M7 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M17" | M17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M8 || style="color:white; background-color:#333333;" | Y0_RQ_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M18" | M18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M9 || NC_OPEN22 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M19" | M19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M20" | M20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0M21" | M21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M12<br />bis<br />M30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0M22" | M22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0M23" | M23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M24" | M24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M33 || NC_OPEN47 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M25" | M25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M34 || style="color:white; background-color:#CC3333;" | TX1_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0M26" | M26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M35 || TX1_TXN5 || &gt; BE_TX1_TXN5
| data-sort-value="0M27" | M27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M36 || TX1_TXP5 || &gt; BE_TX1_TXP5
| data-sort-value="0M28" | M28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0M29" | M29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M38 || TX1_TXN6 || &gt; BE_TX1_TXN6
| data-sort-value="0M30" | M30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| M39 || TX1_TXP6 || &gt; BE_TX1_TXP6
| data-sort-value="0M31" | M31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| M40 || TX1_TXN4 || &gt; BE_TX1_TXN4
| data-sort-value="0M32" | M32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| M41 || TX1_TXP4 || &gt; BE_TX1_TXP4
| data-sort-value="0M33" | M33 || {{cellcolors|#333|#fff}} NC_OPEN47 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0M34" | M34 || {{cellcolors|#c33|#fff}} TX1_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
|-
| N3 || Y0_DQ2_4 || &gt; YO_XDR0_DQ11
| data-sort-value="0M35" | M35 || TX1_TXN5 || BE_TX1_TXN5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| N4 || Y0_DQ2N_4 || &gt; YO_XDR0_DQN11
| data-sort-value="0M36" | M36 || TX1_TXP5 || BE_TX1_TXP5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| N5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M37" | M37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| N6 || Y0_DQ2_1 || &gt; YO_XDR0_DQ1
| data-sort-value="0M38" | M38 || TX1_TXN6 || BE_TX1_TXN6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| N7 || Y0_DQ2N_1 || &gt; YO_XDR0_DQN1
| data-sort-value="0M39" | M39 || TX1_TXP6 || BE_TX1_TXP6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| N8 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M40" | M40 || TX1_TXN4 || BE_TX1_TXN4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| N9 || NC_OPEN21 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0M41" | M41 || TX1_TXP4 || BE_TX1_TXP4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| N10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0M99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| N11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N01" | N1 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| N12<br />bis<br />M30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0N02" | N2 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| N31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N03" | N3 || Y0_DQ2_4 || Y0_XDR0_DQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| N32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0N04" | N4 || Y0_DQ2N_4 || Y0_XDR0_DQN11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| N33 || NC_OPEN46 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N05" | N5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| N34 || style="color:white; background-color:#CC3333;" | RX1_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0N06" | N6 || Y0_DQ2_1 || data-sort-value="Y0_XDR0_DQ01" | Y0_XDR0_DQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| N35 || RX1_RXP7 || &lt; BE_RX1_RXP7
| data-sort-value="0N07" | N7 || Y0_DQ2N_1 || data-sort-value="Y0_XDR0_DQN01" | Y0_XDR0_DQN1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| N36 || RX1_RXN7 || &lt; BE_RX1_RXN7
| data-sort-value="0N08" | N8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| N37 || style="color:white; background-color:#993333;" | RC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0N09" | N9 || {{cellcolors|#333|#fff}} NC_OPEN21 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| N38 || TX1_TXN7 || &gt; BE_TX1_TXN7
| data-sort-value="0N10" | N10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| N39 || TX1_TXP7 || &gt; BE_TX1_TXP7
| data-sort-value="0N11" | N11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0N12" | N12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P1 || Y0_DQ2_3 || &gt; Y0_XDR0_DQ7
| data-sort-value="0N13" | N13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P2 || Y0_DQ2N_3 || &gt; Y0_XDR0_DQN7
| data-sort-value="0N14" | N14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P3 || Y0_DQ2_6 || &gt; Y0_XDR0_DQ15
| data-sort-value="0N15" | N15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P4 || Y0_DQ2N_6 || &gt; Y0_XDR0_DQN15
| data-sort-value="0N16" | N16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P5 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0N17" | N17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P6 || Y0_DQ2_5 || &gt; Y0_XDR0_DQ13
| data-sort-value="0N18" | N18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P7 || Y0_DQ2N_5 || &gt; Y0_XDR0_DQN13
| data-sort-value="0N19" | N19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P8 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0N20" | N20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P9 || NC_OPEN20 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N21" | N21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N22" | N22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0N23" | N23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P12<br />bis<br />P30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0N24" | N24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0N25" | N25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N26" | N26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P33 || NC_OPEN45 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N27" | N27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P34 || style="color:white; background-color:#333333;" | RX1_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N28" | N28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P35 || RX1_RXP5 || &lt; BE_RX1_RXP5
| data-sort-value="0N29" | N29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P36 || RX1_RXN5 || &lt; BE_RX1_RXN5
| data-sort-value="0N30" | N30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| P37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N31" | N31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| P38 || RX1_RXP4 || &lt; BE_RX1_RXP4
| data-sort-value="0N32" | N32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| P39 || RX1_RXN4 || &lt; BE_RX1_RXN4
| data-sort-value="0N33" | N33 || {{cellcolors|#333|#fff}} NC_OPEN46 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| P40 || RX1_RXP6 || &lt; BE_RX1_RXP6
| data-sort-value="0N34" | N34 || {{cellcolors|#c33|#fff}} RX1_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
|-
| P41 || RX1_RXN6 || &lt; BE_RX1_RXN6
| data-sort-value="0N35" | N35 || RX1_RXP7 || BE_RX1_RXP7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0N36" | N36 || RX1_RXN7 || BE_RX1_RXN7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| R3 || Y0_DQ3_4 || &gt; Y0_XDR0_DQ3
| data-sort-value="0N37" | N37 || {{cellcolors|#d53|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| R4 || Y0_DQ3N_4 || &gt; Y0_XDR0_DQN3
| data-sort-value="0N38" | N38 || TX1_TXN7 || BE_TX1_TXN7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| R5 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0N39" | N39 || TX1_TXP7 || BE_TX1_TXP7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| R6 || Y0_DQ2_0 || &gt; Y0_XDR0_DQ5
| data-sort-value="0N40" | N40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| R7 || Y0_DQ2N_0 || &gt; Y0_XDR0_DQN5
| data-sort-value="0N41" | N41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| R8 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0N99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| R9 || NC_OPEN19 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P01" | P1 || Y0_DQ2_3 || data-sort-value="Y0_XDR0_DQ07" | Y0_XDR0_DQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| R10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0P02" | P2 || Y0_DQ2N_3 || data-sort-value="Y0_XDR0_DQN07" | Y0_XDR0_DQN7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| R11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P03" | P3 || Y0_DQ2_6 || Y0_XDR0_DQ15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| R12<br />bis<br />R30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0P04" | P4 || Y0_DQ2N_6 || Y0_XDR0_DQN15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| R31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P05" | P5 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| R32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0P06" | P6 || Y0_DQ2_5 || Y0_XDR0_DQ13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| R33 || NC_OPEN44 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P07" | P7 || Y0_DQ2N_5 || Y0_XDR0_DQN13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| R34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P08" | P8 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| R35 || RX1_RXP3 || &lt; BE_RX1_RXP3
| data-sort-value="0P09" | P9 || {{cellcolors|#333|#fff}} NC_OPEN20 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| R36 || RX1_RXN3 || &lt; BE_RX1_RXN3
| data-sort-value="0P10" | P10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| R37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P11" | P11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| R38 || RX1_RXCLKP || &lt; BE_RX1_RXCLKP
| data-sort-value="0P12" | P12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| R39 || RX1_RXCLKN || &lt; BE_RX1_RXCLKN
| data-sort-value="0P13" | P13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0P14" | P14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T1 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0P15" | P15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T2 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0P16" | P16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T3 || Y0_DQ2_8 || .
| data-sort-value="0P17" | P17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T4 || Y0_DQ2N_8 || .
| data-sort-value="0P18" | P18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P19" | P19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T6 || Y0_DQ3_2 || &gt; Y0_XDR0_DQ9
| data-sort-value="0P20" | P20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T7 || Y0_DQ3N_2 || &gt; Y0_XDR0_DQN9
| data-sort-value="0P21" | P21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T8 || style="color:white; background-color:#333333;" | Y0_DQ2_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P22" | P22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T9 || NC_OPEN18 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P23" | P23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P24" | P24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0P25" | P25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T12<br />bis<br />T30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0P26" | P26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0P27" | P27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P28" | P28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T33 || NC_OPEN43 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P29" | P29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T34 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0P30" | P30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| T35 || RX1_RXP1 || &lt; BE_RX1_RXP1
| data-sort-value="0P31" | P31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| T36 || RX1_RXN1 || &lt; BE_RX1_RXN1
| data-sort-value="0P32" | P32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| T37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0P33" | P33 || {{cellcolors|#333|#fff}} NC_OPEN45 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| T38 || RX1_RXP0 || &lt; BE_RX1_RXP0
| data-sort-value="0P34" | P34 || {{cellcolors|#333|#fff}} RX1_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| T39 || RX1_RXN0 || &lt; BE_RX1_RXN0
| data-sort-value="0P35" | P35 || RX1_RXP5 || BE_RX1_RXP5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| T40 || RX1_RXP2 || &lt; BE_RX1_RXP2
| data-sort-value="0P36" | P36 || RX1_RXN5 || BE_RX1_RXN5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| T41 || RX1_RXN2 || &lt; BE_RX1_RXN2
| data-sort-value="0P37" | P37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0P38" | P38 || RX1_RXP4 || BE_RX1_RXP4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| U3 || Y0_DQ2_7 || &gt; Y0_XDR1_DQ11
| data-sort-value="0P39" | P39 || RX1_RXN4 || BE_RX1_RXN4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| U4 || Y0_DQ2N_7 || &gt; Y0_XDR1_DQN11
| data-sort-value="0P40" | P40 || RX1_RXP6 || BE_RX1_RXP6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| U5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0P41" | P41 || RX1_RXN6 || BE_RX1_RXN6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| U6 || Y0_DQ2_2 || &gt; Y0_XDR1_DQ1
| data-sort-value="0P99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| U7 || Y0_DQ2N_2 || &gt; Y0_XDR1_DQN1
| data-sort-value="0R01" | R1 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| U8 || style="color:white; background-color:#CC3333;" | YC_DQ2_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0R02" | R2 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| U9 || NC_OPEN17 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R03" | R3 || Y0_DQ3_4 || data-sort-value="Y0_XDR0_DQ03" | Y0_XDR0_DQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| U10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0R04" | R4 || Y0_DQ3N_4 || data-sort-value="Y0_XDR0_DQN03" | Y0_XDR0_DQN3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| U11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R05" | R5 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| U12<br />bis<br />U30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0R06" | R6 || Y0_DQ2_0 || data-sort-value="Y0_XDR0_DQ05" | Y0_XDR0_DQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| U31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R07" | R7 || Y0_DQ2N_0 || data-sort-value="Y0_XDR0_DQN05" | Y0_XDR0_DQN5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| U32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0R08" | R8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| U33 || NC_OPEN42 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R09" | R9 || {{cellcolors|#333|#fff}} NC_OPEN19 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| U34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R10" | R10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| U35 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R11" | R11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| U36 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R12" | R12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| U37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0R13" | R13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| U38 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R14" | R14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| U39 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0R15" | R15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0R16" | R16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V1 || Y0_DQ3_0 || &gt; Y0_XDR1_DQ7
| data-sort-value="0R17" | R17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V2 || Y0_DQ3N_0 || &gt; Y0_XDR1_DQN7
| data-sort-value="0R18" | R18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V3 || Y0_DQ3_5 || &gt; Y0_XDR1_DQ15
| data-sort-value="0R19" | R19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V4 || Y0_DQ3N_5 || &gt; Y0_XDR1_DQN15
| data-sort-value="0R20" | R20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V5 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0R21" | R21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V6 || Y0_DQ3_1 || &gt; Y0_XDR1_DQ13
| data-sort-value="0R22" | R22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V7 || Y0_DQ3N_1 || &gt; Y0_XDR1_DQN13
| data-sort-value="0R23" | R23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V8 || style="color:white; background-color:#CC3333;" | YC_DQQ_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0R24" | R24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V9 || NC_OPEN16 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R25" | R25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R26" | R26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0R27" | R27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V12<br />bis<br />V30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0R28" | R28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0R29" | R29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R30" | R30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| V33 || NC_OPEN41 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R31" | R31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| V34 || style="color:white; background-color:#333333;" | TX2_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R32" | R32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| V35 || TX2_TXN1 || &gt; BE_TX2_TXN1
| data-sort-value="0R33" | R33 || {{cellcolors|#333|#fff}} NC_OPEN44 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| V36 || TX2_TXP1 || &gt; BE_TX2_TXP1
| data-sort-value="0R34" | R34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| V37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0R35" | R35 || RX1_RXP3 || BE_RX1_RXP3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| V38 || TX2_TXN2 || &gt; BE_TX2_TXN2
| data-sort-value="0R36" | R36 || RX1_RXN3 || BE_RX1_RXN3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| V39 || TX2_TXP2 || &gt; BE_TX2_TXP2
| data-sort-value="0R37" | R37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| V40 || TX2_TXN0 || &gt; BE_TX2_TXN0
| data-sort-value="0R38" | R38 || RX1_RXCLKP || BE_RX1_RXCLKP || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| V41 || TX2_TXP0 || &gt; BE_TX2_TXP0
| data-sort-value="0R39" | R39 || RX1_RXCLKN || BE_RX1_RXCLKN || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0R40" | R40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| W3 || Y0_DQ3_6 || &gt; Y0_XDR1_DQ3
| data-sort-value="0R41" | R41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| W4 || Y0_DQ3N_6 || &gt; Y0_XDR1_DQN3
| data-sort-value="0R99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| W5 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0T01" | T1 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| W6 || Y0_DQ3_3 || &gt; Y0_XDR1_DQ5
| data-sort-value="0T02" | T2 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| W7 || Y0_DQ3N_3 || &gt; Y0_XDR1_DQN5
| data-sort-value="0T03" | T3 || Y0_DQ2_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| W8 || style="color:white; background-color:#333333;" | Y0_DQ3_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T04" | T4 || Y0_DQ2N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| W9 || NC_OPEN15 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T05" | T5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| W10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0T06" | T6 || Y0_DQ3_2 || data-sort-value="Y0_XDR0_DQ09" | Y0_XDR0_DQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| W11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T07" | T7 || Y0_DQ3N_2 || data-sort-value="Y0_XDR0_DQN09" | Y0_XDR0_DQN9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR0 (first chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| W12<br />bis<br />W30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0T08" | T8 || {{cellcolors|#333|#fff}} Y0_DQ2_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| W31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T09" | T9 || {{cellcolors|#333|#fff}} NC_OPEN18 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| W32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0T10" | T10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| W33 || NC_OPEN40 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T11" | T11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| W34 || style="color:white; background-color:#CC3333;" | TX2_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0T12" | T12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| W35 || TX2_TXN3 || &gt; BE_TX2_TXN3
| data-sort-value="0T13" | T13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| W36 || TX2_TXP3 || &gt; BE_TX2_TXP3
| data-sort-value="0T14" | T14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| W37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T15" | T15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| W38 || TX2_TXCLKN || &gt; BE_TX2_TXCLKN
| data-sort-value="0T16" | T16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| W39 || TX2_TXCLKP || &gt; BE_TX2_TXCLKP
| data-sort-value="0T17" | T17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0T18" | T18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y1 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0T19" | T19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y2 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0T20" | T20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y3 || Y0_DQ3_8 || .
| data-sort-value="0T21" | T21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y4 || Y0_DQ3N_8 || .
| data-sort-value="0T22" | T22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T23" | T23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y6 || Y0_DQ3_7 || &gt; Y0_XDR1_DQ9
| data-sort-value="0T24" | T24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y7 || Y0_DQ3N_7 || &gt; Y0_XDR1_DQN9
| data-sort-value="0T25" | T25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y8 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T26" | T26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y9 || NC_OPEN14 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T27" | T27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T28" | T28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0T29" | T29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y12<br />bis<br />Y30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0T30" | T30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| Y31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0T31" | T31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| Y32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T32" | T32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| Y33 || NC_OPEN39 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0T33" | T33 || {{cellcolors|#333|#fff}} NC_OPEN43 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| Y34 || style="color:white; background-color:#CC3333;" | RX2_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0T34" | T34 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| Y35 || TX2_TXN5 || &gt; BE_TX2_TXN5
| data-sort-value="0T35" | T35 || RX1_RXP1 || BE_RX1_RXP1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| Y36 || TX2_TXP5 || &gt; BE_TX2_TXP5
| data-sort-value="0T36" | T36 || RX1_RXN1 || BE_RX1_RXN1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| Y37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0T37" | T37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| Y38 || TX2_TXN6 || &gt; BE_TX2_TXN6
| data-sort-value="0T38" | T38 || RX1_RXP0 || BE_RX1_RXP0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| Y39 || TX2_TXP6 || &gt; BE_TX2_TXP6
| data-sort-value="0T39" | T39 || RX1_RXN0 || BE_RX1_RXN0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| Y40 || TX2_TXN4 || &gt; BE_TX2_TXN4
| data-sort-value="0T40" | T40 || RX1_RXP2 || BE_RX1_RXP2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| Y41 || TX2_TXP4 || &gt; BE_TX2_TXP4
| data-sort-value="0T41" | T41 || RX1_RXN2 || BE_RX1_RXN2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0T99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AA1 || Y1_DQ0_RLOAD || &lt; BE_Y1_DQ0_RLOAD
| data-sort-value="0U01" | U1 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA2 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U02" | U2 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA3 || style="color:white; background-color:#993333;" | YQ_DQ0_VREF || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0U03" | U3 || Y0_DQ2_7 || Y0_XDR1_DQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AA4 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0U04" | U4 || Y0_DQ2N_7 || Y0_XDR1_DQN11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AA5 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0U05" | U5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AA6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U06" | U6 || Y0_DQ2_2 || data-sort-value="Y0_XDR1_DQ01" | Y0_XDR1_DQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AA7 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0U07" | U7 || Y0_DQ2N_2 || data-sort-value="Y0_XDR1_DQN01" | Y0_XDR1_DQN1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AA8 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0U08" | U8 || {{cellcolors|#c33|#fff}} Y0_DQ2_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
|-
| AA9 || NC_OPEN13 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U09" | U9 || {{cellcolors|#333|#fff}} NC_OPEN17 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AA10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0U10" | U10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AA11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U11" | U11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AA12<br />bis<br />AA30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0U12" | U12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U13" | U13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0U14" | U14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA33 || NC_OPEN38 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U15" | U15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA34 || style="color:white; background-color:#333333;" | RX2_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U16" | U16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA35 || RX2_RXP7 || &lt; BE_RX2_RXP7
| data-sort-value="0U17" | U17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA36 || RX2_RXN7 || &lt; BE_RX2_RXN7
| data-sort-value="0U18" | U18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0U19" | U19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA38 || TX2_TXN7 || &gt; BE_TX2_TXN7
| data-sort-value="0U20" | U20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AA39 || TX2_TXP7 || &gt; BE_TX2_TXP7
| data-sort-value="0U21" | U21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0U22" | U22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB1 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0U23" | U23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB2 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0U24" | U24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB3 || Y1_DQ0_8 || .
| data-sort-value="0U25" | U25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB4 || Y1_DQ0N_8 || .
| data-sort-value="0U26" | U26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U27" | U27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB6 || Y1_DQ0_1 || &gt; Y1_XDR1_DQ8
| data-sort-value="0U28" | U28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB7 || Y1_DQ0N_1 || &gt; Y1_XDR1_DQN8
| data-sort-value="0U29" | U29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB8 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U30" | U30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB9 || NC_OPEN12 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U31" | U31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AB10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U32" | U32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AB11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0U33" | U33 || {{cellcolors|#333|#fff}} NC_OPEN42 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AB12<br />bis<br />AB30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0U34" | U34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AB31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0U35" | U35 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AB32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U36" | U36 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AB33 || NC_OPEN37 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U37" | U37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AB34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U38" | U38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AB35 || RX2_RXP5 || &lt; BE_RX2_RXP5
| data-sort-value="0U39" | U39 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AB36 || RX2_RXN5 || &lt; BE_RX2_RXN5
| data-sort-value="0U40" | U40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0U41" | U41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AB38 || RX2_RXP4 || &lt; BE_RX2_RXP4
| data-sort-value="0U99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AB39 || RX2_RXN4 || &lt; BE_RX2_RXN4
| data-sort-value="0V01" | V1 || Y0_DQ3_0 || data-sort-value="Y0_XDR1_DQ07" | Y0_XDR1_DQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AB40 || RX2_RXP6 || &lt; BE_RX2_RXP6
| data-sort-value="0V02" | V2 || Y0_DQ3N_0 || data-sort-value="Y0_XDR1_DQN07" | Y0_XDR1_DQN7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AB41 || RX2_RXN6 || &lt; BE_RX2_RXN6
| data-sort-value="0V03" | V3 || Y0_DQ3_5 || Y0_XDR1_DQ15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0V04" | V4 || Y0_DQ3N_5 || Y0_XDR1_DQN15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AC3 || Y1_DQ0_4 || &gt; Y1_XDR1_DQ2
| data-sort-value="0V05" | V5 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AC4 || Y1_DQ0N_4 || &gt; Y1_XDR1_DQN2
| data-sort-value="0V06" | V6 || Y0_DQ3_1 || Y0_XDR1_DQ13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AC5 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0V07" | V7 || Y0_DQ3N_1 || Y0_XDR1_DQN13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AC6 || Y1_DQ0_7 || &gt; Y1_XDR1_DQ4
| data-sort-value="0V08" | V8 || {{cellcolors|#c33|#fff}} Y0_DQ3_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
|-
| AC7 || Y1_DQ0N_7 || &gt; Y1_XDR1_DQN4
| data-sort-value="0V09" | V9 || {{cellcolors|#333|#fff}} NC_OPEN16 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AC8 || style="color:white; background-color:#333333;" | YC_DQ0_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V10" | V10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AC9 || NC_OPEN11 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V11" | V11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AC10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0V12" | V12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V13" | V13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC12<br />bis<br />AC30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0V14" | V14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V15" | V15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0V16" | V16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC33 || NC_OPEN36 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V17" | V17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC34 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0V18" | V18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC35 || RX2_RXP3 || &lt; BE_RX2_RXP3
| data-sort-value="0V19" | V19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC36 || RX2_RXN3 || &lt; BE_RX2_RXN3
| data-sort-value="0V20" | V20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V21" | V21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC38 || RX2_RXCLKP || &lt; BE_RX2_RXCLKP
| data-sort-value="0V22" | V22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AC39 || RX2_RXCLKN || &lt; BE_RX2_RXCLKN
| data-sort-value="0V23" | V23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0V24" | V24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AD1 || Y1_DQ0_2 || &gt; Y1_XDR1_DQ6
| data-sort-value="0V25" | V25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AD2 || Y1_DQ0N_2 || &gt; Y1_XDR1_DQN6
| data-sort-value="0V26" | V26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AD3 || Y1_DQ0_5 || &gt; Y1_XDR1_DQ14
| data-sort-value="0V27" | V27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AD4 || Y1_DQ0N_5 || &gt; Y1_XDR1_DQN14
| data-sort-value="0V28" | V28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AD5 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0V29" | V29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AD6 || Y1_DQ1_0 || &gt; Y1_XDR1_DQ12
| data-sort-value="0V30" | V30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AD7 || Y1_DQ1N_0 || &gt; Y1_XDR1_DQN12
| data-sort-value="0V31" | V31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AD8 || style="color:white; background-color:#CC3333;" | Y1_DQ0_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0V32" | V32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AD9 || NC_OPEN10 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V33" | V33 || {{cellcolors|#333|#fff}} NC_OPEN41 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AD10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V34" | V34 || {{cellcolors|#333|#fff}} TX2_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AD11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0V35" | V35 || TX2_TXN1 || BE_TX2_TXN1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AD12<br />bis<br />AD30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0V36" | V36 || TX2_TXP1 || BE_TX2_TXP1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AD31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0V37" | V37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AD32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V38" | V38 || TX2_TXN2 || BE_TX2_TXN2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AD33 || NC_OPEN35 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V39" | V39 || TX2_TXP2 || BE_TX2_TXP2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AD34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0V40" | V40 || TX2_TXN0 || BE_TX2_TXN0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AD35 || RX2_RXP1 || &lt; BE_RX2_RXP1
| data-sort-value="0V41" | V41 || TX2_TXP0 || BE_TX2_TXP0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AD36 || RX2_RXN1 || &lt; BE_RX2_RXN1
| data-sort-value="0V99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AD37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0W01" | W1 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AD38 || RX2_RXP0 || &lt; BE_RX2_RXP0
| data-sort-value="0W02" | W2 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AD39 || RX2_RXN0 || &lt; BE_RX2_RXN0
| data-sort-value="0W03" | W3 || Y0_DQ3_6 || data-sort-value="Y0_XDR1_DQ03" | Y0_XDR1_DQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AD40 || RX2_RXP2 || &lt; BE_RX2_RXP2
| data-sort-value="0W04" | W4 || Y0_DQ3N_6 || data-sort-value="Y0_XDR1_DQN03" | Y0_XDR1_DQN3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AD41 || RX2_RXN2 || &lt; BE_RX2_RXN2
| data-sort-value="0W05" | W5 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0W06" | W6 || Y0_DQ3_3 || data-sort-value="Y0_XDR1_DQ05" | Y0_XDR1_DQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AE3 || Y1_DQ1_1 || &gt; Y1_XDR1_DQ10
| data-sort-value="0W07" | W7 || Y0_DQ3N_3 || data-sort-value="Y0_XDR1_DQN05" | Y0_XDR1_DQN5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AE4 || Y1_DQ1N_1 || &gt; Y1_XDR1_DQN10
| data-sort-value="0W08" | W8 || {{cellcolors|#333|#fff}} Y0_DQ3_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AE5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W09" | W9 || {{cellcolors|#333|#fff}} NC_OPEN15 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AE6 || Y1_DQ1_3 || &gt; Y1_XDR1_DQ0
| data-sort-value="0W10" | W10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AE7 || Y1_DQ1N_3 || &gt; Y1_XDR1_DQN0
| data-sort-value="0W11" | W11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AE8 || style="color:white; background-color:#CC3333;" | Y1_DQ1_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0W12" | W12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE9 || NC_OPEN09 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W13" | W13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0W14" | W14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W15" | W15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE12<br />bis<br />AE30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0W16" | W16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W17" | W17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0W18" | W18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE33 || NC_OPEN34 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W19" | W19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE34 || style="color:white; background-color:#333333;" | TX3_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W20" | W20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE35 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W21" | W21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE36 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W22" | W22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE37 || style="color:white; background-color:#993333;" | RC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0W23" | W23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE38 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W24" | W24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AE39 || style="color:white; background-color:#993333;" | RC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0W25" | W25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0W26" | W26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AF1 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0W27" | W27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AF2 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0W28" | W28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AF3 || Y1_DQ1_8 || .
| data-sort-value="0W29" | W29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AF4 || Y1_DQ1N_8 || .
| data-sort-value="0W30" | W30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AF5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W31" | W31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AF6 || Y1_DQ0_0 || &gt; Y1_XDR0_DQ8
| data-sort-value="0W32" | W32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AF7 || Y1_DQ0N_0 || &gt; Y1_XDR0_DQN8
| data-sort-value="0W33" | W33 || {{cellcolors|#333|#fff}} NC_OPEN40 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AF8 || style="color:white; background-color:#333333;" | Y1_DQ1_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W34" | W34 || {{cellcolors|#c33|#fff}} TX2_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
|-
| AF9 || NC_OPEN08 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W35" | W35 || TX2_TXN3 || BE_TX2_TXN3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AF10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W36" | W36 || TX2_TXP3 || BE_TX2_TXP3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AF11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0W37" | W37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AF12<br />bis<br />AF30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0W38" | W38 || TX2_TXCLKN || BE_TX2_TXCLKN || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AF31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0W39" | W39 || TX2_TXCLKP || BE_TX2_TXCLKP || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AF32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W40" | W40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AF33 || NC_OPEN33 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0W41" | W41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AF34 || style="color:white; background-color:#CC3333;" | TX3_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0W99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AF35 || TX3_TXN1 || &gt; BE_TX3_TXN1
| data-sort-value="0Y01" | Y1 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AF36 || TX3_TXP1 || &gt; BE_TX3_TXP1
| data-sort-value="0Y02" | Y2 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AF37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y03" | Y3 || Y0_DQ3_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AF38 || TX3_TXN2 || &gt; BE_TX3_TXN2
| data-sort-value="0Y04" | Y4 || Y0_DQ3N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AF39 || TX3_TXP2 || &gt; BE_TX3_TXP2
| data-sort-value="0Y05" | Y5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AF40 || TX3_TXN0 || &gt; BE_TX3_TXN0
| data-sort-value="0Y06" | Y6 || Y0_DQ3_7 || data-sort-value="Y0_XDR1_DQ09" | Y0_XDR1_DQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AF41 || TX3_TXP0 || &gt; BE_TX3_TXP0
| data-sort-value="0Y07" | Y7 || Y0_DQ3N_7 || data-sort-value="Y0_XDR1_DQN09" | Y0_XDR1_DQN9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y0_XDR1 (second chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0Y08" | Y8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AG3 || Y1_DQ0_6 || &gt; Y1_XDR0_DQ2
| data-sort-value="0Y09" | Y9 || {{cellcolors|#333|#fff}} NC_OPEN14 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AG4 || Y1_DQ0N_6 || &gt; Y1_XDR0_DQN2
| data-sort-value="0Y10" | Y10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AG5 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0Y11" | Y11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AG6 || Y1_DQ1_2 || &gt; Y1_XDR0_DQ4
| data-sort-value="0Y12" | Y12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG7 || Y1_DQ1N_2 || &gt; Y1_XDR0_DQN4
| data-sort-value="0Y13" | Y13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG8 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y14" | Y14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG9 || NC_OPEN07 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y15" | Y15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0Y16" | Y16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y17" | Y17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG12<br />bis<br />AG30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0Y18" | Y18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y19" | Y19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0Y20" | Y20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG33 || NC_OPEN32 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y21" | Y21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG34 || style="color:white; background-color:#CC3333;" | TX4_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="0Y22" | Y22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG35 || TX3_TXN3 || &gt; BE_TX3_TXN3
| data-sort-value="0Y23" | Y23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG36 || TX3_TXP3 || &gt; BE_TX3_TXP3
| data-sort-value="0Y24" | Y24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y25" | Y25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG38 || TX3_TXCLKN || &gt; BE_TX3_TXCLKN
| data-sort-value="0Y26" | Y26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AG39 || TX3_TXCLKP || &gt; BE_TX3_TXCLKP
| data-sort-value="0Y27" | Y27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="0Y28" | Y28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AH1 || Y1_DQ0_3 || &gt; Y1_XDR0_DQ6
| data-sort-value="0Y29" | Y29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AH2 || Y1_DQ0N_3 || &gt; Y1_XDR0_DQN6
| data-sort-value="0Y30" | Y30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AH3 || Y1_DQ1_5 || &gt; Y1_XDR0_DQ14
| data-sort-value="0Y31" | Y31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AH4 || Y1_DQ1N_5 || &gt; Y1_XDR0_DQN14
| data-sort-value="0Y32" | Y32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AH5 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0Y33" | Y33 || {{cellcolors|#333|#fff}} NC_OPEN39 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AH6 || Y1_DQ1_4 || &gt; Y1_XDR0_DQ12
| data-sort-value="0Y34" | Y34 || {{cellcolors|#c33|#fff}} RX2_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
|-
| AH7 || Y1_DQ1N_4 || &gt; Y1_XDR0_DQN12
| data-sort-value="0Y35" | Y35 || TX2_TXN5 || BE_TX2_TXN5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AH8 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="0Y36" | Y36 || TX2_TXP5 || BE_TX2_TXP5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AH9 || NC_OPEN06 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y37" | Y37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AH10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y38" | Y38 || TX2_TXN6 || BE_TX2_TXN6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AH11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0Y39" | Y39 || TX2_TXP6 || BE_TX2_TXP6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AH12<br />bis<br />AH30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="0Y40" | Y40 || TX2_TXN4 || BE_TX2_TXN4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AH31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="0Y41" | Y41 || TX2_TXP4 || BE_TX2_TXP4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AH32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="0Y99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AH33 || NC_OPEN31 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA01" | AA1 || Y1_DQ0_RLOAD || BE_Y1_DQ0_RLOAD || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
|-
| AH34 || style="color:white; background-color:#333333;" | TX4_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA02" | AA2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AH35 || TX3_TXN5 || &gt; BE_TX3_TXN5
| data-sort-value="AA03" | AA3 || {{cellcolors|#d53|#fff}} Y1_DQ0_VREF<!--the name YQ_DQ0_VREF in the service manual seems to be a typo--> || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AH36 || TX3_TXP5 || &gt; BE_TX3_TXP5
| data-sort-value="AA04" | AA4 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AH37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AA05" | AA5 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AH38 || TX3_TXN6 || &gt; BE_TX3_TXN6
| data-sort-value="AA06" | AA6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AH39 || TX3_TXP6 || &gt; BE_TX3_TXP6
| data-sort-value="AA07" | AA7 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AH40 || TX3_TXN4 || &gt; BE_TX3_TXN4
| data-sort-value="AA08" | AA8 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AH41 || TX3_TXP4 || &gt; BE_TX3_TXP4
| data-sort-value="AA09" | AA9 || {{cellcolors|#333|#fff}} NC_OPEN13 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AA10" | AA10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AJ3 || Y1_DQ1_7 || &gt; Y1_XDR0_DQ10
| data-sort-value="AA11" | AA11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AJ4 || Y1_DQ1N_7 || &gt; Y1_XDR0_DQN10
| data-sort-value="AA12" | AA12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA13" | AA13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ6 || Y1_DQ1_6 || &gt; Y1_XDR0_DQ0
| data-sort-value="AA14" | AA14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ7 || Y1_DQ1N_6 || &gt; Y1_XDR0_DQN0
| data-sort-value="AA15" | AA15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ8 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA16" | AA16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ9 || NC_OPEN05 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA17" | AA17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AA18" | AA18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA19" | AA19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ12<br />bis<br />AJ30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="AA20" | AA20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA21" | AA21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AA22" | AA22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ33 || NC_OPEN30 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA23" | AA23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA24" | AA24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ35 || TX4_TXN1 || .
| data-sort-value="AA25" | AA25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ36 || TX4_TXP1 || .
| data-sort-value="AA26" | AA26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AA27" | AA27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ38 || TX3_TXN7 || &gt; BE_TX3_TXN7
| data-sort-value="AA28" | AA28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AJ39 || TX3_TXP7 || &gt; BE_TX3_TXP7
| data-sort-value="AA29" | AA29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AA30" | AA30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AK1 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AA31" | AA31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AK2 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AA32" | AA32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AK3 || Y1_RQ_RST || &gt; BE_Y1_RQ_RST
| data-sort-value="AA33" | AA33 || {{cellcolors|#333|#fff}} NC_OPEN38 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AK4 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA34" | AA34 || {{cellcolors|#333|#fff}} RX2_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AK5 || Y1_RQ_SRD || &lt; BE_Y1_RQ_SRD
| data-sort-value="AA35" | AA35 || RX2_RXP7 || BE_RX2_RXP7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AK6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA36" | AA36 || RX2_RXN7 || BE_RX2_RXN7 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AK7 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA37" | AA37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AK8 || style="color:white; background-color:#333333;" | Y1_RQ_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA38" | AA38 || TX2_TXN7 || BE_TX2_TXN7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AK9 || NC_OPEN04 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA39" | AA39 || TX2_TXP7 || BE_TX2_TXP7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AK10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AA40" | AA40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AK11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AA41" | AA41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AK12<br />bis<br />AK30 || colspan="2" align="center" | -EMPTY CENTER AREA-
| data-sort-value="AA99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AK31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB01" | AB1 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AK32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB02" | AB2 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AK33 || NC_OPEN29 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB03" | AB3 || Y1_DQ0_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AK34 || style="color:white; background-color:#993333;" | RC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AB04" | AB4 || Y1_DQ0N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AK35 || TX4_TXN3 || .
| data-sort-value="AB05" | AB5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AK36 || TX4_TXP3 || .
| data-sort-value="AB06" | AB6 || Y1_DQ0_1 || data-sort-value="Y1_XDR1_DQ08" | Y1_XDR1_DQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AK37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB07" | AB7 || Y1_DQ0N_1 || data-sort-value="Y1_XDR1_DQN08" | Y1_XDR1_DQN8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AK38 || TX4_TXN2 || .
| data-sort-value="AB08" | AB8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AK39 || TX4_TXP2 || .
| data-sort-value="AB09" | AB9 || {{cellcolors|#333|#fff}} NC_OPEN12 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AK40 || TX4_TXN0 || .
| data-sort-value="AB10" | AB10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AK41 || TX4_TXP0 || .
| data-sort-value="AB11" | AB11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AB12" | AB12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL1 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB13" | AB13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL2 || Y1_RQ0 || &gt; BE_Y1_RQ0
| data-sort-value="AB14" | AB14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL3 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB15" | AB15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL4 || Y1_RQ1 || &gt; BE_Y1_RQ1
| data-sort-value="AB16" | AB16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB17" | AB17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB18" | AB18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL7 || Y1_DQC_VOLREF || &lt; BE_Y1_DQC_VOLREF
| data-sort-value="AB19" | AB19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL8 || style="color:white; background-color:#CC3333;" | Y1_RQ_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="AB20" | AB20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL9 || NC_OPEN03 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB21" | AB21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL10 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB22" | AB22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB23" | AB23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL12 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB24" | AB24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL13 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB25" | AB25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL14 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB26" | AB26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL15 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB27" | AB27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL16 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB28" | AB28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL17 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB29" | AB29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL18 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB30" | AB30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL19 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB31" | AB31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AL20 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB32" | AB32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AL21 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB33" | AB33 || {{cellcolors|#333|#fff}} NC_OPEN37 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AL22 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB34" | AB34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AL23 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB35" | AB35 || RX2_RXP5 || BE_RX2_RXP5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AL24 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB36" | AB36 || RX2_RXN5 || BE_RX2_RXN5 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AL25 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB37" | AB37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AL26 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB38" | AB38 || RX2_RXP4 || BE_RX2_RXP4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AL27 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB39" | AB39 || RX2_RXN4 || BE_RX2_RXN4 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AL28 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB40" | AB40 || RX2_RXP6 || BE_RX2_RXP6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AL29 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AB41" | AB41 || RX2_RXN6 || BE_RX2_RXN6 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AL30 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AB99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AL31 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC01" | AC1 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL32 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC02" | AC2 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AL33 || NC_OPEN03 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC03" | AC3 || Y1_DQ0_4 || data-sort-value="Y1_XDR1_DQ02" | Y1_XDR1_DQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AL34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC04" | AC4 || Y1_DQ0N_4 || data-sort-value="Y1_XDR1_DQN02" | Y1_XDR1_DQN2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AL35 || TX4_TXN5 || .
| data-sort-value="AC05" | AC5 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AL36 || TX4_TXP5 || .
| data-sort-value="AC06" | AC6 || Y1_DQ0_7 || data-sort-value="Y1_XDR1_DQ04" | Y1_XDR1_DQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AL37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC07" | AC7 || Y1_DQ0N_7 || data-sort-value="Y1_XDR1_DQN04" | Y1_XDR1_DQN4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AL38 || TX4_TXCLKN || .
| data-sort-value="AC08" | AC8 || {{cellcolors|#333|#fff}} Y1_DQ0_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AL39 || TX4_TXCLKP || .
| data-sort-value="AC09" | AC9 || {{cellcolors|#333|#fff}} NC_OPEN11 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AC10" | AC10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AM1 || Y1_RQ3 || &gt; BE_Y1_RQ3
| data-sort-value="AC11" | AC11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AM2 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC12" | AC12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM3 || Y1_RQ5 || &gt; BE_Y1_RQ5
| data-sort-value="AC13" | AC13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM4 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC14" | AC14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM5 || Y1_RQ2 || &gt; BE_Y1_RQ2
| data-sort-value="AC15" | AC15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC16" | AC16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM7 || Y1_DQC_VOLGND || &lt; BE_Y1_DQC_VOLGND
| data-sort-value="AC17" | AC17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM8 || style="color:white; background-color:#333333;" | Y1_DQ2_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC18" | AC18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM9 || NC_OPEN02 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC19" | AC19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC20" | AC20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM11 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC21" | AC21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM12 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC22" | AC22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM13 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC23" | AC23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM14 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC24" | AC24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM15 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC25" | AC25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM16 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC26" | AC26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM17 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC27" | AC27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM18 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC28" | AC28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM19 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC29" | AC29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM20 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC30" | AC30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM21 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC31" | AC31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AM22 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC32" | AC32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AM23 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC33" | AC33 || {{cellcolors|#333|#fff}} NC_OPEN36 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AM24 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC34" | AC34 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AM25 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC35" | AC35 || RX2_RXP3 || BE_RX2_RXP3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AM26 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC36" | AC36 || RX2_RXN3 || BE_RX2_RXN3 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AM27 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC37" | AC37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AM28 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC38" | AC38 || RX2_RXCLKP || BE_RX2_RXCLKP || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AM29 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC39" | AC39 || RX2_RXCLKN || BE_RX2_RXCLKN || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AM30 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC40" | AC40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM31 || style="color:white; background-color:#663333;" | VDD || style="color:white; background-color:#663333;" | +1.0V VDD
| data-sort-value="AC41" | AC41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AM32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AC99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AM33 || NC_OPEN27 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD01" | AD1 || Y1_DQ0_2 || data-sort-value="Y1_XDR1_DQ06" | Y1_XDR1_DQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AM34 || style="color:white; background-color:#333333;" | TX5_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD02" | AD2 || Y1_DQ0N_2 || data-sort-value="Y1_XDR1_DQN06" | Y1_XDR1_DQN6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AM35 || TX4_TXN7 || .
| data-sort-value="AD03" | AD3 || Y1_DQ0_5 || Y1_XDR1_DQ14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AM36 || TX4_TXP7 || .
| data-sort-value="AD04" | AD4 || Y1_DQ0N_5 || Y1_XDR1_DQN14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AM37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AD05" | AD5 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AM38 || TX4_TXN6 || .
| data-sort-value="AD06" | AD6 || Y1_DQ1_0 || Y1_XDR1_DQ12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AM39 || TX4_TXP6 || .
| data-sort-value="AD07" | AD7 || Y1_DQ1N_0 || Y1_XDR1_DQN12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AM40 || TX4_TXN4 || .
| data-sort-value="AD08" | AD8 || {{cellcolors|#c33|#fff}} Y1_DQ0_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
|-
| AM41 || TX4_TXP4 || .
| data-sort-value="AD09" | AD9 || {{cellcolors|#333|#fff}} NC_OPEN10 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AD10" | AD10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AN1 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD11" | AD11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AN2 || Y1_RQ4 || &gt; BE_Y1_RQ4
| data-sort-value="AD12" | AD12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN3 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD13" | AD13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN4 || Y1_RQ6 || &gt; BE_Y1_RQ6
| data-sort-value="AD14" | AD14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD15" | AD15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN6 || Y1_RQ_VREF || &lt; BE_Y1_RQ_VREF
| data-sort-value="AD16" | AD16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN7 || Y1_DQC_ROLREF || &lt; BE_Y1_DQC_ROLREF
| data-sort-value="AD17" | AD17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN8 || style="color:white; background-color:#CC3333;" | Y1_DQ2_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="AD18" | AD18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN9 || NC_OPEN01 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD19" | AD19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN10 || NC_OPEN51 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD20" | AD20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN11 || NC_OPEN52 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD21" | AD21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN12 || NC_OPEN53 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD22" | AD22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN13 || NC_OPEN54 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD23" | AD23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN14 || NC_OPEN55 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD24" | AD24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN15 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD25" | AD25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN16 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD26" | AD26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN17 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD27" | AD27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN18 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD28" | AD28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN19 || NC_OPEN56 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD29" | AD29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN20 || NC_OPEN57 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD30" | AD30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN21 || NC_OPEN58 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD31" | AD31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AN22 || NC_OPEN59 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD32" | AD32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AN23 || NC_OPEN60 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD33" | AD33 || {{cellcolors|#333|#fff}} NC_OPEN35 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AN24 || NC_OPEN61 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD34" | AD34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AN25 || NC_OPEN62 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD35" | AD35 || RX2_RXP1 || BE_RX2_RXP1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AN26 || NC_OPEN63 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD36" | AD36 || RX2_RXN1 || BE_RX2_RXN1 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AN27 || NC_OPEN64 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD37" | AD37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AN28 || NC_OPEN65 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD38" | AD38 || RX2_RXP0 || BE_RX2_RXP0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AN29 || NC_OPEN66 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD39" | AD39 || RX2_RXN0 || BE_RX2_RXN0 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AN30 || NC_OPEN67 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD40" | AD40 || RX2_RXP2 || BE_RX2_RXP2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AN31 || NC_OPEN68 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD41" | AD41 || RX2_RXN2 || BE_RX2_RXN2 || {{pini}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AN32 || NC_OPEN69 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AD99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AN33 || NC_OPEN26 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE01" | AE1 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN34 || style="color:white; background-color:#CC3333;" | TX5_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="AE02" | AE2 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AN35 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE03" | AE3 || Y1_DQ1_1 || Y1_XDR1_DQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AN36 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE04" | AE4 || Y1_DQ1N_1 || Y1_XDR1_DQN10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AN37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AE05" | AE5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AN38 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE06" | AE6 || Y1_DQ1_3 || data-sort-value="Y1_XDR1_DQ00" | Y1_XDR1_DQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AN39 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AE07" | AE7 || Y1_DQ1N_3 || data-sort-value="Y1_XDR1_DQN00" | Y1_XDR1_DQN0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AE08" | AE8 || {{cellcolors|#c33|#fff}} Y1_DQ1_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
|-
| AP1 || Y1_RQ_CMTP || &lt; BE_Y1_RQ_CMTP
| data-sort-value="AE09" | AE9 || {{cellcolors|#333|#fff}} NC_OPEN09 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AP2 || Y1_RQ_CMTN || &lt; BE_Y1_RQ_CMTN
| data-sort-value="AE10" | AE10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AP3 || Y1_RQ7 || &lt; BE_Y1_RQ7
| data-sort-value="AE11" | AE11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AP4 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE12" | AE12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP5 || Y1_RQ8 || &lt; BE_Y1_RQ8
| data-sort-value="AE13" | AE13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE14" | AE14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP7 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE15" | AE15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP8 || style="color:white; background-color:#CC3333;" | Y1_DQ3_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="AE16" | AE16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP9 || style="color:white; background-color:#333333;" | Y1_DQ3_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE17" | AE17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE18" | AE18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP11 || YC_SCAN_EN || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE19" | AE19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP12 || YC_TREF || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE20" | AE20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP13 || /SPI_EN_B || &lt; /BE_SPI_CS
| data-sort-value="AE21" | AE21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP14 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE22" | AE22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP15 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE23" | AE23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP16 || PLL_VDDA || &lt; BE_PLL_VDDA
| data-sort-value="AE24" | AE24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP17 || style="color:white; background-color:#333333;" | PLL_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE25" | AE25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP18 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE26" | AE26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP19 || SYS_CONFIG2 || &lt; BE_SYS_CONF2
| data-sort-value="AE27" | AE27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP20 || SYS_CONFIG0 || &lt; BE_SYS_CONF0
| data-sort-value="AE28" | AE28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP21 || PSARE2 || &gt; CL1001
| data-sort-value="AE29" | AE29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP22 || TBEN || &lt; BE_TBEN
| data-sort-value="AE30" | AE30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP23 || THERMAL_OVERLOAD_B || &gt; BE_THR_ALRT
| data-sort-value="AE31" | AE31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AP24 || TRIGGER_IN || &lt; BE_TRG_IN
| data-sort-value="AE32" | AE32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AP25 || RC_SCAN_EN || &gt; R1005 470K &gt; Ground
| data-sort-value="AE33" | AE33 || {{cellcolors|#333|#fff}} NC_OPEN34 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AP26 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AE34" | AE34 || {{cellcolors|#333|#fff}} TX3_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AP27 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE35" | AE35 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AP28 || style="color:white; background-color:#333333;" | RX4_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE36" | AE36 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AP29 || style="color:white; background-color:#CC3333;" | RX4_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="AE37" | AE37 || {{cellcolors|#d53|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AP30 || style="color:white; background-color:#CC3333;" | TX6_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="AE38" | AE38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AP31 || style="color:white; background-color:#333333;" | TX6_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE39" | AE39 || {{cellcolors|#d53|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AP32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE40" | AE40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP33 || style="color:white; background-color:#333333;" | RX3_GNDA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AE41" | AE41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AP34 || style="color:white; background-color:#CC3333;" | RX3_VDDA || style="color:white; background-color:#CC3333;" | +1.5V VDD
| data-sort-value="AE99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AP35 || TX5_TXN1 || .
| data-sort-value="AF01" | AF1 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AP36 || TX5_TXP1 || .
| data-sort-value="AF02" | AF2 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AP37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF03" | AF3 || Y1_DQ1_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AP38 || TX5_TXN2 || .
| data-sort-value="AF04" | AF4 || Y1_DQ1N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AP39 || TX5_TXP2 || .
| data-sort-value="AF05" | AF5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AP40 || TX5_TXN0 || .
| data-sort-value="AF06" | AF6 || Y1_DQ0_0 || data-sort-value="Y1_XDR0_DQ08" | Y1_XDR0_DQ8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AP41 || TX5_TXP0 || .
| data-sort-value="AF07" | AF7 || Y1_DQ0N_0 || data-sort-value="Y1_XDR0_DQN08" | Y1_XDR0_DQN8 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AF08" | AF8 || {{cellcolors|#333|#fff}} Y1_DQ1_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AR1 || Y1_RQ_CFMN || &gt; BE_Y1_RQ_CFMN
| data-sort-value="AF09" | AF9 || {{cellcolors|#333|#fff}} NC_OPEN08 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AR2 || Y1_RQ_CFMP || &gt; BE_Y1_RQ_CFMP
| data-sort-value="AF10" | AF10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AR3 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF11" | AF11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AR4 || Y1_RQ9 || &gt; BE_Y1_RQ9
| data-sort-value="AF12" | AF12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF13" | AF13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR6 || Y1_RQ_SCK || &gt; BE_Y1_RQ_SCK
| data-sort-value="AF14" | AF14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR7 || Y1_DQ2_2 || &gt; BE_Y1_XDR1_DQ1
| data-sort-value="AF15" | AF15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR8 || Y1_DQ2_7 || &gt; BE_Y1_XDR1_DQ13
| data-sort-value="AF16" | AF16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR9 || Y1_DQ3_0 || &gt; BE_Y1_XDR1_DQ5
| data-sort-value="AF17" | AF17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR10 || Y1_DQ3_7 || &gt; BE_Y1_XDR1_DQ9
| data-sort-value="AF18" | AF18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR11 || YC_XCLK_EN || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF19" | AF19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR12 || YC_SCAN_OUT || .
| data-sort-value="AF20" | AF20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR13 || SPI_SO || &gt; R1013 47 &gt; BE_SPI_DI
| data-sort-value="AF21" | AF21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR14 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF22" | AF22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR15 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF23" | AF23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR16 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF24" | AF24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR17 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF25" | AF25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR18 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF26" | AF26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR19 || SYS_CONFIG1 || &lt; BE_SYS_CONF1
| data-sort-value="AF27" | AF27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR20 || SYS_CONFIG3 || &lt; BE_SYS_CONF3
| data-sort-value="AF28" | AF28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR21 || SPARE1 || .
| data-sort-value="AF29" | AF29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR22 || PULSE_LIMIT_BYPASS || &lt; BE_P_L_BYPASS
| data-sort-value="AF30" | AF30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR23 || SCAN_ENABLE_BYPASS || &lt; BE_SCAN_ENA
| data-sort-value="AF31" | AF31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AR24 || TRIGGER_OUT || &gt; BE_TRG_OUT
| data-sort-value="AF32" | AF32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AR25 || RC_TEST_MODE-ST || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF33" | AF33 || {{cellcolors|#333|#fff}} NC_OPEN33 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AR26 || RX4_RXP1 || &lt; BE_RX4_RXP1
| data-sort-value="AF34" | AF34 || {{cellcolors|#c33|#fff}} TX3_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
|-
| AR27 || RX4_RXP3 || &lt; BE_RX4_RXP3
| data-sort-value="AF35" | AF35 || TX3_TXN1 || BE_TX3_TXN1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AR28 || RX4_RXP5 || &lt; BE_RX4_RXP5
| data-sort-value="AF36" | AF36 || TX3_TXP1 || BE_TX3_TXP1 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AR29 || RX4_RXP7 || &lt; BE_RX4_RXP7
| data-sort-value="AF37" | AF37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AR30 || TX6_TXN5 || &lt; BE_TX6_TXN5
| data-sort-value="AF38" | AF38 || TX3_TXN2 || BE_TX3_TXN2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AR31 || TX6_TXN3 || &lt; BE_TX6_TXN3
| data-sort-value="AF39" | AF39 || TX3_TXP2 || BE_TX3_TXP2 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AR32 || TX6_TXN1 || &lt; BE_TX6_TXN1
| data-sort-value="AF40" | AF40 || TX3_TXN0 || BE_TX3_TXN0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AR33 || NT_TST04 || .
| data-sort-value="AF41" | AF41 || TX3_TXP0 || BE_TX3_TXP0 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AR34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AF99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AR35 || TX5_TXN3 || .
| data-sort-value="AG01" | AG1 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR36 || TX5_TXP3 || .
| data-sort-value="AG02" | AG2 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AR37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG03" | AG3 || Y1_DQ0_6 || data-sort-value="Y1_XDR0_DQ02" | Y1_XDR0_DQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AR38 || TX5_TXCLKN || .
| data-sort-value="AG04" | AG4 || Y1_DQ0N_6 || data-sort-value="Y1_XDR0_DQN02" | Y1_XDR0_DQN2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AR39 || TX5_TXCLKP || .
| data-sort-value="AG05" | AG5 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AG06" | AG6 || Y1_DQ1_2 || data-sort-value="Y1_XDR0_DQ04" | Y1_XDR0_DQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AT1 || Y1_RQ10 || &gt; BE_Y1_RQ10
| data-sort-value="AG07" | AG7 || Y1_DQ1N_2 || data-sort-value="Y1_XDR0_DQN04" | Y1_XDR0_DQN4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AT2 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG08" | AG8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AT3 || Y1_RQ11 || &gt; BE_Y1_RQ11
| data-sort-value="AG09" | AG9 || {{cellcolors|#333|#fff}} NC_OPEN07 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AT4 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG10" | AG10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AT5 || Y1_RQ_CMD || &gt; BE_Y1_RQ_CMD
| data-sort-value="AG11" | AG11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AT6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG12" | AG12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT7 || Y1_DQ2N_2 || &gt; BE_Y1_XDR1_DQN1
| data-sort-value="AG13" | AG13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT8 || Y1_DQ2N_7 || &gt; BE_Y1_XDR1_DQN13
| data-sort-value="AG14" | AG14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT9 || Y1_DQ3N_0 || &gt; BE_Y1_XDR1_DQN5
| data-sort-value="AG15" | AG15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT10 || Y1_DQ3N_7 || &gt; BE_Y1_XDR1_DQN9
| data-sort-value="AG16" | AG16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT11 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG17" | AG17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT12 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG18" | AG18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT13 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AG19" | AG19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT14 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG20" | AG20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT15 || THERMAL_SENSE_POWER || &lt; +1.5V_BE_THERMAL_VDDA
| data-sort-value="AG21" | AG21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT16 || THERMAL_SENSE_TEST || &gt; R1007 1M +/- 0.5%
| data-sort-value="AG22" | AG22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT17 || STI_THERMAL1 || &gt; STI_THERMAL1
| data-sort-value="AG23" | AG23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT18 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG24" | AG24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT19 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG25" | AG25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT20 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG26" | AG26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT21 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG27" | AG27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT22 || style="color:white; background-color:#993333;" | MC2_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AG28" | AG28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT23 || style="color:white; background-color:#993333;" | MC2_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AG29" | AG29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT24 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG30" | AG30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT25 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AG31" | AG31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AT26 || RX4_RXN1 || &lt; BE_RX4_RXN1
| data-sort-value="AG32" | AG32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AT27 || RX4_RXN3 || &lt; BE_RX4_RXN3
| data-sort-value="AG33" | AG33 || {{cellcolors|#333|#fff}} NC_OPEN32 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AT28 || RX4_RXN5 || &lt; BE_RX4_RXN5
| data-sort-value="AG34" | AG34 || {{cellcolors|#c33|#fff}} TX4_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
|-
| AT29 || RX4_RXN7 || &lt; BE_RX4_RXN7
| data-sort-value="AG35" | AG35 || TX3_TXN3 || BE_TX3_TXN3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AT30 || TX6_TXP5 || &gt; BE_TX6_TXP5
| data-sort-value="AG36" | AG36 || TX3_TXP3 || BE_TX3_TXP3 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AT31 || TX6_TXP3 || &gt; BE_TX6_TXP3
| data-sort-value="AG37" | AG37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AT32 || TX6_TXP1 || &gt; BE_TX6_TXP1
| data-sort-value="AG38" | AG38 || TX3_TXCLKN || BE_TX3_TXCLKN || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AT33 || RC_VOLREF1 || &lt; BE_RC_VOLREF1
| data-sort-value="AG39" | AG39 || TX3_TXCLKP || BE_TX3_TXCLKP || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AT34 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AG40" | AG40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT35 || TX5_TXN5 || .
| data-sort-value="AG41" | AG41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AT36 || TX5_TXP5. || .
| data-sort-value="AG99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AT37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH01" | AH1 || Y1_DQ0_3 || data-sort-value="Y1_XDR0_DQ06" | Y1_XDR0_DQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AT38 || TX5_TXN6 || .
| data-sort-value="AH02" | AH2 || Y1_DQ0N_3 || data-sort-value="Y1_XDR0_DQN06" | Y1_XDR0_DQN6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AT39 || TX5_TXP6 || .
| data-sort-value="AH03" | AH3 || Y1_DQ1_5 || Y1_XDR0_DQ14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AT40 || TX5_TXN4 || .
| data-sort-value="AH04" | AH4 || Y1_DQ1N_5 || Y1_XDR0_DQN14 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AT41 || TX5_TXP4 || .
| data-sort-value="AH05" | AH5 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AH06" | AH6 || Y1_DQ1_4 || Y1_XDR0_DQ12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AU1 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH07" | AH7 || Y1_DQ1N_4 || Y1_XDR0_DQN12 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AU2 || style="color:white; background-color:#993333;" | Y1_DQ2_VREF || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH08" | AH8 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AU3 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH09" | AH9 || {{cellcolors|#333|#fff}} NC_OPEN06 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AU4 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH10" | AH10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AU5 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH11" | AH11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AU6 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH12" | AH12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU7 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH13" | AH13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU8 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH14" | AH14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU9 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH15" | AH15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU10 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH16" | AH16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU11 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH17" | AH17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU12 || style="color:white; background-color:#993333;" | YC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH18" | AH18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU13 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH19" | AH19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU14 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH20" | AH20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU15 || THERMAL_SENSE_RETURN || &lt; GND
| data-sort-value="AH21" | AH21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU16 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH22" | AH22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU17 || STI_THERMAL0 || &gt; STI_THERMAL0
| data-sort-value="AH23" | AH23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU18 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH24" | AH24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU19 || style="color:white; background-color:#993333;" | MC2_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH25" | AH25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU20 || style="color:white; background-color:#993333;" | MC2_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH26" | AH26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU21 || style="color:white; background-color:#993333;" | MC2_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH27" | AH27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU22 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH28" | AH28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU23 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH29" | AH29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU24 || style="color:white; background-color:#993333;" | MC2_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH30" | AH30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU25 || style="color:white; background-color:#993333;" | MC2_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH31" | AH31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AU26 || style="color:white; background-color:#993333;" | RC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH32" | AH32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AU27 || style="color:white; background-color:#993333;" | RC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH33" | AH33 || {{cellcolors|#333|#fff}} NC_OPEN31 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AU28 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH34" | AH34 || {{cellcolors|#333|#fff}} TX4_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AU29 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH35" | AH35 || TX3_TXN5 || BE_TX3_TXN5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AU30 || style="color:white; background-color:#993333;" | RC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH36" | AH36 || TX3_TXP5 || BE_TX3_TXP5 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AU31 || style="color:white; background-color:#993333;" | RC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AH37" | AH37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AU32 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH38" | AH38 || TX3_TXN6 || BE_TX3_TXN6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AU33 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AH39" | AH39 || TX3_TXP6 || BE_TX3_TXP6 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AU34 || RC_VOLGND1 || &lt; BE_RC_VOLGND1
| data-sort-value="AH40" | AH40 || TX3_TXN4 || BE_TX3_TXN4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AU35 || RX3_RXP7 || .
| data-sort-value="AH41" | AH41 || TX3_TXP4 || BE_TX3_TXP4 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AU36 || RX3_RXN7 || .
| data-sort-value="AH99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AU37 || style="color:white; background-color:#993333;" | RC_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AJ01" | AJ1 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU38 || TX5_TXN7 || .
| data-sort-value="AJ02" | AJ2 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AU39 || TX5_TXP7 || .
| data-sort-value="AJ03" | AJ3 || Y1_DQ1_7 || Y1_XDR0_DQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AJ04" | AJ4 || Y1_DQ1N_7 || Y1_XDR0_DQN10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AV1 || Y1_DQ2_RLOAD || &lt; BE_Y1_DQ2_RLOAD
| data-sort-value="AJ05" | AJ5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AV2 || Y1_DQ2_1 || &gt; Y1_XDR0_DQ1
| data-sort-value="AJ06" | AJ6 || Y1_DQ1_6 || data-sort-value="Y1_XDR0_DQ00" | Y1_XDR0_DQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AV3 || Y1_DQ2_5 || &gt; Y1_XDR0_DQ13
| data-sort-value="AJ07" | AJ7 || Y1_DQ1N_6 || data-sort-value="Y1_XDR0_DQN00" | Y1_XDR0_DQN0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
|-
| AV4 || Y1_DQ2_0 || &gt; Y1_XDR0_DQ5
| data-sort-value="AJ08" | AJ8 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AV5 || Y1_DQ3_4 || &gt; Y1_XDR0_DQ9
| data-sort-value="AJ09" | AJ9 || {{cellcolors|#333|#fff}} NC_OPEN05 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AV6 || Y1_DQ2_8 || .
| data-sort-value="AJ10" | AJ10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AV7 || Y1_DQ2_3 || &gt; Y1_XDR1_DQ11
| data-sort-value="AJ11" | AJ11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AV8 || Y1_DQ3_1 || &gt; Y1_XDR1_DQ7
| data-sort-value="AJ12" | AJ12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV9 || Y1_DQ3_3 || &gt; Y1_XDR1_DQ3
| data-sort-value="AJ13" | AJ13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV10 || Y1_DQ3_8 || .
| data-sort-value="AJ14" | AJ14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV11 || YC_BYP_ENA || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AJ15" | AJ15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV12 || YC_TEST_MODE_ST || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AJ16" | AJ16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV13 || SPI_SI || &lt; BE_SPI_D0
| data-sort-value="AJ17" | AJ17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV14 || /TRST || &lt; /BE_TRST
| data-sort-value="AJ18" | AJ18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV15 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AJ19" | AJ19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV16 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AJ20" | AJ20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV17 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AJ21" | AJ21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV18 || PLL_CTL1 || &gt; R1009 100 &gt; Ground
| data-sort-value="AJ22" | AJ22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV19 || TE(TEST ENABLE) || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AJ23" | AJ23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV20 || POWER_GOOD || &lt; BE_POWGOOD
| data-sort-value="AJ24" | AJ24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV21 || /CHECKSTOP_IN_B || &lt; /BE_CHKSTP_IN
| data-sort-value="AJ25" | AJ25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV22 || SPI_CTL1 || &lt; BE_SPI_CTL1
| data-sort-value="AJ26" | AJ26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV23 || PRSO_UPPER_RIGHT_MODULE || .
| data-sort-value="AJ27" | AJ27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV24 || TST_CLK1 || &gt; CL1002
| data-sort-value="AJ28" | AJ28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV25 || RC_SCAN_IN || &gt; R1008 470K &gt; Ground
| data-sort-value="AJ29" | AJ29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV26 || RX4_RXP0 || &lt; BE_RX4_RXP0
| data-sort-value="AJ30" | AJ30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV27 || RX4_RXCLKP || &lt; BE_RX4_RXCLKP
| data-sort-value="AJ31" | AJ31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AV28 || RX4_RXP4 || &lt; BE_RX4_RXP4
| data-sort-value="AJ32" | AJ32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AV29 || TX6_TXN7 || &gt; BE_TX6_TXN7
| data-sort-value="AJ33" | AJ33 || {{cellcolors|#333|#fff}} NC_OPEN30 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AV30 || TX6_TXN6 || &gt; BE_TX6_TXN6
| data-sort-value="AJ34" | AJ34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AV31 || TX6_TXCLKN || &gt; BE_TX6_TXCLKN
| data-sort-value="AJ35" | AJ35 || TX4_TXN1 || data-sort-value="BE_TX4_TXN1" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AV32 || TX6_TXN2 || &gt; BE_TX6_TXN2
| data-sort-value="AJ36" | AJ36 || TX4_TXP1 || data-sort-value="BE_TX4_TXP1" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AV33 || style="color:white; background-color:#993333;" | RC_ROLREF1 || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AJ37" | AJ37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AV34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AJ38" | AJ38 || TX3_TXN7 || BE_TX3_TXN7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AV35 || RX3_RXP5 || .
| data-sort-value="AJ39" | AJ39 || TX3_TXP7 || BE_TX3_TXP7 || {{pino}} || Connected to [[RSX]] pad <abbr title="Unknown">UNK</abbr> ([[Template:RSX pad layout 41x41|41x41 layout]])
|-
|-
| AV36 || RX3_RXN5 || .
| data-sort-value="AJ40" | AJ40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AJ41" | AJ41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AV38 || RX3_RXP4 || .
| data-sort-value="AJ99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AV39 || RX3_RXN4 || .
| data-sort-value="AK01" | AK1 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AV40 || RX3_RXP6 || .
| data-sort-value="AK02" | AK2 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AV41 || RX3_RXN6 || .
| data-sort-value="AK03" | AK3 || Y1_RQ_RST || BE_Y1_RQ_RST || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad C15. Serial reset
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AK04" | AK4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AW1 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AK05" | AK5 || Y1_RQ_SRD || BE_Y1_RQ_SRD || {{pini}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad C16. Serial data in/out ?
|-
|-
| AW2 || Y1_DQ2N_1 || &gt; Y1_XDR0_DQN1
| data-sort-value="AK06" | AK6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AW3 || Y1_DQ2N_5 || &gt; Y1_XDR0_DQN13
| data-sort-value="AK07" | AK7 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AW4 || Y1_DQ2N_0 || &gt; Y1_XDR0_DQN5
| data-sort-value="AK08" | AK8 || {{cellcolors|#333|#fff}} Y1_RQ_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AW5 || Y1_DQ3N_4 || &gt; Y1_XDR0_DQN9
| data-sort-value="AK09" | AK9 || {{cellcolors|#333|#fff}} NC_OPEN04 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AW6 || Y1_DQ2N_8 || .
| data-sort-value="AK10" | AK10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AW7 || Y1_DQ2N_3 || &gt; Y1_XDR1_DQN11
| data-sort-value="AK11" | AK11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AW8 || Y1_DQ3N_1 || &gt; Y1_XDR1_DQN7
| data-sort-value="AK12" | AK12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW9 || Y1_DQ3N_3 || &gt; Y1_XDR1_DQN3
| data-sort-value="AK13" | AK13 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW10 || Y1_DQ3N_8 || .
| data-sort-value="AK14" | AK14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW11 || YC_SCAN_IN || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AK15" | AK15 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW12 || TMS || &lt; BE_TMS
| data-sort-value="AK16" | AK16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW13 || TDI || &lt; BE_TDI
| data-sort-value="AK17" | AK17 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW14 || TDO || &gt; BE_TDO
| data-sort-value="AK18" | AK18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW15 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AK19" | AK19 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW16 || NT_TST02 || .
| data-sort-value="AK20" | AK20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW17 || PLL_NC || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AK21" | AK21 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW18 || PLL_CTL0 || &gt; R1011 100 &gt; Ground
| data-sort-value="AK22" | AK22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW19 || ATTENTION || &gt; BE_INT
| data-sort-value="AK23" | AK23 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW20 || /HARD_RESET || &lt; /BE_HARD_RESET
| data-sort-value="AK24" | AK24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW21 || /CHECKSTOP_OUT_B || &gt; /BE_CHKSTP_OUT
| data-sort-value="AK25" | AK25 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW22 || SPI_CTL0 || &lt; BE_SPI_CTL0
| data-sort-value="AK26" | AK26 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW23 || GRID_TEST || .
| data-sort-value="AK27" | AK27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW24 || TST_CLK0 || &gt; CL1003
| data-sort-value="AK28" | AK28 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW25 || RC_SCAN_OUT || .
| data-sort-value="AK29" | AK29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW26 || RX4_RXN0 || &lt; BE_RX4_RXN0
| data-sort-value="AK30" | AK30 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| AW27 || RX4_RXCLKN || &lt; BE_RX4_RXCLKN
| data-sort-value="AK31" | AK31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AW28 || RX4_RXN4 || &lt; BE_RX4_RXN4
| data-sort-value="AK32" | AK32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AW29 || TX6_TXP7 || &gt; BE_TX6_TXP7
| data-sort-value="AK33" | AK33 || {{cellcolors|#333|#fff}} NC_OPEN29 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AW30 || TX6_TXP6 || &gt; BE_TX6_TXP6
| data-sort-value="AK34" | AK34 || {{cellcolors|#d53|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
|-
| AW31 || TX6_TXCLKP || &gt; BE_TX6_TXCLKP
| data-sort-value="AK35" | AK35 || TX4_TXN3 || data-sort-value="BE_TX4_TXN3" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AW32 || TX6_TXP2 || &gt; BE_TX6_TXP2
| data-sort-value="AK36" | AK36 || TX4_TXP3 || data-sort-value="BE_TX4_TXP3" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AW33 || RC_RLOAD1 || &lt; BE_RC_RLOAD1
| data-sort-value="AK37" | AK37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AW34 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AK38" | AK38 || TX4_TXN2 || data-sort-value="BE_TX4_TXN2" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AW35 || RX3_RXP3 || &lt; BE_RX3_RXP3
| data-sort-value="AK39" | AK39 || TX4_TXP2 || data-sort-value="BE_TX4_TXP2" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AW36 || RX3_RXN3 || &lt; BE_RX3_RXN3
| data-sort-value="AK40" | AK40 || TX4_TXN0 || data-sort-value="BE_TX4_TXN0" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AW37 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AK41" | AK41 || TX4_TXP0 || data-sort-value="BE_TX4_TXP0" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| AW38 || RX3_RXCLKP || .
| data-sort-value="AK99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| AW39 || RX3_RXCLKN || .
| data-sort-value="AL01" | AL1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AL02" | AL2 || data-sort-value="Y1_RQ00" {{cellcolors|#ff0}} Y1_RQ0 || data-sort-value="BE_Y1_RQ00" | BE_Y1_RQ0 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad C3. 12-bit request/command bus
|-
|-
| AY1 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL03" | AL3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY2 || Y1_DQ2_4 || &gt; Y1_XDR0_DQ11
| data-sort-value="AL04" | AL4 || data-sort-value="Y1_RQ01" {{cellcolors|#ff0}} Y1_RQ1 || data-sort-value="BE_Y1_RQ01" | BE_Y1_RQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D13. 12-bit request/command bus
|-
|-
| AY3 || Y1_DQ2_6 || &gt; Y1_XDR0_DQ7
| data-sort-value="AL05" | AL5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY4 || Y1_DQ3_2 || &gt; Y1_XDR0_DQ15
| data-sort-value="AL06" | AL6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY5 || Y1_DQ3_5 || &gt; Y1_XDR0_DQ3
| data-sort-value="AL07" | AL7 || Y1_DQC_VOLREF || BE_Y1_DQC_VOLREF || {{pini}} || Resistor 95.3 ohms to +1.2V_YC_RC_VDDIO
|-
|-
| AY6 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL08" | AL8 || {{cellcolors|#c33|#fff}} Y1_RQ_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
|-
| AY8 || Y1_DQ3_6 || &gt; Y1_XDR1_DQ15
| data-sort-value="AL09" | AL9 || {{cellcolors|#333|#fff}} NC_OPEN03 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY10 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL10" | AL10 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AY11 || YC_RSRV0 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AL11" | AL11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY13 || SPI_CLK || &lt; R1014 0 &lt; BE_SPI_CLK
| data-sort-value="AL12" | AL12 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AY15 || /PLL_REFCLK_B || &lt; BE_PLL_REFCLK_N
| data-sort-value="AL13" | AL13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY17 || NT_TST01 || .
| data-sort-value="AL14" | AL14 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AY19 || EXT_CLK_EN || &gt; R1012 100 &gt; Ground
| data-sort-value="AL15" | AL15 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY21 || style="color:white; background-color:#993333;" | MC2_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL16" | AL16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY23 || style="color:white; background-color:#993333;" | MC2_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL17" | AL17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY25 || RC_REFCLKN || &lt; BE_RC_REFCLK_N
| data-sort-value="AL18" | AL18 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AY26 || RX4_RXP2 || &lt; BE_RX4_RXP2
| data-sort-value="AL19" | AL19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY28 || RX4_RXP6 || &lt; BE_RX4_RXP6
| data-sort-value="AL20" | AL20 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AY30 || TX6_TXN4 || &gt; BE_TX6_TXN4
| data-sort-value="AL21" | AL21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY32 || TX6_TXN0 || &gt; BE_TX6_TXN0
| data-sort-value="AL22" | AL22 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AY34 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL23" | AL23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY35 || RX3_RXP1 || .
| data-sort-value="AL24" | AL24 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AY36 || RX3_RXN1 || .
| data-sort-value="AL25" | AL25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL26" | AL26 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AY38 || RX3_RXP0 || .
| data-sort-value="AL27" | AL27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY39 || RX3_RXN0 || .
| data-sort-value="AL28" | AL28 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| AY40 || RX3_RXP2 || .
| data-sort-value="AL29" | AL29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| AY41 || RX3_RXN2 || .
| data-sort-value="AL30" | AL30 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| colspan="3" style="border-left:hidden; border-right:hidden" | &nbsp;
| data-sort-value="AL31" | AL31 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA1 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL32" | AL32 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| BA2 || Y1_DQ2N_4 || &gt; Y1_XDR0_DQN11
| data-sort-value="AL33" | AL33 || {{cellcolors|#333|#fff}} NC_OPEN28 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA3 || Y1_DQ2N_6 || &gt; Y1_XDR0_DQN7
| data-sort-value="AL34" | AL34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA4 || Y1_DQ3N_2 || &gt; Y1_XDR0_DQN15
| data-sort-value="AL35" | AL35 || TX4_TXN5 || data-sort-value="BE_TX4_TXN5" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| BA5 || Y1_DQ3N_5 || &gt; Y1_XDR0_DQN3
| data-sort-value="AL36" | AL36 || TX4_TXP5 || data-sort-value="BE_TX4_TXP5" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| BA6 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL37" | AL37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA8 || Y1_DQ3N_6 || &gt; Y1_XDR1_DQN15
| data-sort-value="AL38" | AL38 || TX4_TXCLKN || data-sort-value="BE_TX4_TXCLKN" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| BA10 || style="color:white; background-color:#993333;" | YC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AL39" | AL39 || TX4_TXCLKP || data-sort-value="BE_TX4_TXCLKP" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
|-
| BA11 || YC_RSRV1 || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AL40" | AL40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| BA13 || TCK || &lt; BE_TCK
| data-sort-value="AL41" | AL41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
|-
| BA15 || PLL_REFCLK || &lt; BE_PLL_REFCLK_P
| data-sort-value="AL99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |  
|-
|-
| BA17 || PLL_BGA || &gt; CL1004
| data-sort-value="AM01" | AM1 || data-sort-value="Y1_RQ03" {{cellcolors|#ff0}} Y1_RQ3 || data-sort-value="BE_Y1_RQ03" | BE_Y1_RQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D4. 12-bit request/command bus
|-
|-
| BA19 || EXT_CLK || &gt; R1015 49.9 +/- 1%
| data-sort-value="AM02" | AM2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA21 || style="color:white; background-color:#993333;" | MC2_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AM03" | AM3 || data-sort-value="Y1_RQ05" {{cellcolors|#ff0}} Y1_RQ5 || data-sort-value="BE_Y1_RQ05" | BE_Y1_RQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad E14. 12-bit request/command bus
|-
|-
| BA23 || style="color:white; background-color:#993333;" | MC2_VDDID || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AM04" | AM4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA25 || RC_REFCLKP || &lt; BE_RC_REFCLK_P
| data-sort-value="AM05" | AM5 || data-sort-value="Y1_RQ02" {{cellcolors|#ff0}} Y1_RQ2 || data-sort-value="BE_Y1_RQ02" | BE_Y1_RQ2 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D14. 12-bit request/command bus
|-
|-
| BA26 || RX4_RXN2 || &lt; BE_RX4_RXN2
| data-sort-value="AM06" | AM6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA28 || RX4_RXN6 || &lt; BE_RX4_RXN6
| data-sort-value="AM07" | AM7 || Y1_DQC_VOLGND || BE_Y1_DQC_VOLGND || {{pini}} || Capacitor 0.1uf/10v to +1.2V_YC_RC_VDDIO
|-
|-
| BA30 || TX6_TXP4 || &gt; BE_TX6_TXP4
| data-sort-value="AM08" | AM8 || {{cellcolors|#333|#fff}} Y1_DQ2_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA32 || TX6_TXP0 || &gt; BE_TX6_TXP0
| data-sort-value="AM09" | AM9 || {{cellcolors|#333|#fff}} NC_OPEN02 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA34 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AM10" | AM10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA35 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AM11" | AM11 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| BA36 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AM12" | AM12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA37 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AM13" | AM13 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| BA38 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AM14" | AM14 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA39 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AM15" | AM15 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
|-
| BA40 || style="color:white; background-color:#993333;" | RC_VDDIO || style="color:white; background-color:#993333;" | +1.2V VDD
| data-sort-value="AM16" | AM16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
|-
| BA41 || style="color:white; background-color:#333333;" | GND || style="color:white; background-color:#333333;" | Ground
| data-sort-value="AM17" | AM17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM18" | AM18 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM19" | AM19 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM20" | AM20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM21" | AM21 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM22" | AM22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM23" | AM23 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM24" | AM24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM25" | AM25 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM26" | AM26 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM27" | AM27 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM28" | AM28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM29" | AM29 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM30" | AM30 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM31" | AM31 || {{cellcolors|#f93|#fff}} VDD || +1.0V_BE_VDDC || {{pin}} || data-sort-value="Z1.0V" | Connected to [[Regulators#iPowIR_IP2003ATRPBF_.2840A_Synchronous_Buck_Multiphase_Optimized_LGA_Power_Block.29|iPowIR IP2003ATRPBF]] (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
|-
| data-sort-value="AM32" | AM32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM33" | AM33 || {{cellcolors|#333|#fff}} NC_OPEN27 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM34" | AM34 || {{cellcolors|#333|#fff}} TX5_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AM35" | AM35 || TX4_TXN7 || data-sort-value="BE_TX4_TXN7" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AM36" | AM36 || TX4_TXP7 || data-sort-value="BE_TX4_TXP7" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AM37" | AM37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AM38" | AM38 || TX4_TXN6 || data-sort-value="BE_TX4_TXN6" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AM39" | AM39 || TX4_TXP6 || data-sort-value="BE_TX4_TXP6" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AM40" | AM40 || TX4_TXN4 || data-sort-value="BE_TX4_TXN4" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AM41" | AM41 || TX4_TXP4 || data-sort-value="BE_TX4_TXP4" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AM99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |
|-
| data-sort-value="AN01" | AN1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN02" | AN2 || data-sort-value="Y1_RQ04" {{cellcolors|#ff0}} Y1_RQ4 || data-sort-value="BE_Y1_RQ04" | BE_Y1_RQ4 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D3. 12-bit request/command bus
|-
| data-sort-value="AN03" | AN3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN04" | AN4 || data-sort-value="Y1_RQ06" {{cellcolors|#ff0}} Y1_RQ6 || data-sort-value="BE_Y1_RQ06" | BE_Y1_RQ6 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G14. 12-bit request/command bus
|-
| data-sort-value="AN05" | AN5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN06" | AN6 || Y1_RQ_VREF || BE_Y1_RQ_VREF || {{pini}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) power circuit
|-
| data-sort-value="AN07" | AN7 || Y1_DQC_ROLREF || BE_Y1_DQC_ROLREF || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AN08" | AN8 || {{cellcolors|#c33|#fff}} Y1_DQ2_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="AN09" | AN9 || {{cellcolors|#333|#fff}} NC_OPEN01 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN10" | AN10 || {{cellcolors|#333|#fff}} NC_OPEN51 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN11" | AN11 || {{cellcolors|#333|#fff}} NC_OPEN52 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN12" | AN12 || {{cellcolors|#333|#fff}} NC_OPEN53 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN13" | AN13 || {{cellcolors|#333|#fff}} NC_OPEN54 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN14" | AN14 || {{cellcolors|#333|#fff}} NC_OPEN55 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN15" | AN15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN16" | AN16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN17" | AN17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN18" | AN18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN19" | AN19 || {{cellcolors|#333|#fff}} NC_OPEN56 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN20" | AN20 || {{cellcolors|#333|#fff}} NC_OPEN57 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN21" | AN21 || {{cellcolors|#333|#fff}} NC_OPEN58 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN22" | AN22 || {{cellcolors|#333|#fff}} NC_OPEN59 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN23" | AN23 || {{cellcolors|#333|#fff}} NC_OPEN60 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN24" | AN24 || {{cellcolors|#333|#fff}} NC_OPEN61 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN25" | AN25 || {{cellcolors|#333|#fff}} NC_OPEN62 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN26" | AN26 || {{cellcolors|#333|#fff}} NC_OPEN63 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN27" | AN27 || {{cellcolors|#333|#fff}} NC_OPEN64 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN28" | AN28 || {{cellcolors|#333|#fff}} NC_OPEN65 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN29" | AN29 || {{cellcolors|#333|#fff}} NC_OPEN66 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN30" | AN30 || {{cellcolors|#333|#fff}} NC_OPEN67 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN31" | AN31 || {{cellcolors|#333|#fff}} NC_OPEN68 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN32" | AN32 || {{cellcolors|#333|#fff}} NC_OPEN69 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN33" | AN33 || {{cellcolors|#333|#fff}} NC_OPEN26 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN34" | AN34 || {{cellcolors|#c33|#fff}} TX5_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AN35" | AN35 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN36" | AN36 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN37" | AN37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AN38" | AN38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AN39" | AN39 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AN40" | AN40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AN41" | AN41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AN99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |
|-
| data-sort-value="AP01" | AP1 || Y1_RQ_CTMP || BE_Y1_RQ_CTM || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] clock generator (IC5002) pin 18 (Clock To Master)
|-
| data-sort-value="AP02" | AP2 || Y1_RQ_CTMN || BE_Y1_RQ_CTMN || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] clock generator (IC5002) pin 19 (Clock To Master)
|-
| data-sort-value="AP03" | AP3 || data-sort-value="Y1_RQ07" {{cellcolors|#ff0}} Y1_RQ7 || data-sort-value="BE_Y1_RQ07" | BE_Y1_RQ7 || {{pini}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G13. 12-bit request/command bus
|-
| data-sort-value="AP04" | AP4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP05" | AP5 || data-sort-value="Y1_RQ08" {{cellcolors|#ff0}} Y1_RQ8 || data-sort-value="BE_Y1_RQ08" | BE_Y1_RQ8 || {{pini}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H14. 12-bit request/command bus
|-
| data-sort-value="AP06" | AP6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP07" | AP7 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP08" | AP8 || {{cellcolors|#c33|#fff}} Y1_DQ3_VDDA || +1.5V_BE_YC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through XIO filters
|-
| data-sort-value="AP09" | AP9 || {{cellcolors|#333|#fff}} Y1_DQ3_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP10" | AP10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP11" | AP11 || {{cellcolors|#333|#fff}} YC_SCAN_EN || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP12" | AP12 || {{cellcolors|#333|#fff}} YC_TREF || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP13" | AP13 || SPI_EN_B || BE_SPI_CS || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad M2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AP14" | AP14 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP15" | AP15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP16" | AP16 || {{cellcolors|#930|#fff}} PLL_VDDA || BE_PLL_VDDA || {{pini}} || data-sort-value="Z1.6V" | Connected to [[Regulators#Texas_Instruments_TPS73101DBVRG4_.28Single_Output_LDO.2C_150mA.2C_Adj._1.2-5.5V_SOT23-5.29 | Texas Instruments TPS73101DBVRG4]] pin 5 through coil (+1.6V_BE_VDDA)
|-
| data-sort-value="AP17" | AP17 || {{cellcolors|#333|#fff}} PLL_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP18" | AP18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP19" | AP19 || SYS_CONFIG2 || BE_SYS_CONF2 || {{pini}} || Resistor 100 ohms to GND
|-
| data-sort-value="AP20" | AP20 || SYS_CONFIG0 || BE_SYS_CONF0 || {{pini}} || Resistor 100 ohms to GND
|-
| data-sort-value="AP21" | AP21 || PSARE2 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected (testpad CL1001)
|-
| data-sort-value="AP22" | AP22 || TBEN || BE_TBEN || {{pini}} || Resistor 10K ohms to +1.2V_MC2_VDDIO
|-
| data-sort-value="AP23" | AP23 || THERMAL_OVERLOAD_B || BE_THR_ALRT || {{pino}} || Connected to [[Syscon Hardware|Syscon]] pad E9 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AP24" | AP24 || TRIGGER_IN || BE_TRG_IN || {{pini}} || Resistor 100 ohms to GND
|-
| data-sort-value="AP25" | AP25 || RC_SCAN_EN ||  || {{pin}} || Resistor 470K ohms (R1005) to GND
|-
| data-sort-value="AP26" | AP26 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AP27" | AP27 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP28" | AP28 || {{cellcolors|#333|#fff}} RX4_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP29" | AP29 || {{cellcolors|#c33|#fff}} RX4_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AP30" | AP30 || {{cellcolors|#c33|#fff}} TX6_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AP31" | AP31 || {{cellcolors|#333|#fff}} TX6_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP32" | AP32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP33" | AP33 || {{cellcolors|#333|#fff}} RX3_GNDA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP34" | AP34 || {{cellcolors|#c33|#fff}} RX3_VDDA || +1.5V_BE_RC_VDDA || {{pin}} || data-sort-value="Z1.5V" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SI4866DY-T1-E3/2622290 Vishay Siliconix SI4866DY-T1-E3] pins 1,2,3 through RRAC filters
|-
| data-sort-value="AP35" | AP35 || TX5_TXN1 || data-sort-value="BE_TX5_TXN1" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AP36" | AP36 || TX5_TXP1 || data-sort-value="BE_TX5_TXP1" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AP37" | AP37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AP38" | AP38 || TX5_TXN2 || data-sort-value="BE_TX5_TXN2" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AP39" | AP39 || TX5_TXP2 || data-sort-value="BE_TX5_TXP2" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AP40" | AP40 || TX5_TXN0 || data-sort-value="BE_TX5_TXN0" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AP41" | AP41 || TX5_TXP0 || data-sort-value="BE_TX5_TXP0" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AP99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |
|-
| data-sort-value="AR01" | AR1 || Y1_RQ_CFMN || BE_Y1_RQ_CFMN || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G4. (Clock From Master)
|-
| data-sort-value="AR02" | AR2 || Y1_RQ_CFMP || BE_Y1_RQ_CFM || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G3. (Clock From Master)
|-
| data-sort-value="AR03" | AR3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR04" | AR4 || data-sort-value="Y1_RQ09" {{cellcolors|#ff0}} Y1_RQ9 || data-sort-value="BE_Y1_RQ09" | BE_Y1_RQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H13. 12-bit request/command bus
|-
| data-sort-value="AR05" | AR5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR06" | AR6 || Y1_RQ_SCK || BE_Y1_RQ_SCK || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad J15. Serial clock
|-
| data-sort-value="AR07" | AR7 || Y1_DQ2_2 || data-sort-value="Y1_XDR1_DQ01" | Y1_XDR1_DQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR08" | AR8 || Y1_DQ2_7 || Y1_XDR1_DQ13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR09" | AR9 || Y1_DQ3_0 || data-sort-value="Y1_XDR1_DQ05" | Y1_XDR1_DQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR10" | AR10 || Y1_DQ3_7 || data-sort-value="Y1_XDR1_DQ09" | Y1_XDR1_DQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR11" | AR11 || {{cellcolors|#333|#fff}} YC_XCLK_EN || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR12" | AR12 || YC_SCAN_OUT || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AR13" | AR13 || SPI_SO || BE_SPI_DI || {{pino}} || Connected to [[Syscon Hardware|Syscon]] pad M1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) through R1013 47
|-
| data-sort-value="AR14" | AR14 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR15" | AR15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR16" | AR16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR17" | AR17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR18" | AR18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR19" | AR19 || SYS_CONFIG1 || BE_SYS_CONF1 || {{pini}} || Resistor 100 ohms to GND
|-
| data-sort-value="AR20" | AR20 || SYS_CONFIG3 || BE_SYS_CONF3 || {{pini}} || Resistor 100 ohms to GND
|-
| data-sort-value="AR21" | AR21 || SPARE1 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AR22" | AR22 || PULSE_LIMIT_BYPASS || BE_P_L_BYPASS || {{pini}} || Resistor 10K ohms to +1.2V_MC2_VDDIO
|-
| data-sort-value="AR23" | AR23 || SCAN_ENABLE_BYPASS || BE_SCAN_ENA || {{pini}} || Resistor 100 ohms to GND
|-
| data-sort-value="AR24" | AR24 || TRIGGER_OUT || BE_TRG_OUT || {{pino}} || Resistor 10K ohms to GND
|-
| data-sort-value="AR25" | AR25 || {{cellcolors|#333|#fff}} RC_TEST_MODE_ST || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR26" | AR26 || RX4_RXP1 || BE_RX4_RXP1 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR27" | AR27 || RX4_RXP3 || BE_RX4_RXP3 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR28" | AR28 || RX4_RXP5 || BE_RX4_RXP5 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR29" | AR29 || RX4_RXP7 || BE_RX4_RXP7 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR30" | AR30 || TX6_TXN5 || BE_TX6_TXN5 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR31" | AR31 || TX6_TXN3 || BE_TX6_TXN3 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR32" | AR32 || TX6_TXN1 || BE_TX6_TXN1 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AR33" | AR33 || NT_TST04 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AR34" | AR34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR35" | AR35 || TX5_TXN3 || data-sort-value="BE_TX5_TXN3" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AR36" | AR36 || TX5_TXP3 || data-sort-value="BE_TX5_TXP3" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AR37" | AR37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AR38" | AR38 || TX5_TXCLKN || data-sort-value="BE_TX5_TXCLKN" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AR39" | AR39 || TX5_TXCLKP || data-sort-value="BE_TX5_TXCLKP" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AR40" | AR40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AR41" | AR41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AR99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |
|-
| data-sort-value="AT01" | AT1 || {{cellcolors|#ff0}} Y1_RQ10 || BE_Y1_RQ10 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H3. 12-bit request/command bus
|-
| data-sort-value="AT02" | AT2 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT03" | AT3 || {{cellcolors|#ff0}} Y1_RQ11 || BE_Y1_RQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H4. 12-bit request/command bus
|-
| data-sort-value="AT04" | AT4 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT05" | AT5 || Y1_RQ_CMD || BE_Y1_RQ_CMD || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad J14. Serial commands
|-
| data-sort-value="AT06" | AT6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT07" | AT7 || Y1_DQ2N_2 || data-sort-value="Y1_XDR1_DQN01" | Y1_XDR1_DQN1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT08" | AT8 || Y1_DQ2N_7 || Y1_XDR1_DQN13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT09" | AT9 || Y1_DQ3N_0 || data-sort-value="Y1_XDR1_DQN05" | Y1_XDR1_DQN5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT10" | AT10 || Y1_DQ3N_7 || data-sort-value="Y1_XDR1_DQN09" | Y1_XDR1_DQN9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT11" | AT11 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT12" | AT12 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT13" | AT13 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AT14" | AT14 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT15" | AT15 || {{cellcolors|#930|#fff}} THERMAL_SENSE_POWER || +1.6V_BE_VDDA || {{pini}} || data-sort-value="Z1.6V" | Connected to [[Regulators#Texas_Instruments_TPS73101DBVRG4_.28Single_Output_LDO.2C_150mA.2C_Adj._1.2-5.5V_SOT23-5.29 | Texas Instruments TPS73101DBVRG4]] pin 5
|-
| data-sort-value="AT16" | AT16 || THERMAL_SENSE_TEST ||  || {{pin}} || Resistor 1M ohms (R1007) to GND
|-
| data-sort-value="AT17" | AT17 || STI_THERMAL1 || STI_THERMAL1 || {{pino}} || Connected to [[Thermal#CELL_.281st_BE_Primary.29|Temperature Monitor]] pin 3 through 100 ohm resistor
|-
| data-sort-value="AT18" | AT18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT19" | AT19 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT20" | AT20 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT21" | AT21 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT22" | AT22 || {{cellcolors|#e63|#fff}} MC2_VDDIO || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AT23" | AT23 || {{cellcolors|#e63|#fff}} MC2_VDDIO || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AT24" | AT24 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT25" | AT25 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AT26" | AT26 || RX4_RXN1 || BE_RX4_RXN1 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT27" | AT27 || RX4_RXN3 || BE_RX4_RXN3 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT28" | AT28 || RX4_RXN5 || BE_RX4_RXN5 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT29" | AT29 || RX4_RXN7 || BE_RX4_RXN7 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT30" | AT30 || TX6_TXP5 || BE_TX6_TXP5 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT31" | AT31 || TX6_TXP3 || BE_TX6_TXP3 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT32" | AT32 || TX6_TXP1 || BE_TX6_TXP1 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AT33" | AT33 || RC_VOLREF1 || BE_RC_VOLREF1 || {{pini}} || Resistor 56.2 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AT34" | AT34 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AT35" | AT35 || TX5_TXN5 || data-sort-value="BE_TX5_TXN5" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AT36" | AT36 || TX5_TXP5 || data-sort-value="BE_TX5_TXP5" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AT37" | AT37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AT38" | AT38 || TX5_TXN6 || data-sort-value="BE_TX5_TXN6" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AT39" | AT39 || TX5_TXP6 || data-sort-value="BE_TX5_TXP6" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AT40" | AT40 || TX5_TXN4 || data-sort-value="BE_TX5_TXN4" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AT41" | AT41 || TX5_TXP4 || data-sort-value="BE_TX5_TXP4" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AT99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |
|-
| data-sort-value="AU01" | AU1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU02" | AU2 || {{cellcolors|#d53|#fff}} Y1_DQ2_VREF || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU03" | AU3 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU04" | AU4 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU05" | AU5 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU06" | AU6 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU07" | AU7 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU08" | AU8 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU09" | AU9 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU10" | AU10 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU11" | AU11 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU12" | AU12 || {{cellcolors|#d53|#fff}} YC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU13" | AU13 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU14" | AU14 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU15" | AU15 || {{cellcolors|#333|#fff}} THERMAL_SENSE_RETURN || GND || {{pini}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU16" | AU16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU17" | AU17 || STI_THERMAL0 || STI_THERMAL0 || {{pino}} || Connected to [[Thermal#CELL_.281st_BE_Primary.29|Temperature Monitor]] pin 2 through 100 ohm resistor
|-
| data-sort-value="AU18" | AU18 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU19" | AU19 || {{cellcolors|#e63|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU20" | AU20 || {{cellcolors|#e63|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU21" | AU21 || {{cellcolors|#e63|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU22" | AU22 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU23" | AU23 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU24" | AU24 || {{cellcolors|#e63|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU25" | AU25 || {{cellcolors|#e63|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AU26" | AU26 || {{cellcolors|#d53|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU27" | AU27 || {{cellcolors|#d53|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU28" | AU28 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU29" | AU29 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU30" | AU30 || {{cellcolors|#d53|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU31" | AU31 || {{cellcolors|#d53|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU32" | AU32 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU33" | AU33 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AU34" | AU34 || RC_VOLGND1 || BE_RC_VOLGND1 || {{pini}} || Capacitor 0.1uf/10v to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AU35" | AU35 || RX3_RXP7 || data-sort-value="BE_RX3_RXP7" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AU36" | AU36 || RX3_RXN7 || data-sort-value="BE_RX3_RXN7" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AU37" | AU37 || {{cellcolors|#d53|#fff}} RC_VDDID || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AU38" | AU38 || TX5_TXN7 || data-sort-value="BE_TX5_TXN7" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AU39" | AU39 || TX5_TXP7 || data-sort-value="BE_TX5_TXP7" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AU40" | AU40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AU41" | AU41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AU99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |
|-
| data-sort-value="AV01" | AV1 || Y1_DQ2_RLOAD || BE_Y1_DQ2_RLOAD || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AV02" | AV2 || Y1_DQ2_1 || data-sort-value="Y1_XDR0_DQ01" | Y1_XDR0_DQ1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV03" | AV3 || Y1_DQ2_5 || Y1_XDR0_DQ13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV04" | AV4 || Y1_DQ2_0 || data-sort-value="Y1_XDR0_DQ05" | Y1_XDR0_DQ5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV05" | AV5 || Y1_DQ3_4 || data-sort-value="Y1_XDR0_DQ09" | Y1_XDR0_DQ9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV06" | AV6 || Y1_DQ2_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AV07" | AV7 || Y1_DQ2_3 || Y1_XDR1_DQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV08" | AV8 || Y1_DQ3_1 || data-sort-value="Y1_XDR1_DQ07" | Y1_XDR1_DQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV09" | AV9 || Y1_DQ3_3 || data-sort-value="Y1_XDR1_DQ03" | Y1_XDR1_DQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV10" | AV10 || Y1_DQ3_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AV11" | AV11 || {{cellcolors|#333|#fff}} YC_BYP_ENA || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AV12" | AV12 || {{cellcolors|#333|#fff}} YC_TEST_MODE_ST || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AV13" | AV13 || SPI_SI || BE_SPI_DO || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad N2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AV14" | AV14 || TRST || BE_TRST || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected (testpad CL1107)
|-
| data-sort-value="AV15" | AV15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AV16" | AV16 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AV17" | AV17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AV18" | AV18 || PLL_CTL1 ||  || {{pin}} || Resistor 100 ohms (R1009) to GND
|-
| data-sort-value="AV19" | AV19 || {{cellcolors|#333|#fff}} TE(TEST ENABLE) || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AV20" | AV20 || POWER_GOOD || BE_POWGOOD || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad P1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AV21" | AV21 || CHECKSTOP_IN_B || BE_CHKSTP_IN || {{pini}} || Resistor 10K ohms to +1.2V_MC2_VDDIO... and others
|-
| data-sort-value="AV22" | AV22 || SPI_CTL1 || BE_SPI_CTL1 || {{pini}} || Resistor 100 ohms to GND
|-
| data-sort-value="AV23" | AV23 || PRSO_UPPER_RIGHT_MODULE || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AV24" | AV24 || TST_CLK1 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected (testpad CL1002)
|-
| data-sort-value="AV25" | AV25 || RC_SCAN_IN ||  || {{pin}} || Resistor 470K ohms (R1008) to GND
|-
| data-sort-value="AV26" | AV26 || RX4_RXP0 || BE_RX4_RXP0 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV27" | AV27 || RX4_RXCLKP || BE_RX4_RXCLKP || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV28" | AV28 || RX4_RXP4 || BE_RX4_RXP4 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV29" | AV29 || TX6_TXN7 || BE_TX6_TXN7 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV30" | AV30 || TX6_TXN6 || BE_TX6_TXN6 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV31" | AV31 || TX6_TXCLKN || BE_TX6_TXCLKN || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV32" | AV32 || TX6_TXN2 || BE_TX6_TXN2 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AV33" | AV33 || {{cellcolors|#d53|#fff}} RC_ROLREF1 || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AV34" | AV34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AV35" | AV35 || RX3_RXP5 || data-sort-value="BE_RX3_RXP5" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AV36" | AV36 || RX3_RXN5 || data-sort-value="BE_RX3_RXN5" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AV37" | AV37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AV38" | AV38 || RX3_RXP4 || data-sort-value="BE_RX3_RXP4" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AV39" | AV39 || RX3_RXN4 || data-sort-value="BE_RX3_RXN4" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AV40" | AV40 || RX3_RXP6 || data-sort-value="BE_RX3_RXP6" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AV41" | AV41 || RX3_RXN6 || data-sort-value="BE_RX3_RXN6" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AV99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |
|-
| data-sort-value="AW01" | AW1 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AW02" | AW2 || Y1_DQ2N_1 || data-sort-value="Y1_XDR0_DQN01" | Y1_XDR0_DQN1 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW03" | AW3 || Y1_DQ2N_5 || Y1_XDR0_DQN13 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW04" | AW4 || Y1_DQ2N_0 || data-sort-value="Y1_XDR0_DQN05" | Y1_XDR0_DQN5 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW05" | AW5 || Y1_DQ3N_4 || data-sort-value="Y1_XDR0_DQN09" | Y1_XDR0_DQN9 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW06" | AW6 || Y1_DQ2N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AW07" | AW7 || Y1_DQ2N_3 || Y1_XDR1_DQN11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW08" | AW8 || Y1_DQ3N_1 || data-sort-value="Y1_XDR1_DQN07" | Y1_XDR1_DQN7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW09" | AW9 || Y1_DQ3N_3 || data-sort-value="Y1_XDR1_DQN03" | Y1_XDR1_DQN3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW10" | AW10 || Y1_DQ3N_8 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AW11" | AW11 || {{cellcolors|#333|#fff}} YC_SCAN_IN || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AW12" | AW12 || TMS || BE_TMS || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected (testpad CL1106)
|-
| data-sort-value="AW13" | AW13 || TDI || BE_TDI || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected (testpad CL1104)
|-
| data-sort-value="AW14" | AW14 || TDO || BE_TDO || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected (testpad CL1103)
|-
| data-sort-value="AW15" | AW15 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AW16" | AW16 || NT_TST02 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AW17" | AW17 || {{cellcolors|#333|#fff}} PLL_NC || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AW18" | AW18 || PLL_CTL0 ||  || {{pin}} || Resistor 100 ohms (R1011) to GND
|-
| data-sort-value="AW19" | AW19 || ATTENTION || BE_INT || {{pino}} || Connected to [[Syscon Hardware|Syscon]] pad T2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AW20" | AW20 || HARD_RESET || BE_HARD_RESET || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad P2 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]])
|-
| data-sort-value="AW21" | AW21 || CHECKSTOP_OUT_B || BE_CHKSTP_OUT || {{pino}} || Resistor 10K ohms to +1.2V_MC2_VDDIO
|-
| data-sort-value="AW22" | AW22 || SPI_CTL0 || BE_SPI_CTL0 || {{pini}} || Resistor 100 ohms to GND
|-
| data-sort-value="AW23" | AW23 || GRID_TEST || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AW24" | AW24 || TST_CLK0 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected (testpad CL1003)
|-
| data-sort-value="AW25" | AW25 || RC_SCAN_OUT || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AW26" | AW26 || RX4_RXN0 || BE_RX4_RXN0 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW27" | AW27 || RX4_RXCLKN || BE_RX4_RXCLKN || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW28" | AW28 || RX4_RXN4 || BE_RX4_RXN4 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW29" | AW29 || TX6_TXP7 || BE_TX6_TXP7 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW30" | AW30 || TX6_TXP6 || BE_TX6_TXP6 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW31" | AW31 || TX6_TXCLKP || BE_TX6_TXCLKP || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW32" | AW32 || TX6_TXP2 || BE_TX6_TXP2 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AW33" | AW33 || RC_RLOAD1 || BE_RC_RLOAD1 || {{pini}} || Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
|-
| data-sort-value="AW34" | AW34 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AW35" | AW35 || RX3_RXP3 || data-sort-value="BE_RX3_RXP3" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AW36" | AW36 || RX3_RXN3 || data-sort-value="BE_RX3_RXN3" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AW37" | AW37 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AW38" | AW38 || RX3_RXCLKP || data-sort-value="BE_RX3_RXCLKP" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AW39" | AW39 || RX3_RXCLKN || data-sort-value="BE_RX3_RXCLKN" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AW40" | AW40 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AW41" | AW41 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AW99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |
|-
| data-sort-value="AY01" | AY1 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY02" | AY2 || Y1_DQ2_4 || Y1_XDR0_DQ11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY03" | AY3 || Y1_DQ2_6 || data-sort-value="Y1_XDR0_DQ07" | Y1_XDR0_DQ7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY04" | AY4 || Y1_DQ3_2 || Y1_XDR0_DQ15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY05" | AY5 || Y1_DQ3_5 || data-sort-value="Y1_XDR0_DQ03" | Y1_XDR0_DQ3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY06" | AY6 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY07" | AY7 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY08" | AY8 || Y1_DQ3_6 || Y1_XDR1_DQ15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY09" | AY9 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY10" | AY10 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY11" | AY11 || {{cellcolors|#333|#fff}} YC_RSRV0 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="AY12" | AY12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY13" | AY13 || SPI_CLK || BE_SPI_CLK || {{pini}} || Connected to [[Syscon Hardware|Syscon]] pad N1 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) through R1014 0
|-
| data-sort-value="AY14" | AY14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY15" | AY15 || PLL_REFCLK_B || BE_PLL_REFCLK_N || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] clock generator (IC5003) pin 24
|-
| data-sort-value="AY16" | AY16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY17" | AY17 || NT_TST01 || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AY18" | AY18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY19" | AY19 || EXT_CLK_EN ||  || {{pin}} || Resistor 100 ohms (R1012) to GND
|-
| data-sort-value="AY20" | AY20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY21" | AY21 || {{cellcolors|#e63|#fff}} MC2_VDDIO || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AY22" | AY22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY23" | AY23 || {{cellcolors|#e63|#fff}} MC2_VDDIO || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="AY24" | AY24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY25" | AY25 || RC_REFCLKN || BE_RC_REFCLK_N || {{pini}} || Connected to [[Timebases#ICS_ICS9214DGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9214DGLFT]] clock generator (IC5004) pin 24
|-
| data-sort-value="AY26" | AY26 || RX4_RXP2 || BE_RX4_RXP2 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY27" | AY27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY28" | AY28 || RX4_RXP6 || BE_RX4_RXP6 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY29" | AY29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY30" | AY30 || TX6_TXN4 || BE_TX6_TXN4 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY31" | AY31 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY32" | AY32 || TX6_TXN0 || BE_TX6_TXN0 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="AY33" | AY33 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="AY34" | AY34 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY35" | AY35 || RX3_RXP1 || data-sort-value="BE_RX3_RXP1" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AY36" | AY36 || RX3_RXN1 || data-sort-value="BE_RX3_RXN1" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AY37" | AY37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="AY38" | AY38 || RX3_RXP0 || data-sort-value="BE_RX3_RXP0" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AY39" | AY39 || RX3_RXN0 || data-sort-value="BE_RX3_RXN0" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AY40" | AY40 || RX3_RXP2 || data-sort-value="BE_RX3_RXP2" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AY41" | AY41 || RX3_RXN2 || data-sort-value="BE_RX3_RXN2" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected
|-
| data-sort-value="AY99" style="padding:0px" | || colspan="4" data-sort-value="ZZZZ" style="padding:0px" |
|-
| data-sort-value="BA01" | BA1 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA02" | BA2 || Y1_DQ2N_4 || Y1_XDR0_DQN11 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA03" | BA3 || Y1_DQ2N_6 || data-sort-value="Y1_XDR0_DQN07" | Y1_XDR0_DQN7 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA04" | BA4 || Y1_DQ3N_2 || Y1_XDR0_DQN15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA05" | BA5 || Y1_DQ3N_5 || data-sort-value="Y1_XDR0_DQN03" | Y1_XDR0_DQN3 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR0 (third chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA06" | BA6 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA07" | BA7 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA08" | BA8 || Y1_DQ3N_6 || Y1_XDR1_DQN15 || {{pino}} || Connected to [[RAM|XDR DRAM]] Y1_XDR1 (fourth chip) pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA09" | BA9 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA10" | BA10 || {{cellcolors|#d53|#fff}} YC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA11" | BA11 || {{cellcolors|#333|#fff}} YC_RSRV1 || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="BA12" | BA12 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA13" | BA13 || TCK || BE_TCK || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected (testpad CL1105)
|-
| data-sort-value="BA14" | BA14 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA15" | BA15 || PLL_REFCLK || BE_PLL_REFCLK_P || {{pini}} || Connected to [[Timebases#ICS_ICS9218AGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9218AGLFT]] clock generator (IC5003) pin 25
|-
| data-sort-value="BA16" | BA16 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA17" | BA17 || PLL_BGA || data-sort-value="ZZ" {{cellcolors|#eee|#888}} N/C || data-sort-value="ZZ" {{pinnc}} || data-sort-value="ZZ" {{cellcolors||#888}} Not Connected (testpad CL1004)
|-
| data-sort-value="BA18" | BA18 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA19" | BA19 || EXT_CLK ||  || {{pin}} || Resistor 49.9 ohms (R1015) to GND
|-
| data-sort-value="BA20" | BA20 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA21" | BA21 || {{cellcolors|#e63|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="BA22" | BA22 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA23" | BA23 || {{cellcolors|#e63|#fff}} MC2_VDDID || +1.2V_MC2_VDDIO || {{pin}} || data-sort-value="Z1.2V_MC2" | Connected to [[Regulators#Mitsumi_MM3141CNRE_.28150mA_Regulator_Monolithic.29|Mitsumi MM3141CNRE]] pin 5
|-
| data-sort-value="BA24" | BA24 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA25" | BA25 || RC_REFCLKP || BE_RC_REFCLK_P || {{pini}} || Connected to [[Timebases#ICS_ICS9214DGLFT_.28IC_CLOCK_GEN_RAMBUS_XDR_28-TSSOP.29|ICS9214DGLFT]] clock generator (IC5004) pin 23
|-
| data-sort-value="BA26" | BA26 || RX4_RXN2 || BE_RX4_RXN2 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA27" | BA27 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA28" | BA28 || RX4_RXN6 || BE_RX4_RXN6 || {{pini}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA29" | BA29 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA30" | BA30 || TX6_TXP4 || BE_TX6_TXP4 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA31" | BA31 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA32" | BA32 || TX6_TXP0 || BE_TX6_TXP0 || {{pino}} || Connected to [[South Bridge]] pad <abbr title="Unknown">UNK</abbr>
|-
| data-sort-value="BA33" | BA33 || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors|#eee|#888}} N/A || data-sort-value="ZZZ" {{cellcolors||#888}} Missing pad
|-
| data-sort-value="BA34" | BA34 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA35" | BA35 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="BA36" | BA36 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="BA37" | BA37 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA38" | BA38 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|-
| data-sort-value="BA39" | BA39 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA40" | BA40 || {{cellcolors|#d53|#fff}} RC_VDDIO || +1.2V_YC_RC_VDDIO || {{pin}} || data-sort-value="Z1.2V_YC" | Connected to [https://www.digikey.com/en/products/detail/vishay-siliconix/SUD40N02-08-E3/2623039 Vishay Siliconix SUD40N02-08-E3] pin 3
|-
| data-sort-value="BA41" | BA41 || {{cellcolors|#333|#fff}} GND || GND || {{pin}} || data-sort-value="ZGND" {{cellcolors||#888}} Ground
|}
|}
{{#ifeq:{{{raw|}}}|yes|<!-- if raw=yes dont display extras-->|<!--else-->
''remark: the following Pad #letter's are not used: I, O, Q, S, X, Z, AI, AO, AQ, AS, AX, AZ''
''remark: the following Pad #letter's are not used: I, O, Q, S, X, Z, AI, AO, AQ, AS, AX, AZ''
</div>
</div>
Line 2,606: Line 3,465:
File:CELL-GRID.png|CELL grid raw/bare sketch  
File:CELL-GRID.png|CELL grid raw/bare sketch  
</gallery>
</gallery>
}}


<noinclude>[[Category:Templates]]</noinclude>
<noinclude>[[Category:Templates]]</noinclude>

Latest revision as of 04:34, 16 November 2022

CELL BE, padlayout
PCB view facing BGA
A1 marker:northwest/topleft

CELL BE, padlayout
PCB view facing BGA
A1 marker:northwest/topleft

CELL BE, padlayout
CPU view facing BGA
A1 marker:northeast/topright

CELL 90nm pad layout (CELL view)
Pad A1 at bottom-left corner
[ View ], [ Discuss ] or [ Edit ]
CELL pad layout 90nm
[ View ], [ Discuss ] or [ Edit ]
Pad Name Type Description
Internal External
A1 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
A2 Y0_DQ1N_5 Y0_XDR0_DQN10
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
A3 Y0_DQ1N_2 Y0_XDR0_DQN6
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
A4 Y0_DQ0N_6 Y0_XDR0_DQN14
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
A5 Y0_DQ0N_4 Y0_XDR0_DQN2
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
A6 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
A7 N/A N/A N/A Missing pad
A8 Y0_DQ0N_1 Y0_XDR1_DQN14
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
A9 N/A N/A N/A Missing pad
A10 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
A11 Y0_DQ0_RLOAD BE_Y0_DQ0_RLOAD
In
 Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
A12 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A13 GND GND
Others
 Ground
A14 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A15 GND GND
Others
 Ground
A16 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A17 GND GND
Others
 Ground
A18 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A19 GND GND
Others
 Ground
A20 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A21 GND GND
Others
 Ground
A22 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A23 GND GND
Others
 Ground
A24 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A25 GND GND
Others
 Ground
A26 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A27 GND GND
Others
 Ground
A28 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A29 GND GND
Others
 Ground
A30 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A31 GND GND
Others
 Ground
A32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
A33 GND GND
Others
 Ground
A34 RC_XCLK_EN GND
Others
 Ground
A35 RC_SCAN_CLK2
Others
 Resistor 470K ohms (R1001) to GND
A36 RC_SCAN_CLK1
Others
 Resistor 470K ohms (R1002) to GND
A37 RC_SCAN_CLK0
Others
 Resistor 470K ohms (R1003) to GND
A38 GND GND
Others
 Ground
A39 RC_VDDIO N/C
Not Connected
 Not Connected
A40 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
A41 GND GND
Others
 Ground
B1 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
B2 Y0_DQ1_5 Y0_XDR0_DQ10
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
B3 Y0_DQ1_2 Y0_XDR0_DQ6
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
B4 Y0_DQ0_6 Y0_XDR0_DQ14
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
B5 Y0_DQ0_4 Y0_XDR0_DQ2
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
B6 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
B7 N/A N/A N/A Missing pad
B8 Y0_DQ0_1 Y0_XDR1_DQ14
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
B9 N/A N/A N/A Missing pad
B10 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
B11 Y0_DQ0_VREF +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
B12 GND GND
Others
 Ground
B13 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B14 GND GND
Others
 Ground
B15 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B16 GND GND
Others
 Ground
B17 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B18 GND GND
Others
 Ground
B19 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B20 GND GND
Others
 Ground
B21 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B22 GND GND
Others
 Ground
B23 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B24 GND GND
Others
 Ground
B25 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B26 GND GND
Others
 Ground
B27 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B28 GND GND
Others
 Ground
B29 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B30 GND GND
Others
 Ground
B31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B32 GND GND
Others
 Ground
B33 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
B34 RC_SCAN_CLK3
Others
 Resistor 470K ohms (R1004) to GND
B35 TX0_TXN1 BE_TX0_TXN1
Out
 Connected to RSX pad UNK (41x41 layout)
B36 TX0_TXP1 BE_TX0_TXP1
Out
 Connected to RSX pad UNK (41x41 layout)
B37 GND GND
Others
 Ground
B38 TX0_TXN2 BE_TX0_TXN2
Out
 Connected to RSX pad UNK (41x41 layout)
B39 TX0_TXP2 BE_TX0_TXP2
Out
 Connected to RSX pad UNK (41x41 layout)
B40 TX0_TXN0 BE_TX0_TXN0
Out
 Connected to RSX pad UNK (41x41 layout)
B41 TX0_TXP0 BE_TX0_TXP0
Out
 Connected to RSX pad UNK (41x41 layout)
C1 GND GND
Others
 Ground
C2 Y0_DQ1N_6 Y0_XDR0_DQN0
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
C3 Y0_DQ1N_4 Y0_XDR0_DQN12
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
C4 Y0_DQ0N_0 Y0_XDR0_DQN4
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
C5 Y0_DQ0N_5 Y0_XDR0_DQN8
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
C6 Y0_DQ1N_8 N/C
Not Connected
 Not Connected
C7 Y0_DQ1N_3 Y0_XDR1_DQN10
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
C8 Y0_DQ1N_1 Y0_XDR1_DQN6
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
C9 Y0_DQ0N_3 Y0_XDR1_DQN2
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
C10 Y0_DQ0N_8 N/C
Not Connected
 Not Connected
C11 VDDS1 BE_VDDS1
Out
 Connected to Onsemi NCP5318FTR2G pin 5 (VFFB) and 11 (VFB)
C12 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C13 GND GND
Others
 Ground
C14 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C15 GND GND
Others
 Ground
C16 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C17 GND GND
Others
 Ground
C18 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C19 GND GND
Others
 Ground
C20 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C21 GND GND
Others
 Ground
C22 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C23 GND GND
Others
 Ground
C24 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C25 GND GND
Others
 Ground
C26 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C27 GND GND
Others
 Ground
C28 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C29 GND GND
Others
 Ground
C30 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C31 GND GND
Others
 Ground
C32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
C33 GND GND
Others
 Ground
C34 GND GND
Others
 Ground
C35 TX0_TXN3 BE_TX0_TXN3
Out
 Connected to RSX pad UNK (41x41 layout)
C36 TX0_TXP3 BE_TX0_TXP3
Out
 Connected to RSX pad UNK (41x41 layout)
C37 GND GND
Others
 Ground
C38 TX0_TXCLKN BE_TX0_TXCLKN
Out
 Connected to RSX pad UNK (41x41 layout)
C39 TX0_TXCLKP BE_TX0_TXCLKP
Out
 Connected to RSX pad UNK (41x41 layout)
C40 N/A N/A N/A Missing pad
C41 N/A N/A N/A Missing pad
D1 GND GND
Others
 Ground
D2 Y0_DQ1_6 Y0_XDR0_DQ0
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
D3 Y0_DQ1_4 Y0_XDR0_DQ12
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
D4 Y0_DQ0_0 Y0_XDR0_DQ4
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
D5 Y0_DQ0_5 Y0_XDR0_DQ8
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
D6 Y0_DQ1_8 N/C
Not Connected
 Not Connected
D7 Y0_DQ1_3 Y0_XDR1_DQ10
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
D8 Y0_DQ1_1 Y0_XDR1_DQ6
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
D9 Y0_DQ0_3 Y0_XDR1_DQ2
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
D10 Y0_DQ0_8 N/C
Not Connected
 Not Connected
D11 VDDS2 BE_VDDS2
Out
 Connected to Onsemi NCP5318FTR2G pin 9 (SGND)
D12 GND GND
Others
 Ground
D13 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D14 GND GND
Others
 Ground
D15 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D16 GND GND
Others
 Ground
D17 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D18 GND GND
Others
 Ground
D19 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D20 GND GND
Others
 Ground
D21 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D22 GND GND
Others
 Ground
D23 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D24 GND GND
Others
 Ground
D25 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D26 GND GND
Others
 Ground
D27 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D28 GND GND
Others
 Ground
D29 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D30 GND GND
Others
 Ground
D31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D32 GND GND
Others
 Ground
D33 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
D34 TX0_GNDA GND
Others
 Ground
D35 TX0_TXN5 BE_TX0_TXN5
Out
 Connected to RSX pad UNK (41x41 layout)
D36 TX0_TXP5 BE_TX0_TXP5
Out
 Connected to RSX pad UNK (41x41 layout)
D37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
D38 TX0_TXN6 BE_TX0_TXN6
Out
 Connected to RSX pad UNK (41x41 layout)
D39 TX0_TXP6 BE_TX0_TXP6
Out
 Connected to RSX pad UNK (41x41 layout)
D40 TX0_TXN4 BE_TX0_TXN4
Out
 Connected to RSX pad UNK (41x41 layout)
D41 TX0_TXP4 BE_TX0_TXP4
Out
 Connected to RSX pad UNK (41x41 layout)
E1 Y0_RQ_RST BE_Y0_RQ_RST
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad C15. Serial reset
E2 GND GND
Others
 Ground
E3 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
E4 GND GND
Others
 Ground
E5 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
E6 GND GND
Others
 Ground
E7 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
E8 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
E9 GND GND
Others
 Ground
E10 GND GND
Others
 Ground
E11 VDDE GND
Others
 Ground
E12 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E13 GND GND
Others
 Ground
E14 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E15 GND GND
Others
 Ground
E16 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E17 GND GND
Others
 Ground
E18 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E19 GND GND
Others
 Ground
E20 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E21 GND GND
Others
 Ground
E22 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E23 GND GND
Others
 Ground
E24 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E25 GND GND
Others
 Ground
E26 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E27 GND GND
Others
 Ground
E28 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E29 GND GND
Others
 Ground
E30 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E31 GND GND
Others
 Ground
E32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
E33 GND GND
Others
 Ground
E34 TX0_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
E35 RX0_RXP7 BE_RX0_RXP7
In
 Connected to RSX pad UNK (41x41 layout)
E36 RX0_RXN7 BE_RX0_RXN7
In
 Connected to RSX pad UNK (41x41 layout)
E37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
E38 TX0_TXN7 BE_TX0_TXN7
Out
 Connected to RSX pad UNK (41x41 layout)
E39 TX0_TXP7 BE_TX0_TXP7
Out
 Connected to RSX pad UNK (41x41 layout)
E40 N/A N/A N/A Missing pad
E41 N/A N/A N/A Missing pad
F1 GND GND
Others
 Ground
F2 Y0_RQ0 BE_Y0_RQ0
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad C3. 12-bit request/command bus
F3 GND GND
Others
 Ground
F4 Y0_RQ1 BE_Y0_RQ1
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D13. 12-bit request/command bus
F5 GND GND
Others
 Ground
F6 Y0_RQ_SRD BE_Y0_RQ_SRD
In
 Connected to XDR DRAM Y0_XDR0 (first chip) pad C16. Serial data in/out ?
F7 Y0_DQ1N_7 Y0_XDR1_DQN0
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
F8 Y0_DQ1N_0 Y0_XDR1_DQN12
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
F9 Y0_DQ0N_7 Y0_XDR1_DQN4
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
F10 Y0_DQ0N_2 Y0_XDR1_DQN8
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
F11 YC_SCAN_CLK4 GND
Others
 Ground
F12 GND GND
Others
 Ground
F13 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F14 GND GND
Others
 Ground
F15 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F16 GND GND
Others
 Ground
F17 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F18 GND GND
Others
 Ground
F19 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F20 GND GND
Others
 Ground
F21 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F22 GND GND
Others
 Ground
F23 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F24 GND GND
Others
 Ground
F25 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F26 GND GND
Others
 Ground
F27 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F28 GND GND
Others
 Ground
F29 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F30 GND GND
Others
 Ground
F31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F32 GND GND
Others
 Ground
F33 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
F34 RX0_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
F35 RX0_RXP5 BE_RX0_RXP5
In
 Connected to RSX pad UNK (41x41 layout)
F36 RX0_RXN5 BE_RX0_RXN5
In
 Connected to RSX pad UNK (41x41 layout)
F37 GND GND
Others
 Ground
F38 RX0_RXP4 BE_RX0_RXP4
In
 Connected to RSX pad UNK (41x41 layout)
F39 RX0_RXN4 BE_RX0_RXN4
In
 Connected to RSX pad UNK (41x41 layout)
F40 RX0_RXP6 BE_RX0_RXP6
In
 Connected to RSX pad UNK (41x41 layout)
F41 RX0_RXN6 BE_RX0_RXN6
In
 Connected to RSX pad UNK (41x41 layout)
G1 Y0_RQ3 BE_Y0_RQ3
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D4. 12-bit request/command bus
G2 GND GND
Others
 Ground
G3 Y0_RQ5 BE_Y0_RQ5
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad E14. 12-bit request/command bus
G4 GND GND
Others
 Ground
G5 Y0_RQ2 BE_Y0_RQ2
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D14. 12-bit request/command bus
G6 GND GND
Others
 Ground
G7 Y0_DQ1_7 Y0_XDR1_DQ0
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
G8 Y0_DQ1_0 Y0_XDR1_DQ12
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
G9 Y0_DQ0_7 Y0_XDR1_DQ4
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
G10 Y0_DQ0_2 Y0_XDR1_DQ8
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
G11 YC_SCAN_CLK3 GND
Others
 Ground
G12 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G13 GND GND
Others
 Ground
G14 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G15 GND GND
Others
 Ground
G16 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G17 GND GND
Others
 Ground
G18 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G19 GND GND
Others
 Ground
G20 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G21 GND GND
Others
 Ground
G22 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G23 GND GND
Others
 Ground
G24 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G25 GND GND
Others
 Ground
G26 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G27 GND GND
Others
 Ground
G28 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G29 GND GND
Others
 Ground
G30 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G31 GND GND
Others
 Ground
G32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
G33 GND GND
Others
 Ground
G34 RX0_GNDA GND
Others
 Ground
G35 RX0_RXP3 BE_RX0_RXP3
In
 Connected to RSX pad UNK (41x41 layout)
G36 RX0_RXN3 BE_RX0_RXN3
In
 Connected to RSX pad UNK (41x41 layout)
G37 GND GND
Others
 Ground
G38 RX0_RXCLKP BE_RX0_RXCLKP
In
 Connected to RSX pad UNK (41x41 layout)
G39 RX0_RXCLKN BE_RX0_RXCLKN
In
 Connected to RSX pad UNK (41x41 layout)
G40 N/A N/A N/A Missing pad
G41 N/A N/A N/A Missing pad
H1 GND GND
Others
 Ground
H2 Y0_RQ4 BE_Y0_RQ4
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad D3. 12-bit request/command bus
H3 GND GND
Others
 Ground
H4 Y0_RQ6 BE_Y0_RQ6
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G14. 12-bit request/command bus
H5 GND GND
Others
 Ground
H6 Y0_RQ_VREF BE_Y0_RQ_VREF
In
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) power circuit
H7 GND GND
Others
 Ground
H8 Y0_DQ0_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
H9 Y0_DQ0_GNDA GND
Others
 Ground
H10 GND GND
Others
 Ground
H11 YC_SCAN_CLK2 GND
Others
 Ground
H12 GND GND
Others
 Ground
H13 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H14 GND GND
Others
 Ground
H15 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H16 GND GND
Others
 Ground
H17 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H18 GND GND
Others
 Ground
H19 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H20 GND GND
Others
 Ground
H21 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H22 GND GND
Others
 Ground
H23 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H24 GND GND
Others
 Ground
H25 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H26 GND GND
Others
 Ground
H27 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H28 GND GND
Others
 Ground
H29 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H30 GND GND
Others
 Ground
H31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H32 GND GND
Others
 Ground
H33 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
H34 GND GND
Others
 Ground
H35 RX0_RXP1 BE_RX0_RXP1
In
 Connected to RSX pad UNK (41x41 layout)
H36 RX0_RXN1 BE_RX0_RXN1
In
 Connected to RSX pad UNK (41x41 layout)
H37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
H38 RX0_RXP0 BE_RX0_RXP0
In
 Connected to RSX pad UNK (41x41 layout)
H39 RX0_RXN0 BE_RX0_RXN0
In
 Connected to RSX pad UNK (41x41 layout)
H40 RX0_RXP2 BE_RX0_RXP2
In
 Connected to RSX pad UNK (41x41 layout)
H41 RX0_RXN2 BE_RX0_RXN2
In
 Connected to RSX pad UNK (41x41 layout)
J1 Y0_RQ_CTMP BE_Y0_RQ_CTM
In
 Connected to ICS9218AGLFT clock generator (IC5002) pin 24 (Clock To Master)
J2 Y0_RQ_CTMN BE_Y0_RQ_CTMN
In
 Connected to ICS9218AGLFT clock generator (IC5002) pin 25 (Clock To Master)
J3 Y0_RQ7 BE_Y0_RQ7
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G13. 12-bit request/command bus
J4 GND GND
Others
 Ground
J5 Y0_RQ8 BE_Y0_RQ8
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H14. 12-bit request/command bus
J6 GND GND
Others
 Ground
J7 Y0_DQC_ROLREF BE_Y0_DQC_ROLREF
In
 Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
J8 Y0_DQ1_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
J9 NC_OPEN25 GND
Others
 Ground
J10 YC_SCAN_CLK0 GND
Others
 Ground
J11 YC_SCAN_CLK1 GND
Others
 Ground
J12 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J13 GND GND
Others
 Ground
J14 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J15 GND GND
Others
 Ground
J16 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J17 GND GND
Others
 Ground
J18 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J19 GND GND
Others
 Ground
J20 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J21 GND GND
Others
 Ground
J22 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J23 GND GND
Others
 Ground
J24 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J25 GND GND
Others
 Ground
J26 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J27 GND GND
Others
 Ground
J28 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J29 GND GND
Others
 Ground
J30 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J31 GND GND
Others
 Ground
J32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
J33 NC_OPEN50 GND
Others
 Ground
J34 RC_VOLGND0 BE_RC_VOLGND0
In
 Capacitor 0.1uf/10v to +1.2V_YC_RC_VDDIO
J35 NT_TST03 N/C
Not Connected
 Not Connected
J36 RC_VOLREF0 BE_RC_VOLREF0
In
 Resistor 56.2 ohms to +1.2V_YC_RC_VDDIO
J37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
J38 RC_ROLREF0 +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
J39 RC_RLOAD0 BE_RC_RLOAD0
In
 Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
J40 N/A N/A N/A Missing pad
J41 N/A N/A N/A Missing pad
K1 Y0_RQ_CFMN BE_Y0_RQ_CFMN
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G4. (Clock From Master)
K2 Y0_RQ_CFMP BE_Y0_RQ_CFM
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad G3. (Clock From Master)
K3 GND GND
Others
 Ground
K4 Y0_RQ9 BE_Y0_RQ9
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H13. 12-bit request/command bus
K5 GND GND
Others
 Ground
K6 Y0_RQ_SCK BE_Y0_RQ_SCK
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad J15. Serial clock
K7 Y0_DQC_VOLGND BE_Y0_DQC_VOLGND
In
 Capacitor 0.1uf/10v to +1.2V_YC_RC_VDDIO
K8 Y0_DQ1_GNDA GND
Others
 Ground
K9 NC_OPEN24 GND
Others
 Ground
K10 GND GND
Others
 Ground
K11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K12 GND GND
Others
 Ground
K13 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K14 GND GND
Others
 Ground
K15 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K16 GND GND
Others
 Ground
K17 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K18 GND GND
Others
 Ground
K19 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K20 GND GND
Others
 Ground
K21 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K22 GND GND
Others
 Ground
K23 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K24 GND GND
Others
 Ground
K25 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K26 GND GND
Others
 Ground
K27 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K28 GND GND
Others
 Ground
K29 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K30 GND GND
Others
 Ground
K31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
K32 GND GND
Others
 Ground
K33 NC_OPEN49 GND
Others
 Ground
K34 GND GND
Others
 Ground
K35 TX1_TXN1 BE_TX1_TXN1
Out
 Connected to RSX pad UNK (41x41 layout)
K36 TX1_TXP1 BE_TX1_TXP1
Out
 Connected to RSX pad UNK (41x41 layout)
K37 GND GND
Others
 Ground
K38 TX1_TXN2 BE_TX1_TXN2
Out
 Connected to RSX pad UNK (41x41 layout)
K39 TX1_TXP2 BE_TX1_TXP2
Out
 Connected to RSX pad UNK (41x41 layout)
K40 TX1_TXN0 BE_TX1_TXN0
Out
 Connected to RSX pad UNK (41x41 layout)
K41 TX1_TXP0 BE_TX1_TXP0
Out
 Connected to RSX pad UNK (41x41 layout)
L1 Y0_RQ10 BE_Y0_RQ10
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H3. 12-bit request/command bus
L2 GND GND
Others
 Ground
L3 Y0_RQ11 BE_Y0_RQ11
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad H4. 12-bit request/command bus
L4 GND GND
Others
 Ground
L5 Y0_RQ_CMD BE_Y0_RQ_CMD
Out
 Connected to XDR DRAM Y0_XDR0 (first chip), and Y0_XDR1 (second chip) pad J14. Serial commands
L6 GND GND
Others
 Ground
L7 Y0_DQC_VOLREF BE_Y0_DQC_VOLREF
In
 Resistor 95.3 ohms to +1.2V_YC_RC_VDDIO
L8 Y0_RQ_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
L9 NC_OPEN23 GND
Others
 Ground
L10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L11 GND GND
Others
 Ground
L12 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L13 GND GND
Others
 Ground
L14 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L15 GND GND
Others
 Ground
L16 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L17 GND GND
Others
 Ground
L18 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L19 GND GND
Others
 Ground
L20 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L21 GND GND
Others
 Ground
L22 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L23 GND GND
Others
 Ground
L24 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L25 GND GND
Others
 Ground
L26 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L27 GND GND
Others
 Ground
L28 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L29 GND GND
Others
 Ground
L30 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L31 GND GND
Others
 Ground
L32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
L33 NC_OPEN48 GND
Others
 Ground
L34 TX1_GNDA GND
Others
 Ground
L35 TX1_TXN3 BE_TX1_TXN3
Out
 Connected to RSX pad UNK (41x41 layout)
L36 TX1_TXP3 BE_TX1_TXP3
Out
 Connected to RSX pad UNK (41x41 layout)
L37 GND GND
Others
 Ground
L38 TX1_TXCLKN BE_TX1_TXCLKN
Out
 Connected to RSX pad UNK (41x41 layout)
L39 TX1_TXCLKP BE_TX1_TXCLKP
Out
 Connected to RSX pad UNK (41x41 layout)
L40 N/A N/A N/A Missing pad
L41 N/A N/A N/A Missing pad
M1 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
M2 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
M3 GND GND
Others
 Ground
M4 Y0_DQ2_RLOAD BE_Y0_DQ2_RLOAD
In
 Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
M5 GND GND
Others
 Ground
M6 Y0_DQ2_VREF +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
M7 GND GND
Others
 Ground
M8 Y0_RQ_GNDA GND
Others
 Ground
M9 NC_OPEN22 GND
Others
 Ground
M10 GND GND
Others
 Ground
M11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
M12 N/A N/A N/A Missing pad
M13 N/A N/A N/A Missing pad
M14 N/A N/A N/A Missing pad
M15 N/A N/A N/A Missing pad
M16 N/A N/A N/A Missing pad
M17 N/A N/A N/A Missing pad
M18 N/A N/A N/A Missing pad
M19 N/A N/A N/A Missing pad
M20 N/A N/A N/A Missing pad
M21 N/A N/A N/A Missing pad
M22 N/A N/A N/A Missing pad
M23 N/A N/A N/A Missing pad
M24 N/A N/A N/A Missing pad
M25 N/A N/A N/A Missing pad
M26 N/A N/A N/A Missing pad
M27 N/A N/A N/A Missing pad
M28 N/A N/A N/A Missing pad
M29 N/A N/A N/A Missing pad
M30 N/A N/A N/A Missing pad
M31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
M32 GND GND
Others
 Ground
M33 NC_OPEN47 GND
Others
 Ground
M34 TX1_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
M35 TX1_TXN5 BE_TX1_TXN5
Out
 Connected to RSX pad UNK (41x41 layout)
M36 TX1_TXP5 BE_TX1_TXP5
Out
 Connected to RSX pad UNK (41x41 layout)
M37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
M38 TX1_TXN6 BE_TX1_TXN6
Out
 Connected to RSX pad UNK (41x41 layout)
M39 TX1_TXP6 BE_TX1_TXP6
Out
 Connected to RSX pad UNK (41x41 layout)
M40 TX1_TXN4 BE_TX1_TXN4
Out
 Connected to RSX pad UNK (41x41 layout)
M41 TX1_TXP4 BE_TX1_TXP4
Out
 Connected to RSX pad UNK (41x41 layout)
N1 N/A N/A N/A Missing pad
N2 N/A N/A N/A Missing pad
N3 Y0_DQ2_4 Y0_XDR0_DQ11
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
N4 Y0_DQ2N_4 Y0_XDR0_DQN11
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
N5 GND GND
Others
 Ground
N6 Y0_DQ2_1 Y0_XDR0_DQ1
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
N7 Y0_DQ2N_1 Y0_XDR0_DQN1
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
N8 GND GND
Others
 Ground
N9 NC_OPEN21 GND
Others
 Ground
N10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
N11 GND GND
Others
 Ground
N12 N/A N/A N/A Missing pad
N13 N/A N/A N/A Missing pad
N14 N/A N/A N/A Missing pad
N15 N/A N/A N/A Missing pad
N16 N/A N/A N/A Missing pad
N17 N/A N/A N/A Missing pad
N18 N/A N/A N/A Missing pad
N19 N/A N/A N/A Missing pad
N20 N/A N/A N/A Missing pad
N21 N/A N/A N/A Missing pad
N22 N/A N/A N/A Missing pad
N23 N/A N/A N/A Missing pad
N24 N/A N/A N/A Missing pad
N25 N/A N/A N/A Missing pad
N26 N/A N/A N/A Missing pad
N27 N/A N/A N/A Missing pad
N28 N/A N/A N/A Missing pad
N29 N/A N/A N/A Missing pad
N30 N/A N/A N/A Missing pad
N31 GND GND
Others
 Ground
N32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
N33 NC_OPEN46 GND
Others
 Ground
N34 RX1_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
N35 RX1_RXP7 BE_RX1_RXP7
In
 Connected to RSX pad UNK (41x41 layout)
N36 RX1_RXN7 BE_RX1_RXN7
In
 Connected to RSX pad UNK (41x41 layout)
N37 RC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
N38 TX1_TXN7 BE_TX1_TXN7
Out
 Connected to RSX pad UNK (41x41 layout)
N39 TX1_TXP7 BE_TX1_TXP7
Out
 Connected to RSX pad UNK (41x41 layout)
N40 N/A N/A N/A Missing pad
N41 N/A N/A N/A Missing pad
P1 Y0_DQ2_3 Y0_XDR0_DQ7
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
P2 Y0_DQ2N_3 Y0_XDR0_DQN7
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
P3 Y0_DQ2_6 Y0_XDR0_DQ15
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
P4 Y0_DQ2N_6 Y0_XDR0_DQN15
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
P5 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
P6 Y0_DQ2_5 Y0_XDR0_DQ13
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
P7 Y0_DQ2N_5 Y0_XDR0_DQN13
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
P8 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
P9 NC_OPEN20 GND
Others
 Ground
P10 GND GND
Others
 Ground
P11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
P12 N/A N/A N/A Missing pad
P13 N/A N/A N/A Missing pad
P14 N/A N/A N/A Missing pad
P15 N/A N/A N/A Missing pad
P16 N/A N/A N/A Missing pad
P17 N/A N/A N/A Missing pad
P18 N/A N/A N/A Missing pad
P19 N/A N/A N/A Missing pad
P20 N/A N/A N/A Missing pad
P21 N/A N/A N/A Missing pad
P22 N/A N/A N/A Missing pad
P23 N/A N/A N/A Missing pad
P24 N/A N/A N/A Missing pad
P25 N/A N/A N/A Missing pad
P26 N/A N/A N/A Missing pad
P27 N/A N/A N/A Missing pad
P28 N/A N/A N/A Missing pad
P29 N/A N/A N/A Missing pad
P30 N/A N/A N/A Missing pad
P31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
P32 GND GND
Others
 Ground
P33 NC_OPEN45 GND
Others
 Ground
P34 RX1_GNDA GND
Others
 Ground
P35 RX1_RXP5 BE_RX1_RXP5
In
 Connected to RSX pad UNK (41x41 layout)
P36 RX1_RXN5 BE_RX1_RXN5
In
 Connected to RSX pad UNK (41x41 layout)
P37 GND GND
Others
 Ground
P38 RX1_RXP4 BE_RX1_RXP4
In
 Connected to RSX pad UNK (41x41 layout)
P39 RX1_RXN4 BE_RX1_RXN4
In
 Connected to RSX pad UNK (41x41 layout)
P40 RX1_RXP6 BE_RX1_RXP6
In
 Connected to RSX pad UNK (41x41 layout)
P41 RX1_RXN6 BE_RX1_RXN6
In
 Connected to RSX pad UNK (41x41 layout)
R1 N/A N/A N/A Missing pad
R2 N/A N/A N/A Missing pad
R3 Y0_DQ3_4 Y0_XDR0_DQ3
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
R4 Y0_DQ3N_4 Y0_XDR0_DQN3
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
R5 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
R6 Y0_DQ2_0 Y0_XDR0_DQ5
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
R7 Y0_DQ2N_0 Y0_XDR0_DQN5
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
R8 GND GND
Others
 Ground
R9 NC_OPEN19 GND
Others
 Ground
R10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
R11 GND GND
Others
 Ground
R12 N/A N/A N/A Missing pad
R13 N/A N/A N/A Missing pad
R14 N/A N/A N/A Missing pad
R15 N/A N/A N/A Missing pad
R16 N/A N/A N/A Missing pad
R17 N/A N/A N/A Missing pad
R18 N/A N/A N/A Missing pad
R19 N/A N/A N/A Missing pad
R20 N/A N/A N/A Missing pad
R21 N/A N/A N/A Missing pad
R22 N/A N/A N/A Missing pad
R23 N/A N/A N/A Missing pad
R24 N/A N/A N/A Missing pad
R25 N/A N/A N/A Missing pad
R26 N/A N/A N/A Missing pad
R27 N/A N/A N/A Missing pad
R28 N/A N/A N/A Missing pad
R29 N/A N/A N/A Missing pad
R30 N/A N/A N/A Missing pad
R31 GND GND
Others
 Ground
R32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
R33 NC_OPEN44 GND
Others
 Ground
R34 GND GND
Others
 Ground
R35 RX1_RXP3 BE_RX1_RXP3
In
 Connected to RSX pad UNK (41x41 layout)
R36 RX1_RXN3 BE_RX1_RXN3
In
 Connected to RSX pad UNK (41x41 layout)
R37 GND GND
Others
 Ground
R38 RX1_RXCLKP BE_RX1_RXCLKP
In
 Connected to RSX pad UNK (41x41 layout)
R39 RX1_RXCLKN BE_RX1_RXCLKN
In
 Connected to RSX pad UNK (41x41 layout)
R40 N/A N/A N/A Missing pad
R41 N/A N/A N/A Missing pad
T1 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
T2 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
T3 Y0_DQ2_8 N/C
Not Connected
 Not Connected
T4 Y0_DQ2N_8 N/C
Not Connected
 Not Connected
T5 GND GND
Others
 Ground
T6 Y0_DQ3_2 Y0_XDR0_DQ9
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
T7 Y0_DQ3N_2 Y0_XDR0_DQN9
Out
 Connected to XDR DRAM Y0_XDR0 (first chip) pad UNK
T8 Y0_DQ2_GNDA GND
Others
 Ground
T9 NC_OPEN18 GND
Others
 Ground
T10 GND GND
Others
 Ground
T11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
T12 N/A N/A N/A Missing pad
T13 N/A N/A N/A Missing pad
T14 N/A N/A N/A Missing pad
T15 N/A N/A N/A Missing pad
T16 N/A N/A N/A Missing pad
T17 N/A N/A N/A Missing pad
T18 N/A N/A N/A Missing pad
T19 N/A N/A N/A Missing pad
T20 N/A N/A N/A Missing pad
T21 N/A N/A N/A Missing pad
T22 N/A N/A N/A Missing pad
T23 N/A N/A N/A Missing pad
T24 N/A N/A N/A Missing pad
T25 N/A N/A N/A Missing pad
T26 N/A N/A N/A Missing pad
T27 N/A N/A N/A Missing pad
T28 N/A N/A N/A Missing pad
T29 N/A N/A N/A Missing pad
T30 N/A N/A N/A Missing pad
T31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
T32 GND GND
Others
 Ground
T33 NC_OPEN43 GND
Others
 Ground
T34 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
T35 RX1_RXP1 BE_RX1_RXP1
In
 Connected to RSX pad UNK (41x41 layout)
T36 RX1_RXN1 BE_RX1_RXN1
In
 Connected to RSX pad UNK (41x41 layout)
T37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
T38 RX1_RXP0 BE_RX1_RXP0
In
 Connected to RSX pad UNK (41x41 layout)
T39 RX1_RXN0 BE_RX1_RXN0
In
 Connected to RSX pad UNK (41x41 layout)
T40 RX1_RXP2 BE_RX1_RXP2
In
 Connected to RSX pad UNK (41x41 layout)
T41 RX1_RXN2 BE_RX1_RXN2
In
 Connected to RSX pad UNK (41x41 layout)
U1 N/A N/A N/A Missing pad
U2 N/A N/A N/A Missing pad
U3 Y0_DQ2_7 Y0_XDR1_DQ11
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
U4 Y0_DQ2N_7 Y0_XDR1_DQN11
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
U5 GND GND
Others
 Ground
U6 Y0_DQ2_2 Y0_XDR1_DQ1
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
U7 Y0_DQ2N_2 Y0_XDR1_DQN1
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
U8 Y0_DQ2_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
U9 NC_OPEN17 GND
Others
 Ground
U10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
U11 GND GND
Others
 Ground
U12 N/A N/A N/A Missing pad
U13 N/A N/A N/A Missing pad
U14 N/A N/A N/A Missing pad
U15 N/A N/A N/A Missing pad
U16 N/A N/A N/A Missing pad
U17 N/A N/A N/A Missing pad
U18 N/A N/A N/A Missing pad
U19 N/A N/A N/A Missing pad
U20 N/A N/A N/A Missing pad
U21 N/A N/A N/A Missing pad
U22 N/A N/A N/A Missing pad
U23 N/A N/A N/A Missing pad
U24 N/A N/A N/A Missing pad
U25 N/A N/A N/A Missing pad
U26 N/A N/A N/A Missing pad
U27 N/A N/A N/A Missing pad
U28 N/A N/A N/A Missing pad
U29 N/A N/A N/A Missing pad
U30 N/A N/A N/A Missing pad
U31 GND GND
Others
 Ground
U32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
U33 NC_OPEN42 GND
Others
 Ground
U34 GND GND
Others
 Ground
U35 GND GND
Others
 Ground
U36 GND GND
Others
 Ground
U37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
U38 GND GND
Others
 Ground
U39 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
U40 N/A N/A N/A Missing pad
U41 N/A N/A N/A Missing pad
V1 Y0_DQ3_0 Y0_XDR1_DQ7
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
V2 Y0_DQ3N_0 Y0_XDR1_DQN7
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
V3 Y0_DQ3_5 Y0_XDR1_DQ15
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
V4 Y0_DQ3N_5 Y0_XDR1_DQN15
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
V5 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
V6 Y0_DQ3_1 Y0_XDR1_DQ13
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
V7 Y0_DQ3N_1 Y0_XDR1_DQN13
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
V8 Y0_DQ3_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
V9 NC_OPEN16 GND
Others
 Ground
V10 GND GND
Others
 Ground
V11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
V12 N/A N/A N/A Missing pad
V13 N/A N/A N/A Missing pad
V14 N/A N/A N/A Missing pad
V15 N/A N/A N/A Missing pad
V16 N/A N/A N/A Missing pad
V17 N/A N/A N/A Missing pad
V18 N/A N/A N/A Missing pad
V19 N/A N/A N/A Missing pad
V20 N/A N/A N/A Missing pad
V21 N/A N/A N/A Missing pad
V22 N/A N/A N/A Missing pad
V23 N/A N/A N/A Missing pad
V24 N/A N/A N/A Missing pad
V25 N/A N/A N/A Missing pad
V26 N/A N/A N/A Missing pad
V27 N/A N/A N/A Missing pad
V28 N/A N/A N/A Missing pad
V29 N/A N/A N/A Missing pad
V30 N/A N/A N/A Missing pad
V31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
V32 GND GND
Others
 Ground
V33 NC_OPEN41 GND
Others
 Ground
V34 TX2_GNDA GND
Others
 Ground
V35 TX2_TXN1 BE_TX2_TXN1
Out
 Connected to RSX pad UNK (41x41 layout)
V36 TX2_TXP1 BE_TX2_TXP1
Out
 Connected to RSX pad UNK (41x41 layout)
V37 GND GND
Others
 Ground
V38 TX2_TXN2 BE_TX2_TXN2
Out
 Connected to RSX pad UNK (41x41 layout)
V39 TX2_TXP2 BE_TX2_TXP2
Out
 Connected to RSX pad UNK (41x41 layout)
V40 TX2_TXN0 BE_TX2_TXN0
Out
 Connected to RSX pad UNK (41x41 layout)
V41 TX2_TXP0 BE_TX2_TXP0
Out
 Connected to RSX pad UNK (41x41 layout)
W1 N/A N/A N/A Missing pad
W2 N/A N/A N/A Missing pad
W3 Y0_DQ3_6 Y0_XDR1_DQ3
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
W4 Y0_DQ3N_6 Y0_XDR1_DQN3
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
W5 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
W6 Y0_DQ3_3 Y0_XDR1_DQ5
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
W7 Y0_DQ3N_3 Y0_XDR1_DQN5
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
W8 Y0_DQ3_GNDA GND
Others
 Ground
W9 NC_OPEN15 GND
Others
 Ground
W10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
W11 GND GND
Others
 Ground
W12 N/A N/A N/A Missing pad
W13 N/A N/A N/A Missing pad
W14 N/A N/A N/A Missing pad
W15 N/A N/A N/A Missing pad
W16 N/A N/A N/A Missing pad
W17 N/A N/A N/A Missing pad
W18 N/A N/A N/A Missing pad
W19 N/A N/A N/A Missing pad
W20 N/A N/A N/A Missing pad
W21 N/A N/A N/A Missing pad
W22 N/A N/A N/A Missing pad
W23 N/A N/A N/A Missing pad
W24 N/A N/A N/A Missing pad
W25 N/A N/A N/A Missing pad
W26 N/A N/A N/A Missing pad
W27 N/A N/A N/A Missing pad
W28 N/A N/A N/A Missing pad
W29 N/A N/A N/A Missing pad
W30 N/A N/A N/A Missing pad
W31 GND GND
Others
 Ground
W32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
W33 NC_OPEN40 GND
Others
 Ground
W34 TX2_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
W35 TX2_TXN3 BE_TX2_TXN3
Out
 Connected to RSX pad UNK (41x41 layout)
W36 TX2_TXP3 BE_TX2_TXP3
Out
 Connected to RSX pad UNK (41x41 layout)
W37 GND GND
Others
 Ground
W38 TX2_TXCLKN BE_TX2_TXCLKN
Out
 Connected to RSX pad UNK (41x41 layout)
W39 TX2_TXCLKP BE_TX2_TXCLKP
Out
 Connected to RSX pad UNK (41x41 layout)
W40 N/A N/A N/A Missing pad
W41 N/A N/A N/A Missing pad
Y1 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
Y2 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
Y3 Y0_DQ3_8 N/C
Not Connected
 Not Connected
Y4 Y0_DQ3N_8 N/C
Not Connected
 Not Connected
Y5 GND GND
Others
 Ground
Y6 Y0_DQ3_7 Y0_XDR1_DQ9
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
Y7 Y0_DQ3N_7 Y0_XDR1_DQN9
Out
 Connected to XDR DRAM Y0_XDR1 (second chip) pad UNK
Y8 GND GND
Others
 Ground
Y9 NC_OPEN14 GND
Others
 Ground
Y10 GND GND
Others
 Ground
Y11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
Y12 N/A N/A N/A Missing pad
Y13 N/A N/A N/A Missing pad
Y14 N/A N/A N/A Missing pad
Y15 N/A N/A N/A Missing pad
Y16 N/A N/A N/A Missing pad
Y17 N/A N/A N/A Missing pad
Y18 N/A N/A N/A Missing pad
Y19 N/A N/A N/A Missing pad
Y20 N/A N/A N/A Missing pad
Y21 N/A N/A N/A Missing pad
Y22 N/A N/A N/A Missing pad
Y23 N/A N/A N/A Missing pad
Y24 N/A N/A N/A Missing pad
Y25 N/A N/A N/A Missing pad
Y26 N/A N/A N/A Missing pad
Y27 N/A N/A N/A Missing pad
Y28 N/A N/A N/A Missing pad
Y29 N/A N/A N/A Missing pad
Y30 N/A N/A N/A Missing pad
Y31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
Y32 GND GND
Others
 Ground
Y33 NC_OPEN39 GND
Others
 Ground
Y34 RX2_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
Y35 TX2_TXN5 BE_TX2_TXN5
Out
 Connected to RSX pad UNK (41x41 layout)
Y36 TX2_TXP5 BE_TX2_TXP5
Out
 Connected to RSX pad UNK (41x41 layout)
Y37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
Y38 TX2_TXN6 BE_TX2_TXN6
Out
 Connected to RSX pad UNK (41x41 layout)
Y39 TX2_TXP6 BE_TX2_TXP6
Out
 Connected to RSX pad UNK (41x41 layout)
Y40 TX2_TXN4 BE_TX2_TXN4
Out
 Connected to RSX pad UNK (41x41 layout)
Y41 TX2_TXP4 BE_TX2_TXP4
Out
 Connected to RSX pad UNK (41x41 layout)
AA1 Y1_DQ0_RLOAD BE_Y1_DQ0_RLOAD
In
 Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
AA2 GND GND
Others
 Ground
AA3 Y1_DQ0_VREF +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AA4 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AA5 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AA6 GND GND
Others
 Ground
AA7 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AA8 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AA9 NC_OPEN13 GND
Others
 Ground
AA10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AA11 GND GND
Others
 Ground
AA12 N/A N/A N/A Missing pad
AA13 N/A N/A N/A Missing pad
AA14 N/A N/A N/A Missing pad
AA15 N/A N/A N/A Missing pad
AA16 N/A N/A N/A Missing pad
AA17 N/A N/A N/A Missing pad
AA18 N/A N/A N/A Missing pad
AA19 N/A N/A N/A Missing pad
AA20 N/A N/A N/A Missing pad
AA21 N/A N/A N/A Missing pad
AA22 N/A N/A N/A Missing pad
AA23 N/A N/A N/A Missing pad
AA24 N/A N/A N/A Missing pad
AA25 N/A N/A N/A Missing pad
AA26 N/A N/A N/A Missing pad
AA27 N/A N/A N/A Missing pad
AA28 N/A N/A N/A Missing pad
AA29 N/A N/A N/A Missing pad
AA30 N/A N/A N/A Missing pad
AA31 GND GND
Others
 Ground
AA32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AA33 NC_OPEN38 GND
Others
 Ground
AA34 RX2_GNDA GND
Others
 Ground
AA35 RX2_RXP7 BE_RX2_RXP7
In
 Connected to RSX pad UNK (41x41 layout)
AA36 RX2_RXN7 BE_RX2_RXN7
In
 Connected to RSX pad UNK (41x41 layout)
AA37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AA38 TX2_TXN7 BE_TX2_TXN7
Out
 Connected to RSX pad UNK (41x41 layout)
AA39 TX2_TXP7 BE_TX2_TXP7
Out
 Connected to RSX pad UNK (41x41 layout)
AA40 N/A N/A N/A Missing pad
AA41 N/A N/A N/A Missing pad
AB1 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AB2 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AB3 Y1_DQ0_8 N/C
Not Connected
 Not Connected
AB4 Y1_DQ0N_8 N/C
Not Connected
 Not Connected
AB5 GND GND
Others
 Ground
AB6 Y1_DQ0_1 Y1_XDR1_DQ8
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AB7 Y1_DQ0N_1 Y1_XDR1_DQN8
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AB8 GND GND
Others
 Ground
AB9 NC_OPEN12 GND
Others
 Ground
AB10 GND GND
Others
 Ground
AB11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AB12 N/A N/A N/A Missing pad
AB13 N/A N/A N/A Missing pad
AB14 N/A N/A N/A Missing pad
AB15 N/A N/A N/A Missing pad
AB16 N/A N/A N/A Missing pad
AB17 N/A N/A N/A Missing pad
AB18 N/A N/A N/A Missing pad
AB19 N/A N/A N/A Missing pad
AB20 N/A N/A N/A Missing pad
AB21 N/A N/A N/A Missing pad
AB22 N/A N/A N/A Missing pad
AB23 N/A N/A N/A Missing pad
AB24 N/A N/A N/A Missing pad
AB25 N/A N/A N/A Missing pad
AB26 N/A N/A N/A Missing pad
AB27 N/A N/A N/A Missing pad
AB28 N/A N/A N/A Missing pad
AB29 N/A N/A N/A Missing pad
AB30 N/A N/A N/A Missing pad
AB31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AB32 GND GND
Others
 Ground
AB33 NC_OPEN37 GND
Others
 Ground
AB34 GND GND
Others
 Ground
AB35 RX2_RXP5 BE_RX2_RXP5
In
 Connected to RSX pad UNK (41x41 layout)
AB36 RX2_RXN5 BE_RX2_RXN5
In
 Connected to RSX pad UNK (41x41 layout)
AB37 GND GND
Others
 Ground
AB38 RX2_RXP4 BE_RX2_RXP4
In
 Connected to RSX pad UNK (41x41 layout)
AB39 RX2_RXN4 BE_RX2_RXN4
In
 Connected to RSX pad UNK (41x41 layout)
AB40 RX2_RXP6 BE_RX2_RXP6
In
 Connected to RSX pad UNK (41x41 layout)
AB41 RX2_RXN6 BE_RX2_RXN6
In
 Connected to RSX pad UNK (41x41 layout)
AC1 N/A N/A N/A Missing pad
AC2 N/A N/A N/A Missing pad
AC3 Y1_DQ0_4 Y1_XDR1_DQ2
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AC4 Y1_DQ0N_4 Y1_XDR1_DQN2
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AC5 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AC6 Y1_DQ0_7 Y1_XDR1_DQ4
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AC7 Y1_DQ0N_7 Y1_XDR1_DQN4
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AC8 Y1_DQ0_GNDA GND
Others
 Ground
AC9 NC_OPEN11 GND
Others
 Ground
AC10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AC11 GND GND
Others
 Ground
AC12 N/A N/A N/A Missing pad
AC13 N/A N/A N/A Missing pad
AC14 N/A N/A N/A Missing pad
AC15 N/A N/A N/A Missing pad
AC16 N/A N/A N/A Missing pad
AC17 N/A N/A N/A Missing pad
AC18 N/A N/A N/A Missing pad
AC19 N/A N/A N/A Missing pad
AC20 N/A N/A N/A Missing pad
AC21 N/A N/A N/A Missing pad
AC22 N/A N/A N/A Missing pad
AC23 N/A N/A N/A Missing pad
AC24 N/A N/A N/A Missing pad
AC25 N/A N/A N/A Missing pad
AC26 N/A N/A N/A Missing pad
AC27 N/A N/A N/A Missing pad
AC28 N/A N/A N/A Missing pad
AC29 N/A N/A N/A Missing pad
AC30 N/A N/A N/A Missing pad
AC31 GND GND
Others
 Ground
AC32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AC33 NC_OPEN36 GND
Others
 Ground
AC34 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AC35 RX2_RXP3 BE_RX2_RXP3
In
 Connected to RSX pad UNK (41x41 layout)
AC36 RX2_RXN3 BE_RX2_RXN3
In
 Connected to RSX pad UNK (41x41 layout)
AC37 GND GND
Others
 Ground
AC38 RX2_RXCLKP BE_RX2_RXCLKP
In
 Connected to RSX pad UNK (41x41 layout)
AC39 RX2_RXCLKN BE_RX2_RXCLKN
In
 Connected to RSX pad UNK (41x41 layout)
AC40 N/A N/A N/A Missing pad
AC41 N/A N/A N/A Missing pad
AD1 Y1_DQ0_2 Y1_XDR1_DQ6
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AD2 Y1_DQ0N_2 Y1_XDR1_DQN6
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AD3 Y1_DQ0_5 Y1_XDR1_DQ14
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AD4 Y1_DQ0N_5 Y1_XDR1_DQN14
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AD5 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AD6 Y1_DQ1_0 Y1_XDR1_DQ12
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AD7 Y1_DQ1N_0 Y1_XDR1_DQN12
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AD8 Y1_DQ0_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
AD9 NC_OPEN10 GND
Others
 Ground
AD10 GND GND
Others
 Ground
AD11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AD12 N/A N/A N/A Missing pad
AD13 N/A N/A N/A Missing pad
AD14 N/A N/A N/A Missing pad
AD15 N/A N/A N/A Missing pad
AD16 N/A N/A N/A Missing pad
AD17 N/A N/A N/A Missing pad
AD18 N/A N/A N/A Missing pad
AD19 N/A N/A N/A Missing pad
AD20 N/A N/A N/A Missing pad
AD21 N/A N/A N/A Missing pad
AD22 N/A N/A N/A Missing pad
AD23 N/A N/A N/A Missing pad
AD24 N/A N/A N/A Missing pad
AD25 N/A N/A N/A Missing pad
AD26 N/A N/A N/A Missing pad
AD27 N/A N/A N/A Missing pad
AD28 N/A N/A N/A Missing pad
AD29 N/A N/A N/A Missing pad
AD30 N/A N/A N/A Missing pad
AD31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AD32 GND GND
Others
 Ground
AD33 NC_OPEN35 GND
Others
 Ground
AD34 GND GND
Others
 Ground
AD35 RX2_RXP1 BE_RX2_RXP1
In
 Connected to RSX pad UNK (41x41 layout)
AD36 RX2_RXN1 BE_RX2_RXN1
In
 Connected to RSX pad UNK (41x41 layout)
AD37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AD38 RX2_RXP0 BE_RX2_RXP0
In
 Connected to RSX pad UNK (41x41 layout)
AD39 RX2_RXN0 BE_RX2_RXN0
In
 Connected to RSX pad UNK (41x41 layout)
AD40 RX2_RXP2 BE_RX2_RXP2
In
 Connected to RSX pad UNK (41x41 layout)
AD41 RX2_RXN2 BE_RX2_RXN2
In
 Connected to RSX pad UNK (41x41 layout)
AE1 N/A N/A N/A Missing pad
AE2 N/A N/A N/A Missing pad
AE3 Y1_DQ1_1 Y1_XDR1_DQ10
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AE4 Y1_DQ1N_1 Y1_XDR1_DQN10
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AE5 GND GND
Others
 Ground
AE6 Y1_DQ1_3 Y1_XDR1_DQ0
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AE7 Y1_DQ1N_3 Y1_XDR1_DQN0
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AE8 Y1_DQ1_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
AE9 NC_OPEN09 GND
Others
 Ground
AE10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AE11 GND GND
Others
 Ground
AE12 N/A N/A N/A Missing pad
AE13 N/A N/A N/A Missing pad
AE14 N/A N/A N/A Missing pad
AE15 N/A N/A N/A Missing pad
AE16 N/A N/A N/A Missing pad
AE17 N/A N/A N/A Missing pad
AE18 N/A N/A N/A Missing pad
AE19 N/A N/A N/A Missing pad
AE20 N/A N/A N/A Missing pad
AE21 N/A N/A N/A Missing pad
AE22 N/A N/A N/A Missing pad
AE23 N/A N/A N/A Missing pad
AE24 N/A N/A N/A Missing pad
AE25 N/A N/A N/A Missing pad
AE26 N/A N/A N/A Missing pad
AE27 N/A N/A N/A Missing pad
AE28 N/A N/A N/A Missing pad
AE29 N/A N/A N/A Missing pad
AE30 N/A N/A N/A Missing pad
AE31 GND GND
Others
 Ground
AE32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AE33 NC_OPEN34 GND
Others
 Ground
AE34 TX3_GNDA GND
Others
 Ground
AE35 GND GND
Others
 Ground
AE36 GND GND
Others
 Ground
AE37 RC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AE38 GND GND
Others
 Ground
AE39 RC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AE40 N/A N/A N/A Missing pad
AE41 N/A N/A N/A Missing pad
AF1 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AF2 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AF3 Y1_DQ1_8 N/C
Not Connected
 Not Connected
AF4 Y1_DQ1N_8 N/C
Not Connected
 Not Connected
AF5 GND GND
Others
 Ground
AF6 Y1_DQ0_0 Y1_XDR0_DQ8
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AF7 Y1_DQ0N_0 Y1_XDR0_DQN8
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AF8 Y1_DQ1_GNDA GND
Others
 Ground
AF9 NC_OPEN08 GND
Others
 Ground
AF10 GND GND
Others
 Ground
AF11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AF12 N/A N/A N/A Missing pad
AF13 N/A N/A N/A Missing pad
AF14 N/A N/A N/A Missing pad
AF15 N/A N/A N/A Missing pad
AF16 N/A N/A N/A Missing pad
AF17 N/A N/A N/A Missing pad
AF18 N/A N/A N/A Missing pad
AF19 N/A N/A N/A Missing pad
AF20 N/A N/A N/A Missing pad
AF21 N/A N/A N/A Missing pad
AF22 N/A N/A N/A Missing pad
AF23 N/A N/A N/A Missing pad
AF24 N/A N/A N/A Missing pad
AF25 N/A N/A N/A Missing pad
AF26 N/A N/A N/A Missing pad
AF27 N/A N/A N/A Missing pad
AF28 N/A N/A N/A Missing pad
AF29 N/A N/A N/A Missing pad
AF30 N/A N/A N/A Missing pad
AF31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AF32 GND GND
Others
 Ground
AF33 NC_OPEN33 GND
Others
 Ground
AF34 TX3_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
AF35 TX3_TXN1 BE_TX3_TXN1
Out
 Connected to RSX pad UNK (41x41 layout)
AF36 TX3_TXP1 BE_TX3_TXP1
Out
 Connected to RSX pad UNK (41x41 layout)
AF37 GND GND
Others
 Ground
AF38 TX3_TXN2 BE_TX3_TXN2
Out
 Connected to RSX pad UNK (41x41 layout)
AF39 TX3_TXP2 BE_TX3_TXP2
Out
 Connected to RSX pad UNK (41x41 layout)
AF40 TX3_TXN0 BE_TX3_TXN0
Out
 Connected to RSX pad UNK (41x41 layout)
AF41 TX3_TXP0 BE_TX3_TXP0
Out
 Connected to RSX pad UNK (41x41 layout)
AG1 N/A N/A N/A Missing pad
AG2 N/A N/A N/A Missing pad
AG3 Y1_DQ0_6 Y1_XDR0_DQ2
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AG4 Y1_DQ0N_6 Y1_XDR0_DQN2
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AG5 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AG6 Y1_DQ1_2 Y1_XDR0_DQ4
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AG7 Y1_DQ1N_2 Y1_XDR0_DQN4
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AG8 GND GND
Others
 Ground
AG9 NC_OPEN07 GND
Others
 Ground
AG10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AG11 GND GND
Others
 Ground
AG12 N/A N/A N/A Missing pad
AG13 N/A N/A N/A Missing pad
AG14 N/A N/A N/A Missing pad
AG15 N/A N/A N/A Missing pad
AG16 N/A N/A N/A Missing pad
AG17 N/A N/A N/A Missing pad
AG18 N/A N/A N/A Missing pad
AG19 N/A N/A N/A Missing pad
AG20 N/A N/A N/A Missing pad
AG21 N/A N/A N/A Missing pad
AG22 N/A N/A N/A Missing pad
AG23 N/A N/A N/A Missing pad
AG24 N/A N/A N/A Missing pad
AG25 N/A N/A N/A Missing pad
AG26 N/A N/A N/A Missing pad
AG27 N/A N/A N/A Missing pad
AG28 N/A N/A N/A Missing pad
AG29 N/A N/A N/A Missing pad
AG30 N/A N/A N/A Missing pad
AG31 GND GND
Others
 Ground
AG32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AG33 NC_OPEN32 GND
Others
 Ground
AG34 TX4_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
AG35 TX3_TXN3 BE_TX3_TXN3
Out
 Connected to RSX pad UNK (41x41 layout)
AG36 TX3_TXP3 BE_TX3_TXP3
Out
 Connected to RSX pad UNK (41x41 layout)
AG37 GND GND
Others
 Ground
AG38 TX3_TXCLKN BE_TX3_TXCLKN
Out
 Connected to RSX pad UNK (41x41 layout)
AG39 TX3_TXCLKP BE_TX3_TXCLKP
Out
 Connected to RSX pad UNK (41x41 layout)
AG40 N/A N/A N/A Missing pad
AG41 N/A N/A N/A Missing pad
AH1 Y1_DQ0_3 Y1_XDR0_DQ6
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AH2 Y1_DQ0N_3 Y1_XDR0_DQN6
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AH3 Y1_DQ1_5 Y1_XDR0_DQ14
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AH4 Y1_DQ1N_5 Y1_XDR0_DQN14
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AH5 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AH6 Y1_DQ1_4 Y1_XDR0_DQ12
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AH7 Y1_DQ1N_4 Y1_XDR0_DQN12
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AH8 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AH9 NC_OPEN06 GND
Others
 Ground
AH10 GND GND
Others
 Ground
AH11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AH12 N/A N/A N/A Missing pad
AH13 N/A N/A N/A Missing pad
AH14 N/A N/A N/A Missing pad
AH15 N/A N/A N/A Missing pad
AH16 N/A N/A N/A Missing pad
AH17 N/A N/A N/A Missing pad
AH18 N/A N/A N/A Missing pad
AH19 N/A N/A N/A Missing pad
AH20 N/A N/A N/A Missing pad
AH21 N/A N/A N/A Missing pad
AH22 N/A N/A N/A Missing pad
AH23 N/A N/A N/A Missing pad
AH24 N/A N/A N/A Missing pad
AH25 N/A N/A N/A Missing pad
AH26 N/A N/A N/A Missing pad
AH27 N/A N/A N/A Missing pad
AH28 N/A N/A N/A Missing pad
AH29 N/A N/A N/A Missing pad
AH30 N/A N/A N/A Missing pad
AH31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AH32 GND GND
Others
 Ground
AH33 NC_OPEN31 GND
Others
 Ground
AH34 TX4_GNDA GND
Others
 Ground
AH35 TX3_TXN5 BE_TX3_TXN5
Out
 Connected to RSX pad UNK (41x41 layout)
AH36 TX3_TXP5 BE_TX3_TXP5
Out
 Connected to RSX pad UNK (41x41 layout)
AH37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AH38 TX3_TXN6 BE_TX3_TXN6
Out
 Connected to RSX pad UNK (41x41 layout)
AH39 TX3_TXP6 BE_TX3_TXP6
Out
 Connected to RSX pad UNK (41x41 layout)
AH40 TX3_TXN4 BE_TX3_TXN4
Out
 Connected to RSX pad UNK (41x41 layout)
AH41 TX3_TXP4 BE_TX3_TXP4
Out
 Connected to RSX pad UNK (41x41 layout)
AJ1 N/A N/A N/A Missing pad
AJ2 N/A N/A N/A Missing pad
AJ3 Y1_DQ1_7 Y1_XDR0_DQ10
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AJ4 Y1_DQ1N_7 Y1_XDR0_DQN10
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AJ5 GND GND
Others
 Ground
AJ6 Y1_DQ1_6 Y1_XDR0_DQ0
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AJ7 Y1_DQ1N_6 Y1_XDR0_DQN0
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AJ8 GND GND
Others
 Ground
AJ9 NC_OPEN05 GND
Others
 Ground
AJ10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AJ11 GND GND
Others
 Ground
AJ12 N/A N/A N/A Missing pad
AJ13 N/A N/A N/A Missing pad
AJ14 N/A N/A N/A Missing pad
AJ15 N/A N/A N/A Missing pad
AJ16 N/A N/A N/A Missing pad
AJ17 N/A N/A N/A Missing pad
AJ18 N/A N/A N/A Missing pad
AJ19 N/A N/A N/A Missing pad
AJ20 N/A N/A N/A Missing pad
AJ21 N/A N/A N/A Missing pad
AJ22 N/A N/A N/A Missing pad
AJ23 N/A N/A N/A Missing pad
AJ24 N/A N/A N/A Missing pad
AJ25 N/A N/A N/A Missing pad
AJ26 N/A N/A N/A Missing pad
AJ27 N/A N/A N/A Missing pad
AJ28 N/A N/A N/A Missing pad
AJ29 N/A N/A N/A Missing pad
AJ30 N/A N/A N/A Missing pad
AJ31 GND GND
Others
 Ground
AJ32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AJ33 NC_OPEN30 GND
Others
 Ground
AJ34 GND GND
Others
 Ground
AJ35 TX4_TXN1 N/C
Not Connected
 Not Connected
AJ36 TX4_TXP1 N/C
Not Connected
 Not Connected
AJ37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AJ38 TX3_TXN7 BE_TX3_TXN7
Out
 Connected to RSX pad UNK (41x41 layout)
AJ39 TX3_TXP7 BE_TX3_TXP7
Out
 Connected to RSX pad UNK (41x41 layout)
AJ40 N/A N/A N/A Missing pad
AJ41 N/A N/A N/A Missing pad
AK1 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AK2 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AK3 Y1_RQ_RST BE_Y1_RQ_RST
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad C15. Serial reset
AK4 GND GND
Others
 Ground
AK5 Y1_RQ_SRD BE_Y1_RQ_SRD
In
 Connected to XDR DRAM Y1_XDR0 (third chip) pad C16. Serial data in/out ?
AK6 GND GND
Others
 Ground
AK7 GND GND
Others
 Ground
AK8 Y1_RQ_GNDA GND
Others
 Ground
AK9 NC_OPEN04 GND
Others
 Ground
AK10 GND GND
Others
 Ground
AK11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AK12 N/A N/A N/A Missing pad
AK13 N/A N/A N/A Missing pad
AK14 N/A N/A N/A Missing pad
AK15 N/A N/A N/A Missing pad
AK16 N/A N/A N/A Missing pad
AK17 N/A N/A N/A Missing pad
AK18 N/A N/A N/A Missing pad
AK19 N/A N/A N/A Missing pad
AK20 N/A N/A N/A Missing pad
AK21 N/A N/A N/A Missing pad
AK22 N/A N/A N/A Missing pad
AK23 N/A N/A N/A Missing pad
AK24 N/A N/A N/A Missing pad
AK25 N/A N/A N/A Missing pad
AK26 N/A N/A N/A Missing pad
AK27 N/A N/A N/A Missing pad
AK28 N/A N/A N/A Missing pad
AK29 N/A N/A N/A Missing pad
AK30 N/A N/A N/A Missing pad
AK31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AK32 GND GND
Others
 Ground
AK33 NC_OPEN29 GND
Others
 Ground
AK34 RC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AK35 TX4_TXN3 N/C
Not Connected
 Not Connected
AK36 TX4_TXP3 N/C
Not Connected
 Not Connected
AK37 GND GND
Others
 Ground
AK38 TX4_TXN2 N/C
Not Connected
 Not Connected
AK39 TX4_TXP2 N/C
Not Connected
 Not Connected
AK40 TX4_TXN0 N/C
Not Connected
 Not Connected
AK41 TX4_TXP0 N/C
Not Connected
 Not Connected
AL1 GND GND
Others
 Ground
AL2 Y1_RQ0 BE_Y1_RQ0
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad C3. 12-bit request/command bus
AL3 GND GND
Others
 Ground
AL4 Y1_RQ1 BE_Y1_RQ1
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D13. 12-bit request/command bus
AL5 GND GND
Others
 Ground
AL6 GND GND
Others
 Ground
AL7 Y1_DQC_VOLREF BE_Y1_DQC_VOLREF
In
 Resistor 95.3 ohms to +1.2V_YC_RC_VDDIO
AL8 Y1_RQ_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
AL9 NC_OPEN03 GND
Others
 Ground
AL10 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL11 GND GND
Others
 Ground
AL12 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL13 GND GND
Others
 Ground
AL14 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL15 GND GND
Others
 Ground
AL16 PLL_NC GND
Others
 Ground
AL17 PLL_NC GND
Others
 Ground
AL18 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL19 GND GND
Others
 Ground
AL20 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL21 GND GND
Others
 Ground
AL22 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL23 GND GND
Others
 Ground
AL24 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL25 GND GND
Others
 Ground
AL26 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL27 GND GND
Others
 Ground
AL28 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL29 GND GND
Others
 Ground
AL30 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL31 GND GND
Others
 Ground
AL32 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AL33 NC_OPEN28 GND
Others
 Ground
AL34 GND GND
Others
 Ground
AL35 TX4_TXN5 N/C
Not Connected
 Not Connected
AL36 TX4_TXP5 N/C
Not Connected
 Not Connected
AL37 GND GND
Others
 Ground
AL38 TX4_TXCLKN N/C
Not Connected
 Not Connected
AL39 TX4_TXCLKP N/C
Not Connected
 Not Connected
AL40 N/A N/A N/A Missing pad
AL41 N/A N/A N/A Missing pad
AM1 Y1_RQ3 BE_Y1_RQ3
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D4. 12-bit request/command bus
AM2 GND GND
Others
 Ground
AM3 Y1_RQ5 BE_Y1_RQ5
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad E14. 12-bit request/command bus
AM4 GND GND
Others
 Ground
AM5 Y1_RQ2 BE_Y1_RQ2
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D14. 12-bit request/command bus
AM6 GND GND
Others
 Ground
AM7 Y1_DQC_VOLGND BE_Y1_DQC_VOLGND
In
 Capacitor 0.1uf/10v to +1.2V_YC_RC_VDDIO
AM8 Y1_DQ2_GNDA GND
Others
 Ground
AM9 NC_OPEN02 GND
Others
 Ground
AM10 GND GND
Others
 Ground
AM11 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM12 GND GND
Others
 Ground
AM13 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM14 GND GND
Others
 Ground
AM15 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM16 PLL_NC GND
Others
 Ground
AM17 PLL_NC GND
Others
 Ground
AM18 GND GND
Others
 Ground
AM19 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM20 GND GND
Others
 Ground
AM21 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM22 GND GND
Others
 Ground
AM23 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM24 GND GND
Others
 Ground
AM25 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM26 GND GND
Others
 Ground
AM27 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM28 GND GND
Others
 Ground
AM29 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM30 GND GND
Others
 Ground
AM31 VDD +1.0V_BE_VDDC
Others
 Connected to iPowIR IP2003ATRPBF (3 units) pin 6 (Vsw) through NEC/TOKIN proadlizers
AM32 GND GND
Others
 Ground
AM33 NC_OPEN27 GND
Others
 Ground
AM34 TX5_GNDA GND
Others
 Ground
AM35 TX4_TXN7 N/C
Not Connected
 Not Connected
AM36 TX4_TXP7 N/C
Not Connected
 Not Connected
AM37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AM38 TX4_TXN6 N/C
Not Connected
 Not Connected
AM39 TX4_TXP6 N/C
Not Connected
 Not Connected
AM40 TX4_TXN4 N/C
Not Connected
 Not Connected
AM41 TX4_TXP4 N/C
Not Connected
 Not Connected
AN1 GND GND
Others
 Ground
AN2 Y1_RQ4 BE_Y1_RQ4
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad D3. 12-bit request/command bus
AN3 GND GND
Others
 Ground
AN4 Y1_RQ6 BE_Y1_RQ6
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G14. 12-bit request/command bus
AN5 GND GND
Others
 Ground
AN6 Y1_RQ_VREF BE_Y1_RQ_VREF
In
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) power circuit
AN7 Y1_DQC_ROLREF BE_Y1_DQC_ROLREF
In
 Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
AN8 Y1_DQ2_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
AN9 NC_OPEN01 GND
Others
 Ground
AN10 NC_OPEN51 GND
Others
 Ground
AN11 NC_OPEN52 GND
Others
 Ground
AN12 NC_OPEN53 GND
Others
 Ground
AN13 NC_OPEN54 GND
Others
 Ground
AN14 NC_OPEN55 GND
Others
 Ground
AN15 PLL_NC GND
Others
 Ground
AN16 PLL_NC GND
Others
 Ground
AN17 PLL_NC GND
Others
 Ground
AN18 PLL_NC GND
Others
 Ground
AN19 NC_OPEN56 GND
Others
 Ground
AN20 NC_OPEN57 GND
Others
 Ground
AN21 NC_OPEN58 GND
Others
 Ground
AN22 NC_OPEN59 GND
Others
 Ground
AN23 NC_OPEN60 GND
Others
 Ground
AN24 NC_OPEN61 GND
Others
 Ground
AN25 NC_OPEN62 GND
Others
 Ground
AN26 NC_OPEN63 GND
Others
 Ground
AN27 NC_OPEN64 GND
Others
 Ground
AN28 NC_OPEN65 GND
Others
 Ground
AN29 NC_OPEN66 GND
Others
 Ground
AN30 NC_OPEN67 GND
Others
 Ground
AN31 NC_OPEN68 GND
Others
 Ground
AN32 NC_OPEN69 GND
Others
 Ground
AN33 NC_OPEN26 GND
Others
 Ground
AN34 TX5_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
AN35 GND GND
Others
 Ground
AN36 GND GND
Others
 Ground
AN37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AN38 GND GND
Others
 Ground
AN39 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AN40 N/A N/A N/A Missing pad
AN41 N/A N/A N/A Missing pad
AP1 Y1_RQ_CTMP BE_Y1_RQ_CTM
In
 Connected to ICS9218AGLFT clock generator (IC5002) pin 18 (Clock To Master)
AP2 Y1_RQ_CTMN BE_Y1_RQ_CTMN
In
 Connected to ICS9218AGLFT clock generator (IC5002) pin 19 (Clock To Master)
AP3 Y1_RQ7 BE_Y1_RQ7
In
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G13. 12-bit request/command bus
AP4 GND GND
Others
 Ground
AP5 Y1_RQ8 BE_Y1_RQ8
In
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H14. 12-bit request/command bus
AP6 GND GND
Others
 Ground
AP7 GND GND
Others
 Ground
AP8 Y1_DQ3_VDDA +1.5V_BE_YC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through XIO filters
AP9 Y1_DQ3_GNDA GND
Others
 Ground
AP10 GND GND
Others
 Ground
AP11 YC_SCAN_EN GND
Others
 Ground
AP12 YC_TREF GND
Others
 Ground
AP13 SPI_EN_B BE_SPI_CS
In
 Connected to Syscon pad M2 (BGA 200 pads layout)
AP14 PLL_NC GND
Others
 Ground
AP15 PLL_NC GND
Others
 Ground
AP16 PLL_VDDA BE_PLL_VDDA
In
 Connected to Texas Instruments TPS73101DBVRG4 pin 5 through coil (+1.6V_BE_VDDA)
AP17 PLL_GNDA GND
Others
 Ground
AP18 PLL_NC GND
Others
 Ground
AP19 SYS_CONFIG2 BE_SYS_CONF2
In
 Resistor 100 ohms to GND
AP20 SYS_CONFIG0 BE_SYS_CONF0
In
 Resistor 100 ohms to GND
AP21 PSARE2 N/C
Not Connected
 Not Connected (testpad CL1001)
AP22 TBEN BE_TBEN
In
 Resistor 10K ohms to +1.2V_MC2_VDDIO
AP23 THERMAL_OVERLOAD_B BE_THR_ALRT
Out
 Connected to Syscon pad E9 (BGA 200 pads layout)
AP24 TRIGGER_IN BE_TRG_IN
In
 Resistor 100 ohms to GND
AP25 RC_SCAN_EN
Others
 Resistor 470K ohms (R1005) to GND
AP26 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AP27 GND GND
Others
 Ground
AP28 RX4_GNDA GND
Others
 Ground
AP29 RX4_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
AP30 TX6_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
AP31 TX6_GNDA GND
Others
 Ground
AP32 GND GND
Others
 Ground
AP33 RX3_GNDA GND
Others
 Ground
AP34 RX3_VDDA +1.5V_BE_RC_VDDA
Others
 Connected to Vishay Siliconix SI4866DY-T1-E3 pins 1,2,3 through RRAC filters
AP35 TX5_TXN1 N/C
Not Connected
 Not Connected
AP36 TX5_TXP1 N/C
Not Connected
 Not Connected
AP37 GND GND
Others
 Ground
AP38 TX5_TXN2 N/C
Not Connected
 Not Connected
AP39 TX5_TXP2 N/C
Not Connected
 Not Connected
AP40 TX5_TXN0 N/C
Not Connected
 Not Connected
AP41 TX5_TXP0 N/C
Not Connected
 Not Connected
AR1 Y1_RQ_CFMN BE_Y1_RQ_CFMN
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G4. (Clock From Master)
AR2 Y1_RQ_CFMP BE_Y1_RQ_CFM
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad G3. (Clock From Master)
AR3 GND GND
Others
 Ground
AR4 Y1_RQ9 BE_Y1_RQ9
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H13. 12-bit request/command bus
AR5 GND GND
Others
 Ground
AR6 Y1_RQ_SCK BE_Y1_RQ_SCK
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad J15. Serial clock
AR7 Y1_DQ2_2 Y1_XDR1_DQ1
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AR8 Y1_DQ2_7 Y1_XDR1_DQ13
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AR9 Y1_DQ3_0 Y1_XDR1_DQ5
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AR10 Y1_DQ3_7 Y1_XDR1_DQ9
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AR11 YC_XCLK_EN GND
Others
 Ground
AR12 YC_SCAN_OUT N/C
Not Connected
 Not Connected
AR13 SPI_SO BE_SPI_DI
Out
 Connected to Syscon pad M1 (BGA 200 pads layout) through R1013 47
AR14 PLL_NC GND
Others
 Ground
AR15 PLL_NC GND
Others
 Ground
AR16 PLL_NC GND
Others
 Ground
AR17 PLL_NC GND
Others
 Ground
AR18 PLL_NC GND
Others
 Ground
AR19 SYS_CONFIG1 BE_SYS_CONF1
In
 Resistor 100 ohms to GND
AR20 SYS_CONFIG3 BE_SYS_CONF3
In
 Resistor 100 ohms to GND
AR21 SPARE1 N/C
Not Connected
 Not Connected
AR22 PULSE_LIMIT_BYPASS BE_P_L_BYPASS
In
 Resistor 10K ohms to +1.2V_MC2_VDDIO
AR23 SCAN_ENABLE_BYPASS BE_SCAN_ENA
In
 Resistor 100 ohms to GND
AR24 TRIGGER_OUT BE_TRG_OUT
Out
 Resistor 10K ohms to GND
AR25 RC_TEST_MODE_ST GND
Others
 Ground
AR26 RX4_RXP1 BE_RX4_RXP1
In
 Connected to South Bridge pad UNK
AR27 RX4_RXP3 BE_RX4_RXP3
In
 Connected to South Bridge pad UNK
AR28 RX4_RXP5 BE_RX4_RXP5
In
 Connected to South Bridge pad UNK
AR29 RX4_RXP7 BE_RX4_RXP7
In
 Connected to South Bridge pad UNK
AR30 TX6_TXN5 BE_TX6_TXN5
Out
 Connected to South Bridge pad UNK
AR31 TX6_TXN3 BE_TX6_TXN3
Out
 Connected to South Bridge pad UNK
AR32 TX6_TXN1 BE_TX6_TXN1
Out
 Connected to South Bridge pad UNK
AR33 NT_TST04 N/C
Not Connected
 Not Connected
AR34 GND GND
Others
 Ground
AR35 TX5_TXN3 N/C
Not Connected
 Not Connected
AR36 TX5_TXP3 N/C
Not Connected
 Not Connected
AR37 GND GND
Others
 Ground
AR38 TX5_TXCLKN N/C
Not Connected
 Not Connected
AR39 TX5_TXCLKP N/C
Not Connected
 Not Connected
AR40 N/A N/A N/A Missing pad
AR41 N/A N/A N/A Missing pad
AT1 Y1_RQ10 BE_Y1_RQ10
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H3. 12-bit request/command bus
AT2 GND GND
Others
 Ground
AT3 Y1_RQ11 BE_Y1_RQ11
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad H4. 12-bit request/command bus
AT4 GND GND
Others
 Ground
AT5 Y1_RQ_CMD BE_Y1_RQ_CMD
Out
 Connected to XDR DRAM Y1_XDR0 (third chip), and Y1_XDR1 (fourth chip) pad J14. Serial commands
AT6 GND GND
Others
 Ground
AT7 Y1_DQ2N_2 Y1_XDR1_DQN1
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AT8 Y1_DQ2N_7 Y1_XDR1_DQN13
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AT9 Y1_DQ3N_0 Y1_XDR1_DQN5
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AT10 Y1_DQ3N_7 Y1_XDR1_DQN9
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AT11 GND GND
Others
 Ground
AT12 GND GND
Others
 Ground
AT13 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AT14 PLL_NC GND
Others
 Ground
AT15 THERMAL_SENSE_POWER +1.6V_BE_VDDA
In
 Connected to Texas Instruments TPS73101DBVRG4 pin 5
AT16 THERMAL_SENSE_TEST
Others
 Resistor 1M ohms (R1007) to GND
AT17 STI_THERMAL1 STI_THERMAL1
Out
 Connected to Temperature Monitor pin 3 through 100 ohm resistor
AT18 PLL_NC GND
Others
 Ground
AT19 GND GND
Others
 Ground
AT20 GND GND
Others
 Ground
AT21 GND GND
Others
 Ground
AT22 MC2_VDDIO +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
AT23 MC2_VDDIO +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
AT24 GND GND
Others
 Ground
AT25 GND GND
Others
 Ground
AT26 RX4_RXN1 BE_RX4_RXN1
In
 Connected to South Bridge pad UNK
AT27 RX4_RXN3 BE_RX4_RXN3
In
 Connected to South Bridge pad UNK
AT28 RX4_RXN5 BE_RX4_RXN5
In
 Connected to South Bridge pad UNK
AT29 RX4_RXN7 BE_RX4_RXN7
In
 Connected to South Bridge pad UNK
AT30 TX6_TXP5 BE_TX6_TXP5
Out
 Connected to South Bridge pad UNK
AT31 TX6_TXP3 BE_TX6_TXP3
Out
 Connected to South Bridge pad UNK
AT32 TX6_TXP1 BE_TX6_TXP1
Out
 Connected to South Bridge pad UNK
AT33 RC_VOLREF1 BE_RC_VOLREF1
In
 Resistor 56.2 ohms to +1.2V_YC_RC_VDDIO
AT34 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AT35 TX5_TXN5 N/C
Not Connected
 Not Connected
AT36 TX5_TXP5 N/C
Not Connected
 Not Connected
AT37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AT38 TX5_TXN6 N/C
Not Connected
 Not Connected
AT39 TX5_TXP6 N/C
Not Connected
 Not Connected
AT40 TX5_TXN4 N/C
Not Connected
 Not Connected
AT41 TX5_TXP4 N/C
Not Connected
 Not Connected
AU1 GND GND
Others
 Ground
AU2 Y1_DQ2_VREF +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU3 GND GND
Others
 Ground
AU4 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU5 GND GND
Others
 Ground
AU6 GND GND
Others
 Ground
AU7 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU8 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU9 GND GND
Others
 Ground
AU10 GND GND
Others
 Ground
AU11 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU12 YC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU13 GND GND
Others
 Ground
AU14 PLL_NC GND
Others
 Ground
AU15 THERMAL_SENSE_RETURN GND
In
 Ground
AU16 PLL_NC GND
Others
 Ground
AU17 STI_THERMAL0 STI_THERMAL0
Out
 Connected to Temperature Monitor pin 2 through 100 ohm resistor
AU18 PLL_NC GND
Others
 Ground
AU19 MC2_VDDID +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
AU20 MC2_VDDID +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
AU21 MC2_VDDID +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
AU22 GND GND
Others
 Ground
AU23 GND GND
Others
 Ground
AU24 MC2_VDDID +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
AU25 MC2_VDDID +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
AU26 RC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU27 RC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU28 GND GND
Others
 Ground
AU29 GND GND
Others
 Ground
AU30 RC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU31 RC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU32 GND GND
Others
 Ground
AU33 GND GND
Others
 Ground
AU34 RC_VOLGND1 BE_RC_VOLGND1
In
 Capacitor 0.1uf/10v to +1.2V_YC_RC_VDDIO
AU35 RX3_RXP7 N/C
Not Connected
 Not Connected
AU36 RX3_RXN7 N/C
Not Connected
 Not Connected
AU37 RC_VDDID +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AU38 TX5_TXN7 N/C
Not Connected
 Not Connected
AU39 TX5_TXP7 N/C
Not Connected
 Not Connected
AU40 N/A N/A N/A Missing pad
AU41 N/A N/A N/A Missing pad
AV1 Y1_DQ2_RLOAD BE_Y1_DQ2_RLOAD
In
 Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
AV2 Y1_DQ2_1 Y1_XDR0_DQ1
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AV3 Y1_DQ2_5 Y1_XDR0_DQ13
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AV4 Y1_DQ2_0 Y1_XDR0_DQ5
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AV5 Y1_DQ3_4 Y1_XDR0_DQ9
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AV6 Y1_DQ2_8 N/C
Not Connected
 Not Connected
AV7 Y1_DQ2_3 Y1_XDR1_DQ11
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AV8 Y1_DQ3_1 Y1_XDR1_DQ7
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AV9 Y1_DQ3_3 Y1_XDR1_DQ3
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AV10 Y1_DQ3_8 N/C
Not Connected
 Not Connected
AV11 YC_BYP_ENA GND
Others
 Ground
AV12 YC_TEST_MODE_ST GND
Others
 Ground
AV13 SPI_SI BE_SPI_DO
In
 Connected to Syscon pad N2 (BGA 200 pads layout)
AV14 TRST BE_TRST
Not Connected
 Not Connected (testpad CL1107)
AV15 PLL_NC GND
Others
 Ground
AV16 PLL_NC GND
Others
 Ground
AV17 PLL_NC GND
Others
 Ground
AV18 PLL_CTL1
Others
 Resistor 100 ohms (R1009) to GND
AV19 TE(TEST ENABLE) GND
Others
 Ground
AV20 POWER_GOOD BE_POWGOOD
In
 Connected to Syscon pad P1 (BGA 200 pads layout)
AV21 CHECKSTOP_IN_B BE_CHKSTP_IN
In
 Resistor 10K ohms to +1.2V_MC2_VDDIO... and others
AV22 SPI_CTL1 BE_SPI_CTL1
In
 Resistor 100 ohms to GND
AV23 PRSO_UPPER_RIGHT_MODULE N/C
Not Connected
 Not Connected
AV24 TST_CLK1 N/C
Not Connected
 Not Connected (testpad CL1002)
AV25 RC_SCAN_IN
Others
 Resistor 470K ohms (R1008) to GND
AV26 RX4_RXP0 BE_RX4_RXP0
In
 Connected to South Bridge pad UNK
AV27 RX4_RXCLKP BE_RX4_RXCLKP
In
 Connected to South Bridge pad UNK
AV28 RX4_RXP4 BE_RX4_RXP4
In
 Connected to South Bridge pad UNK
AV29 TX6_TXN7 BE_TX6_TXN7
Out
 Connected to South Bridge pad UNK
AV30 TX6_TXN6 BE_TX6_TXN6
Out
 Connected to South Bridge pad UNK
AV31 TX6_TXCLKN BE_TX6_TXCLKN
Out
 Connected to South Bridge pad UNK
AV32 TX6_TXN2 BE_TX6_TXN2
Out
 Connected to South Bridge pad UNK
AV33 RC_ROLREF1 +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AV34 GND GND
Others
 Ground
AV35 RX3_RXP5 N/C
Not Connected
 Not Connected
AV36 RX3_RXN5 N/C
Not Connected
 Not Connected
AV37 GND GND
Others
 Ground
AV38 RX3_RXP4 N/C
Not Connected
 Not Connected
AV39 RX3_RXN4 N/C
Not Connected
 Not Connected
AV40 RX3_RXP6 N/C
Not Connected
 Not Connected
AV41 RX3_RXN6 N/C
Not Connected
 Not Connected
AW1 GND GND
Others
 Ground
AW2 Y1_DQ2N_1 Y1_XDR0_DQN1
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AW3 Y1_DQ2N_5 Y1_XDR0_DQN13
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AW4 Y1_DQ2N_0 Y1_XDR0_DQN5
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AW5 Y1_DQ3N_4 Y1_XDR0_DQN9
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AW6 Y1_DQ2N_8 N/C
Not Connected
 Not Connected
AW7 Y1_DQ2N_3 Y1_XDR1_DQN11
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AW8 Y1_DQ3N_1 Y1_XDR1_DQN7
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AW9 Y1_DQ3N_3 Y1_XDR1_DQN3
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AW10 Y1_DQ3N_8 N/C
Not Connected
 Not Connected
AW11 YC_SCAN_IN GND
Others
 Ground
AW12 TMS BE_TMS
Not Connected
 Not Connected (testpad CL1106)
AW13 TDI BE_TDI
Not Connected
 Not Connected (testpad CL1104)
AW14 TDO BE_TDO
Not Connected
 Not Connected (testpad CL1103)
AW15 PLL_NC GND
Others
 Ground
AW16 NT_TST02 N/C
Not Connected
 Not Connected
AW17 PLL_NC GND
Others
 Ground
AW18 PLL_CTL0
Others
 Resistor 100 ohms (R1011) to GND
AW19 ATTENTION BE_INT
Out
 Connected to Syscon pad T2 (BGA 200 pads layout)
AW20 HARD_RESET BE_HARD_RESET
In
 Connected to Syscon pad P2 (BGA 200 pads layout)
AW21 CHECKSTOP_OUT_B BE_CHKSTP_OUT
Out
 Resistor 10K ohms to +1.2V_MC2_VDDIO
AW22 SPI_CTL0 BE_SPI_CTL0
In
 Resistor 100 ohms to GND
AW23 GRID_TEST N/C
Not Connected
 Not Connected
AW24 TST_CLK0 N/C
Not Connected
 Not Connected (testpad CL1003)
AW25 RC_SCAN_OUT N/C
Not Connected
 Not Connected
AW26 RX4_RXN0 BE_RX4_RXN0
In
 Connected to South Bridge pad UNK
AW27 RX4_RXCLKN BE_RX4_RXCLKN
In
 Connected to South Bridge pad UNK
AW28 RX4_RXN4 BE_RX4_RXN4
In
 Connected to South Bridge pad UNK
AW29 TX6_TXP7 BE_TX6_TXP7
Out
 Connected to South Bridge pad UNK
AW30 TX6_TXP6 BE_TX6_TXP6
Out
 Connected to South Bridge pad UNK
AW31 TX6_TXCLKP BE_TX6_TXCLKP
Out
 Connected to South Bridge pad UNK
AW32 TX6_TXP2 BE_TX6_TXP2
Out
 Connected to South Bridge pad UNK
AW33 RC_RLOAD1 BE_RC_RLOAD1
In
 Resistor 49.9 ohms to +1.2V_YC_RC_VDDIO
AW34 GND GND
Others
 Ground
AW35 RX3_RXP3 N/C
Not Connected
 Not Connected
AW36 RX3_RXN3 N/C
Not Connected
 Not Connected
AW37 GND GND
Others
 Ground
AW38 RX3_RXCLKP N/C
Not Connected
 Not Connected
AW39 RX3_RXCLKN N/C
Not Connected
 Not Connected
AW40 N/A N/A N/A Missing pad
AW41 N/A N/A N/A Missing pad
AY1 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AY2 Y1_DQ2_4 Y1_XDR0_DQ11
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AY3 Y1_DQ2_6 Y1_XDR0_DQ7
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AY4 Y1_DQ3_2 Y1_XDR0_DQ15
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AY5 Y1_DQ3_5 Y1_XDR0_DQ3
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
AY6 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AY7 N/A N/A N/A Missing pad
AY8 Y1_DQ3_6 Y1_XDR1_DQ15
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
AY9 N/A N/A N/A Missing pad
AY10 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AY11 YC_RSRV0 GND
Others
 Ground
AY12 N/A N/A N/A Missing pad
AY13 SPI_CLK BE_SPI_CLK
In
 Connected to Syscon pad N1 (BGA 200 pads layout) through R1014 0
AY14 N/A N/A N/A Missing pad
AY15 PLL_REFCLK_B BE_PLL_REFCLK_N
In
 Connected to ICS9218AGLFT clock generator (IC5003) pin 24
AY16 N/A N/A N/A Missing pad
AY17 NT_TST01 N/C
Not Connected
 Not Connected
AY18 N/A N/A N/A Missing pad
AY19 EXT_CLK_EN
Others
 Resistor 100 ohms (R1012) to GND
AY20 N/A N/A N/A Missing pad
AY21 MC2_VDDIO +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
AY22 N/A N/A N/A Missing pad
AY23 MC2_VDDIO +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
AY24 N/A N/A N/A Missing pad
AY25 RC_REFCLKN BE_RC_REFCLK_N
In
 Connected to ICS9214DGLFT clock generator (IC5004) pin 24
AY26 RX4_RXP2 BE_RX4_RXP2
In
 Connected to South Bridge pad UNK
AY27 N/A N/A N/A Missing pad
AY28 RX4_RXP6 BE_RX4_RXP6
In
 Connected to South Bridge pad UNK
AY29 N/A N/A N/A Missing pad
AY30 TX6_TXN4 BE_TX6_TXN4
Out
 Connected to South Bridge pad UNK
AY31 N/A N/A N/A Missing pad
AY32 TX6_TXN0 BE_TX6_TXN0
Out
 Connected to South Bridge pad UNK
AY33 N/A N/A N/A Missing pad
AY34 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AY35 RX3_RXP1 N/C
Not Connected
 Not Connected
AY36 RX3_RXN1 N/C
Not Connected
 Not Connected
AY37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
AY38 RX3_RXP0 N/C
Not Connected
 Not Connected
AY39 RX3_RXN0 N/C
Not Connected
 Not Connected
AY40 RX3_RXP2 N/C
Not Connected
 Not Connected
AY41 RX3_RXN2 N/C
Not Connected
 Not Connected
BA1 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
BA2 Y1_DQ2N_4 Y1_XDR0_DQN11
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
BA3 Y1_DQ2N_6 Y1_XDR0_DQN7
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
BA4 Y1_DQ3N_2 Y1_XDR0_DQN15
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
BA5 Y1_DQ3N_5 Y1_XDR0_DQN3
Out
 Connected to XDR DRAM Y1_XDR0 (third chip) pad UNK
BA6 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
BA7 N/A N/A N/A Missing pad
BA8 Y1_DQ3N_6 Y1_XDR1_DQN15
Out
 Connected to XDR DRAM Y1_XDR1 (fourth chip) pad UNK
BA9 N/A N/A N/A Missing pad
BA10 YC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
BA11 YC_RSRV1 GND
Others
 Ground
BA12 N/A N/A N/A Missing pad
BA13 TCK BE_TCK
Not Connected
 Not Connected (testpad CL1105)
BA14 N/A N/A N/A Missing pad
BA15 PLL_REFCLK BE_PLL_REFCLK_P
In
 Connected to ICS9218AGLFT clock generator (IC5003) pin 25
BA16 N/A N/A N/A Missing pad
BA17 PLL_BGA N/C
Not Connected
 Not Connected (testpad CL1004)
BA18 N/A N/A N/A Missing pad
BA19 EXT_CLK
Others
 Resistor 49.9 ohms (R1015) to GND
BA20 N/A N/A N/A Missing pad
BA21 MC2_VDDID +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
BA22 N/A N/A N/A Missing pad
BA23 MC2_VDDID +1.2V_MC2_VDDIO
Others
 Connected to Mitsumi MM3141CNRE pin 5
BA24 N/A N/A N/A Missing pad
BA25 RC_REFCLKP BE_RC_REFCLK_P
In
 Connected to ICS9214DGLFT clock generator (IC5004) pin 23
BA26 RX4_RXN2 BE_RX4_RXN2
In
 Connected to South Bridge pad UNK
BA27 N/A N/A N/A Missing pad
BA28 RX4_RXN6 BE_RX4_RXN6
In
 Connected to South Bridge pad UNK
BA29 N/A N/A N/A Missing pad
BA30 TX6_TXP4 BE_TX6_TXP4
Out
 Connected to South Bridge pad UNK
BA31 N/A N/A N/A Missing pad
BA32 TX6_TXP0 BE_TX6_TXP0
Out
 Connected to South Bridge pad UNK
BA33 N/A N/A N/A Missing pad
BA34 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
BA35 GND GND
Others
 Ground
BA36 GND GND
Others
 Ground
BA37 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
BA38 GND GND
Others
 Ground
BA39 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
BA40 RC_VDDIO +1.2V_YC_RC_VDDIO
Others
 Connected to Vishay Siliconix SUD40N02-08-E3 pin 3
BA41 GND GND
Others
 Ground

remark: the following Pad #letter's are not used: I, O, Q, S, X, Z, AI, AO, AQ, AS, AX, AZ

Gallery

  • CELL grid raw/bare sketch

    CELL grid raw/bare sketch

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