Talk:CXD9208GP: Difference between revisions
Jump to navigation
Jump to search
mNo edit summary |
(→new findings: Removed my wrong assumptions. I'm leaving notes by M4j0r as they are correct and can be moved to main page at some point.) |
||
| (5 intermediate revisions by 4 users not shown) | |||
| Line 25: | Line 25: | ||
**https://github.com/PCSX2/pcsx2/wiki/PSX-mode | **https://github.com/PCSX2/pcsx2/wiki/PSX-mode | ||
**http://shmups.system11.org/viewtopic.php?f=6&t=56010&start=30 | **http://shmups.system11.org/viewtopic.php?f=6&t=56010&start=30 | ||
===new findings=== | |||
The CXD9208GP is used as an adapter between the PS3 south bridge and the EE, it has a PCI interface for the PS3 side and a SIF (SBUS) interface for the PS2 side [https://twitter.com/minaralwasser/status/1067561915457638406]. I've documented the PCI id here: [https://pci-ids.ucw.cz/read/PC/104d/820e]. | |||
The chip/package looks very similar to the CXD9731GP SPEED [https://ps2drives.x-pec.com/images/guide_westerndigital/easymod/DSC00159.jpg] chip. That makes sense since (early) SPEED partly functions as a PCI <-> SSBUS adapter. | |||
[[User:M4j0r|M4j0r]] ([[User talk:M4j0r|talk]]) 19:40, 4 October 2022 (UTC) | |||
Latest revision as of 20:25, 24 September 2024
Seems to be similar than the PS2 IOP chip (I/O Processor)
Some PS2 slim models (dated around 2006) such SCPH-75001, SCPH-77001 uses an IOP chip with partnumber: CXD9209GP photo. The PS3 chip is older because PS3 was designed before 2006
- Wrote by 47iscool on psx-scene
Log file generated by Playstation 2 Ident v0.804, built on Aug 25 2013 19:57:49 ... IOP Revision: 0x0030 (CXD9796GP/CXD9209GP) RAM size: 2 MB SSBUSC revision: 0x31 (CXD9611) ... Mainboard: Model name: SCPH-75001 Mainboard model: GH-041 ...
- A look inside the European PS3 (Monday 26th March 2007)
- http://playstation.wikia.com/wiki/PlayStation_2
- DECKARD
- https://en.wikipedia.org/wiki/PlayStation_2_technical_specifications#I.2FO_processor
- http://psx-scene.com/forums/f110/ps2-slimline-scph-90006-console-model-id-0xd478-speed-capabilities-issue-156423/
- https://github.com/PCSX2/pcsx2/wiki/PSX-mode
- http://shmups.system11.org/viewtopic.php?f=6&t=56010&start=30
new findings[edit source]
The CXD9208GP is used as an adapter between the PS3 south bridge and the EE, it has a PCI interface for the PS3 side and a SIF (SBUS) interface for the PS2 side [1]. I've documented the PCI id here: [2]. The chip/package looks very similar to the CXD9731GP SPEED [3] chip. That makes sense since (early) SPEED partly functions as a PCI <-> SSBUS adapter. M4j0r (talk) 19:40, 4 October 2022 (UTC)