Template:Syscon pinout LQFP 100 pins: Difference between revisions
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(Not sure at which point it was added the CELL pad name BA17 but im guessing it was just speculative, im going to delete because the 8 CELL pins needs to be mapped again anyway... and for 2 different layouts) |
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| 76 || 15 || {{cellcolors|#33f|#e77}} P156 || BE_RESET<br>BE_RESET_AND<br>HARD_RESET || {{pino}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout)<br>Connected to [[CELL BE|CELL]] [[Service_Connectors#CN1001_.28CELL_BE_JTAG.29|Service Connector CN1001]] pad 6 and 8 || || 1.2V | | 76 || 15 || {{cellcolors|#33f|#e77}} P156 || BE_RESET<br>BE_RESET_AND<br>HARD_RESET || {{pino}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout)<br>Connected to [[CELL BE|CELL]] [[Service_Connectors#CN1001_.28CELL_BE_JTAG.29|Service Connector CN1001]] pad 6 and 8 || || 1.2V | ||
|- | |- | ||
| 77 || 15 || {{cellcolors|#33f|#fff}} P155 || BE_SPI_DO || {{pino}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout). | | 77 || 15 || {{cellcolors|#33f|#fff}} P155 || BE_SPI_DO || {{pino}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout). <abbr title="MOSI">Serial Output from Syscon Master to Cell Slave</abbr> || || | ||
|- | |- | ||
| 78 || 15 || {{cellcolors|#33f|#fff}} P154 || BE_SPI_DI || {{pini}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout). | | 78 || 15 || {{cellcolors|#33f|#fff}} P154 || BE_SPI_DI || {{pini}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout). <abbr title="MISO">Serial Input from Cell Slave to Syscon Master</abbr> || || | ||
|- | |- | ||
| 79 || 15 || {{cellcolors|#33f|#fff}} <span style="text-decoration: overline;">P153</span> || BE_SPI_CLK || {{pino}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr>. 2.5 Mhz SPI Clock || || 1.2V | | 79 || 15 || {{cellcolors|#33f|#fff}} <span style="text-decoration: overline;">P153</span> || BE_SPI_CLK || {{pino}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr>. 2.5 Mhz SPI Clock || || 1.2V | ||
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| 80 || 15 || {{cellcolors|#33f|#fff}} P152 || BE_SPI_CS || {{pino}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout). Chip Select || Vary || 1.2V | | 80 || 15 || {{cellcolors|#33f|#fff}} P152 || BE_SPI_CS || {{pino}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout). Chip Select || Vary || 1.2V | ||
|- | |- | ||
| 81 || 15 || {{cellcolors|#33f|#e77}} P151 || BE_INT<br>ATTENTION || {{pini}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout) through a | | 81 || 15 || {{cellcolors|#33f|#e77}} P151 || BE_INT<br>ATTENTION || {{pini}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout) through a <abbr title="CELL switches the transistor to connect this syscon pin to GND">NPN 50V@100mA transistor</abbr> || || | ||
|- | |- | ||
| 82 || 15 || {{cellcolors|#33f|#e77}} P150 || SYS_THR_ALRT<br>THERMAL_OVERLOAD || {{pini}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout) through a | | 82 || 15 || {{cellcolors|#33f|#e77}} P150 || SYS_THR_ALRT<br>THERMAL_OVERLOAD || {{pini}} || Connected to [[CELL BE|CELL]] pad <abbr title="Unknown>UNK</abbr> (CELL 1392 pads layout), or pad <abbr title="Unknown>UNK</abbr> (CELL 1368 pads layout) through a <abbr title="CELL switches the transistor to connect this syscon pin to GND">NPN 50V@100mA transistor</abbr><br>Connected to a testpad || Vary || | ||
|- | |- | ||
| 83 || 2 || P27/ANI7 || || ←I/O→ || Connected to [[switch boards|Switch board]] power switch ? (POW_SW?) || 3.3V || 3.3V | | 83 || 2 || P27/ANI7 || || ←I/O→ || Connected to [[switch boards|Switch board]] power switch ? (POW_SW?) || 3.3V || 3.3V | ||
Revision as of 17:52, 12 June 2022
Pinout
| Pin | Port | Name | Type | Description | Voltages | ||
|---|---|---|---|---|---|---|---|
| NEC/Renesas | Sony/Custom | Stby | Runn | ||||
| 1 | 14 | SCL20 | HDMI_I2C_SCL |  |
Connected to HDMI controller MN8647091 pin 27 | 0 | 3.3V |
| 2 | 14 | P141/PCLBUZ1/INTP7 | ←I/O→ | Connected to South Bridge CXD9963GB pad AA17 (SB_RESET ?, or SB_CGRST ?) | |||
| 3 | 14 | INTP6 | SB_INT | ←I/O→ | Connected to South Bridge CXD9963GB pad W22 | 3.3V | |
| 4 | 12 | P120/INTP0/EXLVI | ←I/O→ | External potential input for low-voltage detector ? | 1.5V | ||
| 5 | 4 | P47/INTP2 | ←I/O→ | Connected to HDMI controller MN8647091 pin 94 | |||
| 6 | 4 | TO05 | BUZZER | |
Connected to Buzzer- through a NPN 50V@100mA transistor | 3.3V | |
| 7 | 4 | P45/SO01 | ←I/O→ | Connected to bdrom IC pin 11 (Bluray Drive controller CXD5132R-1 ? or...) | 3.3V | ||
| 8 | 4 | P44/SI01 | ←I/O→ | Connected to Intersil ISL6331 pin 22. And a testpad | 3.3V | 3.3V | |
| 9 | 4 | P43/SCK01 | ←I/O→ | Connected to Intersil ISL6331 pin 23. And a testpad | 3.3V | 3.3V | |
| 10 | 4 | P42/TI04/TO04 | ←I/O→ | Connected to South Bridge CXD9963GB pad AA18 (SB_RESET ?, or SB_CGRST ?) | 3.3V | ||
| 11 | 4 | TOOL1 | TOOL_CLK | |
Connected to Service Connector 3rd Gen. pin 13 (Tool clock) through a missing resistor | 3.3V | |
| 12 | 4 | TOOL0 | TOOL_DAT |  |
Connected to Service Connector 3rd Gen. pin 7 (Tool Data) through a missing resistor | 3.3V | |
| 13 | RESET | RST |  |
Connected to Service Connector 3rd Gen. pin 9 through a missing resistor | 3.3V | ||
| 14 | 12 | XT2 | OSCOUT | |
Connected to Crystal 32.768kHz (Subsystem clock) | 1.2V | 1.2V |
| 15 | 12 | XT1 | OSCIN | |
Connected to Crystal 32.768kHz (Subsystem clock) | 0.8V | |
| 16 | FLMD0 | FLASH_MODE | |
Connected to Service Connector 3rd Gen. pin 8 (Flash programming mode) through a missing resistor | 3.3V | 3.3V | |
| 17 | 12 | X2 | XTAL | |
Connected to Crystal marked "ED" or "EU" (Main system clock) | ||
| 18 | 12 | X1 | EXTAL | |
Connected to Crystal marked "ED" or "EU" (Main system clock) | ||
| 19 | REGC | VDDbat |  |
Connected to CR2025 battery + through 2 inverted Schottky 30V@30mA diodes ? 1uF capacitor to ground ? |
2.5V | ||
| 20 | VSS | GND | |
||||
| 21 | EVSS0 | GND | |
||||
| 22 | VDD | 3.3_EVER_B | |
Connected to Mitsumi 463A pin 2 (standby voltage regulator, secondary output power rail) | 3.3V | 3.3V | |
| 23 | EVDD0 | 3.3_EVER_B | |
Connected to Mitsumi 463A pin 2 (standby voltage regulator, secondary output power rail) | 3.3V | 3.3V | |
| 24 | 6 | P60/SCL0 | ←I/O→ | Connected to Temperature Monitors pin 8 (SMBus clock) (THR_I2C_SCL ?) | |||
| 25 | 6 | P61/SDA0 | ←I/O→ | Connected to Temperature Monitors pin 7 (SMBus data) (THR_I2C_SDA ?) | |||
| 26 | 6 | P62 | ←I/O→ | Connected to ISL IC pin 3 | 2.5V | ||
| 27 | 6 | P63 | ←I/O→ | 10K resistor to GND ? | 3.3V | ||
| 28 | 3 | P31/TI03/TO03/INTP4 | ACIN_DET ? | ←I/O→ | pin 4 to wifi5v vreg ic/EN ? | ||
| 29 | 6 | P64 | ←I/O→ | Connected (indirectly) to a voltage regulator ? (to enable something ?) | 3.3V | ||
| 30 | 6 | P65 | ←I/O→ | Connected to IDT4227 pin 1 | 3.3V | ||
| 31 | 6 | P66 | ←I/O→ | Connected to Texas Instruments-SCEI Clock Generator CDC750 pin 33 (MK_I2C_SCL ?) | 3.3V | ||
| 32 | 6 | P67 | ←I/O→ | Connected to Texas Instruments-SCEI Clock Generator CDC750 pin 34 (MK_I2C_SDA ?) | 3.3V | ||
| 33 | 7 | P77/KR7/INTP11 | ←I/O→ | Connected to voltage regulator Rohm BD3527 pin 12 (enable USB ?) | 3.3V | ||
| 34 | 7 | P76/KR6/INTP10 | ←I/O→ | Connected to Intersil ISL6331 pin 24 | 3.3V | ||
| 35 | 7 | P75/KR5/INTP9 | ←I/O→ | Connected to South Bridge CXD9963GB pad U19 throught 4k7 resistor | 3.3V | ||
| 36 | 7 | P74/KR4/INTP8 | ←I/O→ | Connected to Intersil ISL6331 pin 20 | 3.3V | ||
| 37 | 7 | P73/KR3 | ←I/O→ | Connected to Service Connector 3rd Gen. pin 3 Connected to D35236SK pin 6 |
3.3V | ||
| 38 | 7 | P72/KR2 | ←I/O→ | Connected to D35326SK pin 7 | 3.3V | ||
| 39 | 7 | P71/KR1 | |
Connected to voltage regulator Rohm BD3525 pin 12 (enable something) | 3.3V | ||
| 40 | 7 | P70/KR0 | ←I/O→ | Connected to Texas Instruments PS53123 pin 10 | 3.3V | ||
| 41 | 0 | P06 | ←I/O→ | Connected to Texas Instruments PS53123 pin 7 | |||
| 42 | 0 | P05 | ←I/O→ | Connected to Texas Instruments PS53123 pin 17 | 3.3V | ||
| 43 | EVSS1 | GND | |
||||
| 44 | 8 | P80 | ←I/O→ | 100K pull up to 3v3 | |||
| 45 | 8 | P81 | |
0ohm resistor to GND | |||
| 46 | 8 | P82 | ←I/O→ | Connected to HDMI controller MN8647091 pin 95 | 3.3V | ||
| 47 | 8 | P83 | |
0ohm resistor to GND | |||
| 48 | 8 | P84 | ←I/O→ | Connected to pin1 EN vreg 8D11 (bottom side of power pcb) | 3.3V | ||
| 49 | 8 | P85 | ←I/O→ | Connected to Texas Instruments PS53123 pin 3 | 3.3V | ||
| 50 | 8 | P86 | ←I/O→ | Connected to IDT4227 pin 12 | 3.3V | ||
| 51 | 8 | P87 | ←I/O→ | Connected to power pcb connector | 3.3V | ||
| 52 | 3 | P30/INTP3/RTC1HZ | ←I/O→ | Connected to Intersil ISL6331 pin 21 | 3.3V | ||
| 53 | EVDD1 | 3.3_EVER_B | |
Connected to Mitsumi 463A pin 2 (standby voltage regulator, secondary output power rail) | 3.3V | 3.3V | |
| 54 | 5 | P50 | ←I/O→ | Connected to Intersil ISL6331 pin 25 | 3.3V | ||
| 55 | 5 | P51 | ←I/O→ | Connected to South Bridge CXD9963GB pad W21. And in line 10k to gnd | |||
| 56 | 5 | P52 | WIFI_CTRL | ←I/O→ | 10k resistor to GND, and to wifi/BT module. See: wifi/BT 10x7 pinout or wifi/BT 9x7 pinout | Vary | 3.3V |
| 57 | 5 | P53 | UART0_RxD | |
Connected to Service Connector 3rd Gen. pin 11 (UART-TTL terminal Receive) through a missing resistor ? Connected to PCI Connector pin 6 ? |
||
| 58 | 5 | P54 | UART0_TxD | |
Connected to Service Connector 3rd Gen. pin 10 (UART-TTL terminal Transmit) through a missing resistor ? Connected to PCI Connector pin 4 ? |
Vary | 3.3V |
| 59 | 5 | P55 | ←I/O→ | Connected to South Bridge CXD9963GB pad S19 | 3.3V | ||
| 60 | 5 | P56 | ←I/O→ | Connected to South Bridge CXD9963GB pad V22. And in line 47ohms | 3.3V | ||
| 61 | 5 | P57 | ←I/O→ | Connected to South Bridge CXD9963GB pad U18 | 3.3V | ||
| 62 | 1 | P17 | RSX_VINTE0/VD_VINT0 | |
Connected to RSX pad AR22 (RSX layout 41x41), or pad UNK (RSX layout 34x34) through a 10k resistor | 1.5V | |
| 63 | 1 | P16 | RSX_CGRST |  |
This pin is "nerfed" with a 10k resistor to GND in RSX41x41 pad AV6 so syscon is not able to RESET the RSX CG |
0.8V | |
| 64 | 1 | P15 | RSX_VINTE1/VD_VINT1 | |
Connected to RSX pad AL38 (RSX layout 41x41), or pad UNK (RSX layout 34x34) | 1.5V | |
| 65 | 1 | P14 | RSX_RESET | |
Connected to RSX pad AW5 (RSX layout 41x41), or pad UNK (RSX layout 34x34) | 1.5V | |
| 66 | 1 | P13 | RSX_SPI_CS | |
Connected to RSX pad AW8 (RSX layout 41x41), or pad UNK (RSX layout 34x34) | 1.5V | |
| 67 | 1 | SO00 | RSX_SPI_DO | |
Connected to RSX pad AY8 (RSX layout 41x41), or pad UNK (RSX layout 34x34) | 1.5V | |
| 68 | 1 | SI00 | RSX_SPI_DI | |
Connected to RSX pad BA7 (RSX layout 41x41), or pad UNK (RSX layout 34x34) | ||
| 69 | 1 | SCK00 | RSX_SPI_CLK | |
Connected to RSX pad BA6 (RSX layout 41x41), or pad UNK (RSX layout 34x34) | ||
| 70 | AVREF1 | |
1.5V | ||||
| 71 | 11 | P110/ANO0 | ←I/O→ | Connected to a testpad near SC | |||
| 72 | 11 | P111/ANO1 | RSX_INT | |
Connected to RSX pad AY7 (RSX layout 41x41), or pad UNK (RSX layout 34x34) | 1.5V | |
| 73 | AVREF0 | |
1.2V | ||||
| 74 | AVSS | GND | |
||||
| 75 | 15 | P157 | BE_POWGOOD POWER_GOOD |
|
Connected to CELL pad UNK (CELL 1392 pads layout), or pad UNK (CELL 1368 pads layout) Connected to CELL Service Connector CN1001 pad 9 |
1.2V | |
| 76 | 15 | P156 | BE_RESET BE_RESET_AND HARD_RESET |
|
Connected to CELL pad UNK (CELL 1392 pads layout), or pad UNK (CELL 1368 pads layout) Connected to CELL Service Connector CN1001 pad 6 and 8 |
1.2V | |
| 77 | 15 | P155 | BE_SPI_DO | |
Connected to CELL pad UNK (CELL 1392 pads layout), or pad UNK (CELL 1368 pads layout). Serial Output from Syscon Master to Cell Slave | ||
| 78 | 15 | P154 | BE_SPI_DI | |
Connected to CELL pad UNK (CELL 1392 pads layout), or pad UNK (CELL 1368 pads layout). Serial Input from Cell Slave to Syscon Master | ||
| 79 | 15 | P153 | BE_SPI_CLK | |
Connected to CELL pad UNK. 2.5 Mhz SPI Clock | 1.2V | |
| 80 | 15 | P152 | BE_SPI_CS | |
Connected to CELL pad UNK (CELL 1392 pads layout), or pad UNK (CELL 1368 pads layout). Chip Select | Vary | 1.2V |
| 81 | 15 | P151 | BE_INT ATTENTION |
|
Connected to CELL pad UNK (CELL 1392 pads layout), or pad UNK (CELL 1368 pads layout) through a NPN 50V@100mA transistor | ||
| 82 | 15 | P150 | SYS_THR_ALRT THERMAL_OVERLOAD |
|
Connected to CELL pad UNK (CELL 1392 pads layout), or pad UNK (CELL 1368 pads layout) through a NPN 50V@100mA transistor Connected to a testpad |
Vary | |
| 83 | 2 | P27/ANI7 | ←I/O→ | Connected to Switch board power switch ? (POW_SW?) | 3.3V | 3.3V | |
| 84 | 2 | P26/ANI6 | ←I/O→ | Connected to Switch board eject switch ? (EJECT_SW?). And to a testpad | |||
| 85 | 2 | P25/ANI5 | ←I/O→ | 10K resistor to GND, to testpad, and to 100ohms resistor to Wifi/BT module. (BT_WAKEON ? or BT_RESET ?) See: wifi/BT 10x7 pinout or wifi/BT 9x7 pinout | |||
| 86 | 2 | P24/ANI4 | ←I/O→ | 10K resistor to GND, to testpad, and to 100ohms resistor to Wifi/BT module. (BT_WAKEON ? or BT_RESET ?) See: wifi/BT 10x7 pinout or wifi/BT 9x7 pinout | |||
| 87 | 2 | P23/ANI3 | ←I/O→ | 3.3V | |||
| 88 | 2 | P22/ANI2 | ←I/O→ | Connected to Bluray Drive through 100ohm resistor array ???. See: pins 115,116,117 (port 2) | |||
| 89 | 2 | P21/ANI1 | ←I/O→ | Connected to Bluray Drive through 100ohm resistor array ???. See: pins 115,116,117 (port 2) | 3.3V | ||
| 90 | 2 | P20/ANI0 | ←I/O→ | Connected to Bluray Drive through 100ohm resistor array ???. See: pins 115,116,117 (port 2) | 3.3V | 3.3V | |
| 91 | 13 | P130 | ACDC_STBY ? | |
Enable PSU 12v power rail ? | 3.3V | |
| 92 | 13 | P131/TI06/TO06 | ←I/O→ | Connected to voltage regulator Mitsumi 348A pins 2 and 7 ? Connected to HDMI connector pin 18 (+5V output) through a transistor ? |
3.3V | ||
| 93 | 0 | SCL10 | DVE_I2C_SCL | |
Connected to Digital Video Encoder CXM4027R pin 35 | 3.3V | |
| 94 | 0 | SDA10 | DVE_I2C_SDA | |
Connected to Digital Video Encoder CXM4027R pin 36 | 3.3V | |
| 95 | 0 | P02/SO10/TxD1 | ←I/O→ | 3.3V | |||
| 96 | 0 | P01/TO00 | ←I/O→ | Connected to HDMI controller MN8647091 pin 93 ??? | 1.5V | ||
| 97 | 0 | P00/TI00 | ←I/O→ | ||||
| 98 | 14 | TO07 | FANPWM0 | |
Connected to the FAN grey wire (PWM duty) | 0.8V | |
| 99 | 14 | P144/SO20/TxD2 | ←I/O→ | 3.3V | |||
| 100 | 14 | SDA20 | HDMI_I2C_SDA | |
Connected to HDMI controller MN8647091 pin 29 | 0 | |
