SAA-001: Difference between revisions
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== SKU differentiation == | == SKU differentiation == | ||
* [[CUH-10xx series]] contain [[SAA-001]] board. | * [[CUH-10xx series]] contain [[SAA-001]] board. | ||
* Productcode: 1-889-352-11 or 1-889-352-21 | |||
=== Gallery === | |||
<gallery> | <gallery> | ||
File:SAA001-backside.jpg|[[SAA-001]] - backside | File:SAA001-backside.jpg|[[SAA-001]] - backside | ||
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! Component !! Package | ! Component !! Package | ||
|- | |- | ||
| APU | | APU || [[CXD90026G]] | ||
|- | |||
| APU RAM || [[K4G41325FC-HC03]] | |||
|- | |||
| Southbridge || [[CXD90025G]] | |||
|- | |- | ||
| | | Southbridge RAM || [[K4B2G1646E-BCK0]] | ||
|- | |- | ||
| Flash || [[MX25L25635FMI-10G]] | | Serial Flash || [[MX25L25635FMI-10G]] | ||
|- | |- | ||
| Syscon || [[A01-C0L]] | | Syscon || [[A01-C0L]] | ||
Line 56: | Line 61: | ||
| LAN || [[88EC060-NN82]] | | LAN || [[88EC060-NN82]] | ||
|- | |- | ||
| | | Wireless communication module || [[88W8797]] | ||
|- | |- | ||
| BD-ROM || [[R8J32841FP1]] | | BD-ROM || [[R8J32841FP1]] | ||
|- | |- | ||
| USB 3.0 Hub || [[GL3520]] | | USB 3.0 Hub || [[GL3520]] | ||
|} | |} | ||
=== Notes on | === Notes on components === | ||
<SoC> Some extra info: | <SoC> Some extra info: | ||
* APU to MC link is indeed PCI-e Gen2 (5Gbit/s, 4 lanes) | * APU to MC link is indeed PCI-e Gen2 (5Gbit/s, 4 lanes) | ||
Line 70: | Line 75: | ||
* DDR3 bootup speed is 400MHz (DDR3-800, that's very low because DDR chip is rated for DDR3-1600). Not sure if DDR3 would go higher on fully booted unit). | * DDR3 bootup speed is 400MHz (DDR3-800, that's very low because DDR chip is rated for DDR3-1600). Not sure if DDR3 would go higher on fully booted unit). | ||
* unit denies to boot if I cut some of PCI-e lanes. Normally, x4 PCI-e interface would work on x1 lane w/o problems (with lower bandwidth), but PS4 flashes blue forever if I cut PCI-e down to 1 lane. | * unit denies to boot if I cut some of PCI-e lanes. Normally, x4 PCI-e interface would work on x1 lane w/o problems (with lower bandwidth), but PS4 flashes blue forever if I cut PCI-e down to 1 lane. | ||
{{Components}} | {{Components}} | ||
<noinclude>[[Category:Main]]</noinclude> | <noinclude>[[Category:Main]]</noinclude> |
Revision as of 16:28, 3 March 2021
This article is marked for rewrite/restructuring in proper wiki format. You can help PS4 Developer wiki by editing it. |
SKU differentiation
- CUH-10xx series contain SAA-001 board.
- Productcode: 1-889-352-11 or 1-889-352-21
Gallery
SAA-001 - backside
SAA-001 - componentside
SAA-001 - componentside
SAA-001 - backside
PS4 Motherboard SAA-001 - main component side
PS4 Motherboard SAA-001 - back side
SAA-001 componentside - wm
SAA-001 backside - wm
SAA-001 componentside - image2984
SAA-001 componentside - image2984
SAA-001 componentside - image2984
SAA-001 componentside - image2984
SAA-001 componentside - image2984
SAA-001 componentside - image2984
SAA-001 componentside - image2990
SAA-001 componentside - image2991
- SAA-001 - Backside - IMG 2992.JPG
SAA-001 backside - image2992
SAA-001 backside - image2993
SAA-001 backside - image2994
SAA-001 backside - image2995
SAA-001 backside - image2996
SAA-001 backside - image2997
SAA-001 backside - image2998
Components
Component | Package |
---|---|
APU | CXD90026G |
APU RAM | K4G41325FC-HC03 |
Southbridge | CXD90025G |
Southbridge RAM | K4B2G1646E-BCK0 |
Serial Flash | MX25L25635FMI-10G |
Syscon | A01-C0L |
SATA | MB86C311B |
HDMI | MN86471A |
LAN | 88EC060-NN82 |
Wireless communication module | 88W8797 |
BD-ROM | R8J32841FP1 |
USB 3.0 Hub | GL3520 |
Notes on components
<SoC> Some extra info:
- APU to MC link is indeed PCI-e Gen2 (5Gbit/s, 4 lanes)
- APU to BD-ROM is SATA I (1.5 Gbit/s)
- DDR3 bootup speed is 400MHz (DDR3-800, that's very low because DDR chip is rated for DDR3-1600). Not sure if DDR3 would go higher on fully booted unit).
- unit denies to boot if I cut some of PCI-e lanes. Normally, x4 PCI-e interface would work on x1 lane w/o problems (with lower bandwidth), but PS4 flashes blue forever if I cut PCI-e down to 1 lane.
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