Documented SPU Channels: Difference between revisions
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| Line 5: | Line 5: | ||
!Number (hex) | !Number (hex) | ||
!Notes | !Notes | ||
|- | |||
|SPU Write Outbound Interrupt Mailbox | |||
|0x1E | |||
| | |||
|- | |||
|SPU Read Inbound Mailbox | |||
|0x1D | |||
| | |||
|- | |||
|SPU Write Outbound Mailbox | |||
|0x1C | |||
| | |||
|- | |- | ||
|MFC Read Atomic Command Status | |MFC Read Atomic Command Status | ||
Revision as of 01:18, 28 July 2014
List of channels
| Channel Name | Number (hex) | Notes |
|---|---|---|
| SPU Write Outbound Interrupt Mailbox | 0x1E | |
| SPU Read Inbound Mailbox | 0x1D | |
| SPU Write Outbound Mailbox | 0x1C | |
| MFC Read Atomic Command Status | 0x1B | |
| MFC Write List Stall-and-Notify Tag Acknowledgment | 0x1A | |
| MFC Read List Stall-and-Notify Tag Status | 0x19 | |
| MFC Read Tag Group Status | 0x18 | |
| MFC Write Tag Status Update Request | 0x17 | |
| MFC Write Tag Group Query Mask | 0x16 | |
| MFC Command Opcode | 0x15 | lower 16 bits |
| MFC Class ID | 0x15 | upper 16 bits |
| MFC Tag ID | 0x14 | |
| MFC Transfer Size or List Size | 0x13 | |
| MFC Effective Address Low or List Address | 0x12 | |
| MFC Effective Address High | 0x11 | |
| MFC LS Address | 0x10 | |
| MFC Read Tag Group Query Mask Channel | 0xC |