Documented SPU Channels: Difference between revisions
Jump to navigation
Jump to search
| Line 84: | Line 84: | ||
|MFC Read Tag Group Query Mask Channel | |MFC Read Tag Group Query Mask Channel | ||
|0xC | |0xC | ||
| | |||
|- | |||
|SPU Read Event Mask | |||
|0xB | |||
| | | | ||
|- | |- | ||
| Line 104: | Line 108: | ||
|SPU Signal Notification 1 | |SPU Signal Notification 1 | ||
|0x3 | |0x3 | ||
| | |||
|- | |||
|SPU Write Event Mask | |||
|0x1 | |||
| | |||
|- | |||
|SPU Read Event Status | |||
|0x0 | |||
| | | | ||
|- | |- | ||
|} | |} | ||
Revision as of 01:30, 28 July 2014
List of channels
| Channel Name | Number (hex) | Notes |
|---|---|---|
| SPU Write Outbound Interrupt Mailbox | 0x1E | |
| SPU Read Inbound Mailbox | 0x1D | |
| SPU Write Outbound Mailbox | 0x1C | |
| MFC Read Atomic Command Status | 0x1B | |
| MFC Write List Stall-and-Notify Tag Acknowledgment | 0x1A | |
| MFC Read List Stall-and-Notify Tag Status | 0x19 | |
| MFC Read Tag Group Status | 0x18 | |
| MFC Write Tag Status Update Request | 0x17 | |
| MFC Write Tag Group Query Mask | 0x16 | |
| MFC Command Opcode | 0x15 | lower 16 bits |
| MFC Class ID | 0x15 | upper 16 bits |
| MFC Tag ID | 0x14 | |
| MFC Transfer Size or List Size | 0x13 | |
| MFC Effective Address Low or List Address | 0x12 | |
| MFC Effective Address High | 0x11 | |
| MFC LS Address | 0x10 | |
| SPU Read State Save-and-Restore | 0xF | |
| SPU Write State Save-and-Restore | 0xE | |
| SPU Read Machine Status | 0xD | |
| MFC Read Tag Group Query Mask Channel | 0xC | |
| SPU Read Event Mask | 0xB | |
| MFC Write Multisource Synchronization Request | 0x9 | |
| SPU Read Decrementer | 0x8 | |
| SPU Write Decrementer | 0x7 | |
| SPU Signal Notification 2 | 0x4 | |
| SPU Signal Notification 1 | 0x3 | |
| SPU Write Event Mask | 0x1 | |
| SPU Read Event Status | 0x0 |