Talk:PS3UserCheat: Difference between revisions
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m (some CPU pins) |
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https://github.com/joyup/open-p3go | https://github.com/joyup/open-p3go | ||
*CPU interesting pins | |||
BOOT MODE (used in P3go for the "dual payload" feature) | |||
--------- | |||
BOOT_SEL1 (pin 93) = 1 -----> NAND flash | |||
BOOT_SEL1 (pin 93) = 0 -----> SD card | |||
UART | |||
---- | |||
SDATO (pin 89) out | |||
SDATI (pin 88) in | |||
Revision as of 18:27, 11 June 2012
Looks very simular to PS3Go. PS3super.net seem to be a clone
This page seem to prove above theory about PS3Go based: http://blog.livedoor.jp/n3ds/archives/1449198.html
P3Go GT-break
MCU : Ingenic JZ47X5 (32bit 500M) - 176 pin TQFP
RAM : Hynix HY57V641620?.T.P-6 (CMOS 3.3V, 64M [4K refresh] x16, , 4banks, LVTTL, ?, normal power, TSOP, PC100 CL2)
NAND: Samsung K9F1G08U0C-PCB0 (1Gbit 59nm 3.3Volt SLC NAND)
TF/microSDHC slot
There are 2 SKU's of the P3Go GT-break, only difference is a switch at the backend to switch between internal SLC-NAND and TF/microSDHC. Other (most common) version uses the TF/microSDHC presence detect switch.
https://github.com/joyup/open-p3go
- CPU interesting pins
BOOT MODE (used in P3go for the "dual payload" feature) --------- BOOT_SEL1 (pin 93) = 1 -----> NAND flash BOOT_SEL1 (pin 93) = 0 -----> SD card UART ---- SDATO (pin 89) out SDATI (pin 88) in