Talk:CXD9208GP: Difference between revisions

From PS3 Developer wiki
Jump to navigation Jump to search
(Surprise :P)
mNo edit summary
Line 34: Line 34:
<br><br>
<br><br>
Why ps1_emu don't used it then? Answer is simple, is not efficient. First thing, this version seems to be stripped from PS1 only hardware, which probably allowed to reduce cost. But even if we had there full PPC405 from ps2, this is still bad idea to use it for PS1 emulation. Deckard assume that instead of PS1 GPU, there is PS2 EE that emulate it. So PS1 emulation need to involve PS2 EE, and that in turn need PS2 GS, which need to talk to PS3 RSX to display something. It was just simpler to write PS1 emulator from scratch, and don't involve PS1 mode from PS2 into that.  --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 10:14, 4 October 2022 (UTC)
Why ps1_emu don't used it then? Answer is simple, is not efficient. First thing, this version seems to be stripped from PS1 only hardware, which probably allowed to reduce cost. But even if we had there full PPC405 from ps2, this is still bad idea to use it for PS1 emulation. Deckard assume that instead of PS1 GPU, there is PS2 EE that emulate it. So PS1 emulation need to involve PS2 EE, and that in turn need PS2 GS, which need to talk to PS3 RSX to display something. It was just simpler to write PS1 emulator from scratch, and don't involve PS1 mode from PS2 into that.  --[[User:Kozarovv|Kozarovv]] ([[User talk:Kozarovv|talk]]) 10:14, 4 October 2022 (UTC)
<br><br>
The CXD9208GP is used as an adapter between the PS3 south bridge and the EE, it has a PCI interface for the PS3 side and a SIF (SBUS) interface for the PS2 side [https://twitter.com/minaralwasser/status/1067561915457638406]. I've documented the PCI id here: [https://pci-ids.ucw.cz/read/PC/104d/820e].
The chip/package looks very similar to the CXD9731GP SPEED [https://ps2drives.x-pec.com/images/guide_westerndigital/easymod/DSC00159.jpg] chip. That makes sense since (early) SPEED partly functions as a PCI <-> SSBUS adapter.
[[User:M4j0r|M4j0r]] ([[User talk:M4j0r|talk]]) 19:40, 4 October 2022 (UTC)

Revision as of 20:40, 4 October 2022

Seems to be similar than the PS2 IOP chip (I/O Processor)

Some PS2 slim models (dated around 2006) such SCPH-75001, SCPH-77001 uses an IOP chip with partnumber: CXD9209GP photo. The PS3 chip is older because PS3 was designed before 2006 

Log file generated by Playstation 2 Ident v0.804, built on Aug 25 2013 19:57:49
...
IOP
Revision: 0x0030 (CXD9796GP/CXD9209GP)
RAM size: 2 MB
SSBUSC revision: 0x31 (CXD9611)
...
Mainboard:
Model name: SCPH-75001
Mainboard model: GH-041
...

new findings

If you are looking for most misunderstood chip on COK-001, here it is. Someone made here really wrong assumption, thinking that this chip is connected to CXM4024R. So, what we got here? IOP. Yup, ps2 Input/Output processor, just like mentioned above. Very special, and very stripped most likely PPC405 based IOP. Most important hint about supposed connection to multiAV being wrong, is fact that there is no single trace on motherboard that really goes there. Neither on top or bottom of mainboard, sure i didn't delayered COK-001 motherboard, but just look also at CXM4024R. There is no connection there, and pinout is rather visible. Next thing is visual comparison of COK-001 with PS2 GH-051 which use EE+GS with the same pinout as PS3 version.
PS2: https://imgur.com/yC5XQuG
PS3: https://www.psdevwiki.com/ps3/images/9/9d/COK-001_TOP.JPG
Similar, isn't it? All traces that on PS2 goes to IOP, on PS3 go to that chip. More than that IOP used in PS2 have part number CXD9209GP, our chip is CXD9208GP.
What is stripped? Likely COP2(GTE) instruction set, MDEC, partial GPU emulator, generally anything that is required only in PS1 mode. Why? Why in the hell use that weird monstrosity? Is rather unknown (and undocumented) fact that PS2 PPC405 incorporate AUX coprocessor responsible for decoding MIPS r3000 instruction set. Yes, you read it right. PowerPC chip which run MIPS instruction set as a coprocessor. Just Sony things. ;) I think that is main purpose here, to decode r3000 instructions on different chip. Is rather hard to sync real EE with emulated IOP, so probably different way was chosen. What else seems to be there? SPU, since SPU2 emulator on PS3 SPE in ps2_emu is smaller and different than in other emus. Probably some sif related logic, etc. There is still small r3000 instruction interpreter in ps2_emu, also some IOP dma related stuff like in CDVD thread, but it seems to be not enough to work as fully fledged IOP emu. This probably work in conjunction with our newly discovered chip. This is still just theory that I personally can't confirm on real hardware. But even looking at mainboard and chip number suggest what we have there.

Why ps1_emu don't used it then? Answer is simple, is not efficient. First thing, this version seems to be stripped from PS1 only hardware, which probably allowed to reduce cost. But even if we had there full PPC405 from ps2, this is still bad idea to use it for PS1 emulation. Deckard assume that instead of PS1 GPU, there is PS2 EE that emulate it. So PS1 emulation need to involve PS2 EE, and that in turn need PS2 GS, which need to talk to PS3 RSX to display something. It was just simpler to write PS1 emulator from scratch, and don't involve PS1 mode from PS2 into that. --Kozarovv (talk) 10:14, 4 October 2022 (UTC)

The CXD9208GP is used as an adapter between the PS3 south bridge and the EE, it has a PCI interface for the PS3 side and a SIF (SBUS) interface for the PS2 side [1]. I've documented the PCI id here: [2]. The chip/package looks very similar to the CXD9731GP SPEED [3] chip. That makes sense since (early) SPEED partly functions as a PCI <-> SSBUS adapter. M4j0r (talk) 19:40, 4 October 2022 (UTC)

Retrieved from "http://www.psdevwiki.com/ps3/index.php?title=Talk:CXD9208GP&oldid=68284"