Editing Template:Syscon pinout LQFP 128 pins

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<span style="font-size:175%; font-family:Times New Roman;">Pinout</span>
<span style="font-size:175%; font-family:Times New Roman;">Pinout</span>
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</includeonly><div style="float:right">[[File:Syscon pinout LQFP 128 pins.png|300px|thumbnail|right|Syscon pinout LQFP 128 pins<br>NEC/Renesas 78K0R/KH3 Optional pin configurations]]<br>[[File:Syscon SW2-303 Unsoldered.JPG|300px|thumbnail|right|Syscon [[SW2-303]] unsoldered<br>[[CECH-25xx]] with [[JTP-001]] or [[JSD-001]] motherboard]]<br>[[File:Syscon_SW2-303.jpg|300px|thumbnail|right|Syscon [[SW2-303]]<br>[[CECH-25xx]] with [[JTP-001]] or [[JSD-001]] motherboard]]<br>[[File:SYSCON GEN2.JPG|300px|thumbnail|right|Syscon [[SW-301]]<br>[[CECHLxx]] with [[VER-001]] motherboard]]</div>
<div style="float:right">[[File:Syscon pinout LQFP 128 pins.png|300px|thumbnail|right|Syscon pinout LQFP 128 pins<br>NEC/Renesas 78K0R/KH3 Optional pin configurations]]<br>[[File:Syscon SW2-303 Unsoldered.JPG|300px|thumbnail|right|Syscon [[SW2-303]] unsoldered<br>[[CECH-25xx]] with [[JTP-001]] or [[JSD-001]] motherboard]]<br>[[File:Syscon_SW2-303.jpg|300px|thumbnail|right|Syscon [[SW2-303]]<br>[[CECH-25xx]] with [[JTP-001]] or [[JSD-001]] motherboard]]<br>[[File:SYSCON GEN2.JPG|300px|thumbnail|right|Syscon [[SW-301]]<br>[[CECHLxx]] with [[VER-001]] motherboard]]</div>


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{|class="wikitable sortable" style="width:100%; line-height:1em; font-size:0.9em"
{|class="wikitable sortable" style="width:100%; line-height:120%; font-size:90%"
|+{{captionlinks|Syscon pinout LQFP 128 pins}}
|+ {{captionlinks|Syscon pinout LQFP 128 pins}}
! Pin !! style="padding:1px" | Port !! colspan="2" | Name !! style="padding:1px" | Type !! Description !! Voltages
|-
|-
! style="border-top:hidden; background-position:50%" | !! style="border-top:hidden; background-position:50%" | !! style="padding-right:0px" | <abbr title="NEC/Renesas optional pin configuration">NEC/Renesas</abbr> !! style="padding-right:0px" | Sony/Custom !! style="border-top:hidden; background-position:50%" | !! style="border-top:hidden; background-position:50%" | !! class="unsortable" style="border-top:hidden" |  
! rowspan="2" style="width:35px; min-width:35px; padding:0px; background-position:50% 88%" | Pin !! rowspan="2" style="width:35px; min-width:35px; padding:0px; background-position:50% 88%" | Port !! colspan="2" class="unsortable" | Name !! rowspan="2" class="unsortable" style="padding:0px" | Type !! rowspan="2" class="unsortable" | Description !! rowspan="2" style="width:140px;" class="unsortable" | STBY Voltages
|-
! class="unsortable" | <abbr title="NEC/Renesas optional pin configuration">NEC/Renesas</abbr> !! class="unsortable" | Sony/Custom
|-
|-
| 1 || 14 || {{cellcolors|#77f|#ff0}} SCL20  || HDMI_I2C_SCL  || {{pino}} || Connected to [[HDMI]] controller [[MN8647091]] pin 27 || 0
| 1 || 14 || {{cellcolors|#77f|#ff0}} SCL20  || HDMI_I2C_SCL  || {{pino}} || Connected to [[HDMI]] controller [[MN8647091]] pin 27 || 0
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| 2 || 14 || {{cellcolors|#33f|#e77}} INTP7 || SB_INT/SYSCSINT || {{pini}} || Connected to [[South Bridge]] [[CXD9963GB]] pad W22 through a resistor || ~1V @ standby (0 V?)
| 2 || 14 || {{cellcolors|#33f|#e77}} INTP7 || SB_INT/SYSCSINT || {{pini}} || Connected to [[South Bridge]] [[CXD9963GB]] pad W22 through a resistor || ~1V @ standby (0 V?)
|-
|-
| 3 || 14 || {{cellcolors|#33f|#e77}} INTP6 || BE_INT/ATTENTION || {{pini}} || Connected to [[CELL BE|CELL]] pad BA17 (1342 pads layout), or pad <abbr title="Unknown">UNK</abbr> (1308 pads layout) through a <abbr title="CELL switches the transistor to connect this syscon pin to GND">NPN transistor</abbr> || 3V @ standby (3.15V)
| 3 || 14 || {{cellcolors|#33f|#e77}} INTP6 || BE_INT/ATTENTION || {{pini}} || Connected to [[CELL BE|CELL]] pad BA17 through a NPN transistor (CELL switches the transistor to connect this pin to GND) || 3V @ standby (3.15V)
|-
|-
| 4 || 12 || {{cellcolors|#f93}} EXLVI ||  || {{pin}} || Connected to +12V_MAIN through a resistor and divider (EXLVI config = External potential input for low-voltage detector ?) || 0
| 4 || 12 || {{cellcolors|#f93}} EXLVI ||  || {{pin}} || Connected to +12V_MAIN through a resistor and divider (EXLVI config = External potential input for low-voltage detector ?) || 0
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| 8 || 3 || P34 ||  || ? || Connected to [[South Bridge]] [[CXD9963GB]] pad AA17 (SB_RESET ?, or SB_CGRST ?), see [[Template_talk:Syscon_pinout_LQFP_128_pins|talk page]] || 0
| 8 || 3 || P34 ||  || ? || Connected to [[South Bridge]] [[CXD9963GB]] pad AA17 (SB_RESET ?, or SB_CGRST ?), see [[Template_talk:Syscon_pinout_LQFP_128_pins|talk page]] || 0
|-
|-
| 9 || 3 || {{cellcolors|#33f|#e77}} P33 ||  || {{pino}} || Connected to [[CELL BE|CELL]] pad AW18 ? (1342 pads layout), or pad <abbr title="Unknown">UNK</abbr> ? (1308 pads layout) (BE_RESET ?) || 0
| 9 || 3 || P33 ||  || ? || CELL BE related? (BE_RESET) || 0
|-
|-
| 10 || 3 || P32 ||  || ? ||  || 0
| 10 || 3 || P32 ||  || ? ||  || 0
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| 16 || 4 || {{cellcolors|#246|#fff}} TO05 || BUZZER || {{pino}} || Connected to the Buzzer through a transistor || 0
| 16 || 4 || {{cellcolors|#246|#fff}} TO05 || BUZZER || {{pino}} || Connected to the Buzzer through a transistor || 0
|-
|-
| 17 || 4 || {{cellcolors|#33f|#fff}} SO01 ||  || {{pino}} || Connected to [[South Bridge]] [[CXD9963GB]] pad <abbr title="Unknown">UNK</abbr> ? (SB_SPI_DO ?) / [[CELL BE|CELL]] pad AV13 (1308 pads layout, BE_SPI_DO) || 0
| 17 || 4 || {{cellcolors|#33f|#fff}} SO01 ||  || {{pino}} || Connected to [[South Bridge]] [[CXD9963GB]] ? (SB_SPI_DO) || 0
|-
|-
| 18 || 4 || {{cellcolors|#33f|#fff}} SI01 ||  || {{pini}} || Connected to [[South Bridge]] [[CXD9963GB]] pad <abbr title="Unknown">UNK</abbr> ? (SB_SPI_DI ?) / [[CELL BE|CELL]] pad BA13 (1308 pads layout, BE_SPI_DI) || 3v @ standby
| 18 || 4 || {{cellcolors|#33f|#fff}} SI01 ||  || {{pini}} || Connected to [[South Bridge]] [[CXD9963GB]] ? (SB_SPI_DI) || 3v @ standby
|-
|-
| 19 || 4 || {{cellcolors|#33f|#fff}} <span style="text-decoration: overline;">SCK01</span> ||  || {{pino}} || Connected to [[South Bridge]] [[CXD9963GB]] pad <abbr title="Unknown">UNK</abbr> ? (SB_SPI_CLK ?) / [[CELL BE|CELL]] pad AY13 (1308 pads layout, BE_SPI_CLK) || 0
| 19 || 4 || {{cellcolors|#33f|#fff}} <span style="text-decoration: overline;">SCK01</span> ||  || {{pino}} || Connected to [[South Bridge]] [[CXD9963GB]] ? (SB_SPI_CLK) || 0
|-
|-
| 20 || 4 || {{cellcolors|#33f|#fff}} P42 ||  || {{pino}} || Connected to [[South Bridge]] [[CXD9963GB]] pad <abbr title="Unknown">UNK</abbr> ? (SB_SPI_CS ?) / [[CELL BE|CELL]] pad AW13 (1308 pads layout, BE_SPI_CS)|| 0
| 20 || 4 || {{cellcolors|#33f|#fff}} P42 ||  || {{pino}} || Connected to [[South Bridge]] [[CXD9963GB]] ? (SB_SPI_CS) || 0
|-
|-
| 21 || 4 || {{cellcolors|#a74}} TOOL1 || TOOL_CLK || {{pino}} || Connected to [[Service_Connectors#CN.3F.3F.3F.3F|Service Connector 3rd Gen.]] pin 13 (Tool clock) through a missing resistor || 3.0
| 21 || 4 || {{cellcolors|#a74}} TOOL1 || TOOL_CLK || {{pino}} || Connected to [[Service_Connectors#CN.3F.3F.3F.3F|Service Connector 3rd Gen.]] pin 13 (Tool clock) through a missing resistor || 3.0
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| 31 || 12 || {{cellcolors|#555|#fff}} X1 || EXTAL || {{pini}} || Connected to a crystal (Main system clock) marked "EX" (16.9344Mhz?) || 2.2v @ standby (2.4)
| 31 || 12 || {{cellcolors|#555|#fff}} X1 || EXTAL || {{pini}} || Connected to a crystal (Main system clock) marked "EX" (16.9344Mhz?) || 2.2v @ standby (2.4)
|-
|-
| 32 || data-sort-value="18"| || {{cellcolors|#f93}} REGC || VDDbat || {{pin}} || Connected to battery+ through 2 diodes<br>Connected to a capacitor (<abbr title="The user manual suggest 0.47 up to 1uF. Meassured onboard results in 1.28uF">internal voltage regulator, around 1uF</abbr>) at the other side of the board. See: [[Media:Syscon_SW2-303_Unsoldered.JPG|VIA]] ||  
| 32 || data-sort-value="18"| || {{cellcolors|#f93}} REGC || VREG_CAP || {{pin}} || Connected to battery+ through 2 diodes<br>Connected to a capacitor (<abbr title="The user manual suggest 0.47 up to 1uF. Meassured onboard results in 1.28uF">internal voltage regulator, around 1uF</abbr>) at the other side of the board. See: [[Media:Syscon_SW2-303_Unsoldered.JPG|VIA]] ||  
|-
|-
| 33 || data-sort-value="20"| || {{cellcolors|#333|#fff}} V<span style="font-size:60%;">SS0</span> || GND || {{pin}} ||  || 0
| 33 || data-sort-value="20"| || {{cellcolors|#333|#fff}} V<span style="font-size:60%;">SS0</span> || GND || {{pin}} ||  || 0
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| 38 || 6 || {{cellcolors|#77f|#ff0}} SDA0 || MK_I2C_SDA || {{pinio}} || Connected to Texas Instruments-SCEI Clock Generator [[CDC972]] pin 38 || 0.2v @ standby
| 38 || 6 || {{cellcolors|#77f|#ff0}} SDA0 || MK_I2C_SDA || {{pinio}} || Connected to Texas Instruments-SCEI Clock Generator [[CDC972]] pin 38 || 0.2v @ standby
|-
|-
! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="0.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="0.5"| || style="padding:0px" colspan="5" |
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! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="1.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="1.5"| || style="padding:0px" colspan="5" |
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! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="2.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="2.5"| || style="padding:0px" colspan="5" |
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! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="3.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="3.5"| || style="padding:0px" colspan="5" |
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! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="4.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="38.5"| || style="padding:0px" data-sort-value="4.5"| || style="padding:0px" colspan="5" |
|-
|-
| 39 || 6 || P62 ||  || ? ||  || 0
| 39 || 6 || P62 ||  || ? ||  || 0
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| 45 || 6 || <s>P67/ASTB</s> ||  || {{pinnc}} || NOT_CONNECTED.  || 0
| 45 || 6 || <s>P67/ASTB</s> ||  || {{pinnc}} || NOT_CONNECTED.  || 0
|-
|-
| 46 || 7 || {{cellcolors|#33f|#e77}} P77/EX23/KR7/INTP11 ||  || {{pino}} || Connected to [[CELL BE|CELL]] pad BA19 ? (1342 pads layout), or pad <abbr title="Unknown">UNK</abbr> (1308 pads layout) through a transistor (labeled 26 and located near the CELL temperature monitor)<br>(inverted direction than the signal from pin 109) BE_POWGOOD ? || 0
| 46 || 7 || {{cellcolors|#33f|#e77}} P77/EX23/KR7/INTP11 ||  || ? || Connected to [[CELL BE]] through a transistor (labeled 26 and located near the CELL temperature monitor)<br>It seems to be some kind of ALERT signal (inverted direction than the signal from pin 109) BE_POWGOOD ? || 0
|-
|-
| 47 || 7 || P76/EX22/KR6/INTP10 ||  || ? ||  || 3v @ standby (3.15)
| 47 || 7 || P76/EX22/KR6/INTP10 ||  || ? ||  || 3v @ standby (3.15)
|-
|-
| 48 || 7 || {{cellcolors|#33f|#e77}} INTP9 || VD_VINT0/RSX_VINTE0 || {{pini}} || Connected to [[RSX]] pad AR22 ([[Template:RSX pad layout 41x41|41x41 layout]]) through a <abbr title="labeled ND and located near the RSX temperature monitor">transistor</abbr> || 3v @ standby (3.15)
| 48 || 7 || {{cellcolors|#33f|#e77}} INTP9 || VD_VINT0/RSX_VINTE0 || {{pini}} || Connected to [[RSX]] pad AR22 ([[Template:RSX pad layout 41x41|RSX layout 41x41]]) through a <abbr title="labeled ND and located near the RSX temperature monitor">transistor</abbr> || 3v @ standby (3.15)
|-
|-
| 49 || 7 || {{cellcolors|#ccc}} P74<s>/EX20/KR4/INTP8</s> || P74_DOWN || {{pin}} || 10K resistor to GND || 0
| 49 || 7 || {{cellcolors|#ccc}} P74<s>/EX20/KR4/INTP8</s> || P74_DOWN || {{pin}} || 10K resistor to GND || 0
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| 64 || 8 || P86/EX6 ||  || ? || 47k resistor tied to vcc || 0
| 64 || 8 || P86/EX6 ||  || ? || 47k resistor tied to vcc || 0
|-
|-
! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="5.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="5.5"| || style="padding:0px" colspan="5" |
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! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="6.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="6.5"| || style="padding:0px" colspan="5" |
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! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="7.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="7.5"| || style="padding:0px" colspan="5" |
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! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="8.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="8.5"| || style="padding:0px" colspan="5" |
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! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="10.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="64.5"| || style="padding:0px" data-sort-value="10.5"| || style="padding:0px" colspan="5" |
|-
|-
| 65 || 8 || P87/EX7 ||  || ? || tied to a resistor of 10k || 0
| 65 || 8 || P87/EX7 ||  || ? || tied to a resistor of 10k || 0
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| 75 || 1 || {{cellcolors|#3c3|#fff}} <s>P17/EX31/TI02/</s>TO02 || RSX_VDDR_EN || {{pino}} || Connected to [[RSX]] through voltage regulator [[Talk:Regulators | Mitsumi 810X]] pin 5 || 0
| 75 || 1 || {{cellcolors|#3c3|#fff}} <s>P17/EX31/TI02/</s>TO02 || RSX_VDDR_EN || {{pino}} || Connected to [[RSX]] through voltage regulator [[Talk:Regulators | Mitsumi 810X]] pin 5 || 0
|-
|-
| 76 || 1 || {{cellcolors|#33f|#e77}} INTP5 || RSX_INT || {{pini}} || Connected to [[RSX]] pad AY7 ([[Template:RSX pad layout 41x41|41x41 layout]]) through a <abbr title="labeled ND and located near the RSX temperature monitor">transistor</abbr> || 3v @ standby (3.15)
| 76 || 1 || {{cellcolors|#33f|#e77}} INTP5 || RSX_INT || {{pini}} || Connected to [[RSX]] pad AY7 ([[Template:RSX pad layout 41x41|RSX layout 41x41]]) through a <abbr title="labeled ND and located near the RSX temperature monitor">transistor</abbr> || 3v @ standby (3.15)
|-
|-
| 77 || 1 || P15/EX29/RTCDIV/RTCCL ||  || ? ||  || 3v @ standby (3.3)
| 77 || 1 || P15/EX29/RTCDIV/RTCCL ||  || ? ||  || 3v @ standby (3.3)
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| 79 || 1 || {{cellcolors|#a74}} TxD3 || UART0_TxD || {{pino}} || Connected to [[Service_Connectors#CN.3F.3F.3F.3F|Service Connector 3rd Gen.]] pin 10 (UART-TTL terminal Transmit) through a missing resistor<br>Connected to [[PCI]] Connector pin 4 || 3.3
| 79 || 1 || {{cellcolors|#a74}} TxD3 || UART0_TxD || {{pino}} || Connected to [[Service_Connectors#CN.3F.3F.3F.3F|Service Connector 3rd Gen.]] pin 10 (UART-TTL terminal Transmit) through a missing resistor<br>Connected to [[PCI]] Connector pin 4 || 3.3
|-
|-
| 80 || 1 || {{cellcolors|#33f|#fff}} SO00 || BE_SPI_DO / SB_SPI_DO || {{pino}} || Connected to [[CELL BE|CELL]] pad AV13 (1342 pads layout) / [[South Bridge]] pad V19 [[CXD9963GB]]. Serial Output from Syscon Master to Cell/SB Slave (MOSI)  || 0
| 80 || 1 || {{cellcolors|#33f|#fff}} SO00 || BE_SPI_DO || {{pino}} || Connected to [[CELL BE|CELL]] pad. (MOSI) Serial Output from Syscon Master to Cell Slave || 0
|-
|-
| 81 || 1 || {{cellcolors|#33f|#fff}} SI00 || BE_SPI_DI / SB_SPI_DI || {{pini}} || Connected to [[CELL BE|CELL]] pad BA13 (1342 pads layout) / [[South Bridge]] pad V22 [[CXD9963GB]]. Serial Input from Cell/SB Slave to Syscon Master (MISO) || 1.2
| 81 || 1 || {{cellcolors|#33f|#fff}} SI00 || BE_SPI_DI || {{pini}} || Connected to [[CELL BE|CELL]] pad. (MISO) Serial Input from Cell Slave to Syscon Master || 1.2
|-
|-
| 82 || 1 || {{cellcolors|#33f|#fff}} <span style="text-decoration: overline;">SCK00</span> || BE_SPI_CLK / SB_SPI_CLK || {{pino}} || Connected to [[CELL BE|CELL]] pad AY13 (1342 pads layout) / [[South Bridge]] pad U18 [[CXD9963GB]]. 2.5 Mhz SPI Clock ||
| 82 || 1 || {{cellcolors|#33f|#fff}} <span style="text-decoration: overline;">SCK00</span> || BE_SPI_CLK || {{pino}} || Connected to [[CELL BE|CELL]] pad. 2.5 Mhz SPI Clock ||
|-
|-
| 83 || 9 || {{cellcolors|#33f|#fff}} P90 || BE_SPI_CS / SB_SPI_CS|| {{pino}} || Connected to [[CELL BE|CELL]] pad AW13 (1342 pads layout) / [[South Bridge]] pad U19 [[CXD9963GB]]. Chip Select || 2.0
| 83 || 9 || {{cellcolors|#33f|#fff}} P90 || BE_SPI_CS || {{pino}} || Connected to [[CELL BE|CELL]] pad. Chip Select || 2.0
|-
|-
| 84 || 9 || P91/EX33 ||  || ? ||  || 3v @ standby
| 84 || 9 || P91/EX33 ||  || ? ||  || 3v @ standby
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| 86 || 9 || P93/EX35 ||  || ? ||  || 0
| 86 || 9 || P93/EX35 ||  || ? ||  || 0
|-
|-
| 87 || 9 || {{cellcolors|#33f|#fff}} P94 ||  || {{pino}} || Connected to [[RSX]] pad AW8 ? ([[Template:RSX pad layout 41x41|41x41 layout]]) (RSX_SPI_CS ?) || 0
| 87 || 9 || {{cellcolors|#33f|#fff}} P94 ||  || {{pino}} || Connected to [[RSX]] pad AW8 ? (RSX_SPI_CS). See: [[Template:RSX pad layout 41x41]] and [[Media:RSX_SKEMA.jpg|pad AW8]] || 0
|-
|-
| 88 || 9 || {{cellcolors|#33f|#fff}} <span style="text-decoration: overline;">SCK11</span> ||  || {{pino}} || Connected to [[RSX]] pad AY8 ? ([[Template:RSX pad layout 41x41|41x41 layout]]) (RSX_SPI_CLK ?) || 0
| 88 || 9 || {{cellcolors|#33f|#fff}} <span style="text-decoration: overline;">SCK11</span> ||  || {{pino}} || Connected to [[RSX]] pad AY8 ? (RSX_SPI_CLK ). See: [[Template:RSX pad layout 41x41]] and [[Media:RSX_SKEMA.jpg|pad AY8]] || 0
|-
|-
| 89 || 9 || {{cellcolors|#33f|#fff}} SI11 ||  || {{pini}} || Connected to [[RSX]] pad BA7 ? ([[Template:RSX pad layout 41x41|41x41 layout]]) (RSX_SPI_DI ?) || 0
| 89 || 9 || {{cellcolors|#33f|#fff}} SI11 ||  || {{pini}} || Connected to [[RSX]] pad BA7 ? (RSX_SPI_DI). See: [[Template:RSX pad layout 41x41]] and [[Media:RSX_SKEMA.jpg|pad BA7]] || 0
|-
|-
| 90 || 9 || {{cellcolors|#33f|#fff}} SO11 ||  || {{pino}} || Connected to [[RSX]] pad BA6 ? ([[Template:RSX pad layout 41x41|41x41 layout]]) (RSX_SPI_DO ?) || 0
| 90 || 9 || {{cellcolors|#33f|#fff}} SO11 ||  || {{pino}} || Connected to [[RSX]] pad BA6 ? (RSX_SPI_DO). See: [[Template:RSX pad layout 41x41]] and [[Media:RSX_SKEMA.jpg|pad BA6]] || 0
|-
|-
| 91 || 11 || P112 ||  || ? ||  || 0
| 91 || 11 || P112 ||  || ? ||  || 0
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| 102 || 15 || {{cellcolors|#ccc}} P157<s>/ANI15</s> || P157_DOWN || {{pin}} || 100k resistor to GND. And to a missing SMD component to [[Media:Syscon_SW2-303_Unsoldered.JPG|VIA]] to pin 8 of voltage regulator [[Talk:Regulators|Mitsumi 463A]] (3.3_EVER_A) <!-- Interesting, the circuit is designed to pull this pin up or down, is down by default but im wondering what does the pullup o0--> || 0
| 102 || 15 || {{cellcolors|#ccc}} P157<s>/ANI15</s> || P157_DOWN || {{pin}} || 100k resistor to GND. And to a missing SMD component to [[Media:Syscon_SW2-303_Unsoldered.JPG|VIA]] to pin 8 of voltage regulator [[Talk:Regulators|Mitsumi 463A]] (3.3_EVER_A) <!-- Interesting, the circuit is designed to pull this pin up or down, is down by default but im wondering what does the pullup o0--> || 0
|-
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! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="11.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="11.5"| || style="padding:0px" colspan="5" |
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! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="12.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="12.5"| || style="padding:0px" colspan="5" |
|-
|-
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="13.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="13.5"| || style="padding:0px" colspan="5" |
|-
|-
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="14.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="14.5"| || style="padding:0px" colspan="5" |
|-
|-
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="15.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="15.5"| || style="padding:0px" colspan="5" |
|-
|-
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="16.5"| || style="padding:0px" data-sort-value="ZZZZ" colspan="5" |
! style="padding:0px" data-sort-value="102.5"| || style="padding:0px" data-sort-value="16.5"| || style="padding:0px" colspan="5" |
|-
|-
| 103 || 15 || {{cellcolors|#ccc}} <s>P156/</s>ANI14 || ANI14_UP || {{pin}} || [[Media:Syscon_SW2-303_Unsoldered.JPG|VIA]] to 100k resistor to pin 8 of voltage regulator [[Talk:Regulators|Mitsumi 463A]] (3.3_EVER_A) || 0
| 103 || 15 || {{cellcolors|#ccc}} <s>P156/</s>ANI14 || ANI14_UP || {{pin}} || [[Media:Syscon_SW2-303_Unsoldered.JPG|VIA]] to 100k resistor to pin 8 of voltage regulator [[Talk:Regulators|Mitsumi 463A]] (3.3_EVER_A) || 0
Line 259: Line 260:
| 108 || 15 || <s>P151/ANI9</s> ||  || {{pinnc}} || pass on 100 ohms resistance then to power front panel  || 0
| 108 || 15 || <s>P151/ANI9</s> ||  || {{pinnc}} || pass on 100 ohms resistance then to power front panel  || 0
|-
|-
| 109 || 15 || {{cellcolors|#33f|#e77}} <s>P150/</s>ANI8 || THERMAL_OVERLOAD ? || {{pini}} || Connected to [[CELL BE|CELL]] pad AV23 ? (1342 pads layout), or pad <abbr title="Unknown">UNK</abbr> (1308 pads layout) through a transistor (labeled ND and located near the CELL temperature monitor)<br>(inverted direction than the signal from pin 46) SYS_THR_ALRT ?<br>And to 10k resistor to [[Media:Syscon_SW2-303_Unsoldered.JPG|VIA]] to pin 8 of voltage regulator [[Talk:Regulators|Mitsumi 463A]] (3.3_EVER_A) || 3v @ standby
| 109 || 15 || {{cellcolors|#33f|#e77}} <s>P150/</s>ANI8 || THERMAL_OVERLOAD ? || {{pini}} || Connected to [[CELL BE]] through a transistor (labeled ND and located near the CELL temperature monitor)<br>It seems to be some kind of ALERT signal (inverted direction than the signal from pin 46) BE_POW_FAIL ?<br>And to 10k resistor to [[Media:Syscon_SW2-303_Unsoldered.JPG|VIA]] to pin 8 of voltage regulator [[Talk:Regulators|Mitsumi 463A]] (3.3_EVER_A) || 3v @ standby
|-
|-
| 110 || 2 || {{cellcolors|#ff8}} <s>P27/</s>ANI7 || POW_SW || {{pini}} || Connected to [[switch boards|Switch board]] power switch || 3v @ standby (3.3) 3.3
| 110 || 2 || {{cellcolors|#ff8}} <s>P27/</s>ANI7 || POW_SW || {{pini}} || Connected to [[switch boards|Switch board]] power switch || 3v @ standby (3.3) 3.3
Line 265: Line 266:
| 111 || 2 || {{cellcolors|#ff8}} <s>P26/</s>ANI6 || EJECT_SW || {{pini}} || Connected to [[switch boards|Switch board]] eject switch || 3v @ standby (3.3) 3.3
| 111 || 2 || {{cellcolors|#ff8}} <s>P26/</s>ANI6 || EJECT_SW || {{pini}} || Connected to [[switch boards|Switch board]] eject switch || 3v @ standby (3.3) 3.3
|-
|-
| 112 || 2 || {{cellcolors|#d9f|#fff}} P25/ANI5 ||  || ? || Connected to [[Wifi|Wifi/BT]] module (BT_WAKEON/BT_WAKE ? (input), BT_RESET ? (output), or WLAN_RESET/11G_RESET ? (output)) || 0
| 112 || 2 || {{cellcolors|#d9f|#fff}} P25/ANI5 ||  || ? || Connected to [[Wifi|Wifi/BT]] module (BT_WAKEON ? or BT_RESET ?) || 0
|-
|-
| 113 || 2 || {{cellcolors|#d9f|#fff}} P24/ANI4 ||  || ? || Connected to [[Wifi|Wifi/BT]] module (BT_WAKEON/BT_WAKE ? (input), BT_RESET ? (output), or WLAN_RESET/11G_RESET ? (output)) || 0
| 113 || 2 || {{cellcolors|#d9f|#fff}} P24/ANI4 ||  || ? || Connected to [[Wifi|Wifi/BT]] module (BT_WAKEON ? or BT_RESET ?) || 0
|-
|-
| 114 || 2 || P23/ANI3 ||  || ? || to resistance 55 ohms to bdrom pin 11 || 0
| 114 || 2 || P23/ANI3 ||  || ? || to resistance 55 ohms to bdrom pin 11 || 0
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