Editing Template:Syscon pinout LQFP 128 pins
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| 2 || 14 || {{cellcolors|#33f|#e77}} INTP7 || SB_INT/SYSCSINT || {{pini}} || Connected to [[South Bridge]] [[CXD9963GB]] pad W22 through a resistor || ~1V @ standby (0 V?) | | 2 || 14 || {{cellcolors|#33f|#e77}} INTP7 || SB_INT/SYSCSINT || {{pini}} || Connected to [[South Bridge]] [[CXD9963GB]] pad W22 through a resistor || ~1V @ standby (0 V?) | ||
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| 3 || 14 || {{cellcolors|#33f|#e77}} INTP6 || BE_INT/ATTENTION || {{pini}} || Connected to [[CELL BE|CELL]] pad BA17 (1342 pads layout), or pad <abbr title="Unknown">UNK</abbr> (1308 pads layout) through a | | 3 || 14 || {{cellcolors|#33f|#e77}} INTP6 || BE_INT/ATTENTION || {{pini}} || Connected to [[CELL BE|CELL]] pad BA17 (1342 pads layout), or pad <abbr title="Unknown">UNK</abbr> (1308 pads layout) through a NPN transistor (CELL switches the transistor to connect this pin to GND) || 3V @ standby (3.15V) | ||
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| 4 || 12 || {{cellcolors|#f93}} EXLVI ||Β || {{pin}} || Connected to +12V_MAIN through a resistor and divider (EXLVI config = External potential input for low-voltage detector ?) || 0 | | 4 || 12 || {{cellcolors|#f93}} EXLVI ||Β || {{pin}} || Connected to +12V_MAIN through a resistor and divider (EXLVI config = External potential input for low-voltage detector ?) || 0 |