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== Notes ==
=== Package ===
*The SoftID (Syscon firmware build id) of retail chips is a 1:1 mapping to the syscon model. So each syscon model does have a unique SoftID.
http://pastie.org/private/tkcfjwit37huzyzoie7z5g BGA
*Every syscon within a series (CXR, SW, SW2, SW3) is backwards compatible, e.g. every CXR Syscon works on the COK-001, but only 202GB and newer on a COK-002.
*The SW and the SW2 are not interchangable (because of the CEC handling which uses hardcoded HDMI stuff).
*The actual platform configuration which defines the board on the which Syscon resides is stored in the EEPROM (CXR) or Flash data section (SW), it can be mapped to the platform id.
*In theory even the SW(1) chips work on Mullion boards if you adapt them.


== Prototype sherwoods ==
ball count: 4x16 + 8x14 + 2x12 = 64+112+24 = 200 pads
The sherwood table already have a row for D79F0073, should we add a couple more rows for D79F0086 and D79F0123 ?
 
new QF package is 26 * 38 = 128 pins
 
=== Clocks ===
SysCon clocks:
T4 XTAL / T5 EXTAL goes to [X4001] of 16.9344 MHz
C16 OSCIN / B16 OSCOUT goes to [X4002] of 32.768 kHz
http://oi52.tinypic.com/2s9ziw0.jpg
 
=== Backup Mode / Diag ===
BACKUP_MODE / DIAG_MODE pins on Gen 2 might be pins 110 and 111. They are pulled low.
Not completely sure, but looking at those pins in relation to what's around them seems like it could be those two.
 
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SEM-001 CECHG
Pink is N15 BACKUP_MODE
Blue is N16 DIAG_MODE
picture: http://psx-scene.com/forums/attachments/f149/26456d1300550098-brick-recovery-research-untitled-1.jpg
source: http://psx-scene.com/forums/780185-post344.html !unverified!
 
According to schematics, DIAG and BACKUP_MODE are are shown in the following picture for COK-001 and COK-002 Motherboards - http://goput.it/69k.jpg
These pins are tied to 3.3v so grounding them should enable each mode respectively.
!unverified!
 
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