Editing Talk:Syscon Hardware

== Main table problem ==
[[Syscon_Hardware#Retail]] assumes that each PS3 model does have an unique Syscon associated with it, but that's not true. Every syscon within a series (CXR, SW, SW2, SW3) is backwards compatible, e.g. every CXR Syscon works on the COK-001, but only -202GB and newer on a COK-002.<br>
The SoftID (Syscon firmware build id) is a 1:1 mapping to the suffix -XXXGB. So each -XXXGB does have a unique SoftID (in case of retail chips).<br>
The actual platform configuration which defines the board on the which Syscon resides is stored in the EEPROM (CXR) or Flash data section (SW), it can be mapped to the platform id.
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For the sherwoods i been thinking in creating another 2 more tables with the same style, based in the package we have 3 groups: all the "mullions BGA 200 balls" (this is confirmed in many ways, all the mullions shares the same pinout, we have the COK-001 and COK-002 refurbishements with the latest mullion versions CXR714120-303GB and CXR714120-304GB, a metal gear solid special edition COK-002 with a CXR714120-301GB, and the COOKIE-13 and other prototypes with a CXR713F120A), "Sherwoods SW & SW2 QFP 128 pins", and "Sherwoods SW3 QFP 100 pins". The point of grouping them this way is because indicates which ones can be replaced by each others, also im guessing the members of each group are "pinout compatibles" with each others<br>
The other reason is because in the actual table style im keeping the names of the "syscon model", "motherboard model" and "PS3 model" to leverage a bit the skills required to read the wiki pages. With the actual table style the group for the "mullions BGA 200 balls" requires to display the names of 5 retail motherboards in the same table row (one more for the "F"), "Sherwoods SW & SW2 QFP 128 pins" is composed by 5 motherboards, and "Sherwoods SW3 QFP 100 pins" by 8 motherboards. That numbers are fine for splitting the table in 3 groups, otherway if we joing together all the sherwoods it would be needed to have 13  columns 5+8) for the motherboard names and the width of the table would be excesive--[[User:Sandungas|Sandungas]] ([[User talk:Sandungas|talk]]) 11:58, 23 April 2021 (UTC)
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I like the new table. I don't know if it makes sense to include the ports into the table since Sony never changed them. In theory even the SW(1) chips work on Mullion boards if you adapt them. The "F" syscon problem is interesting, since that model is only used on prototypes and the marking XXXGB doesn't map to a particular firmware (especially since they reuse the chips). We would have to somehow get the TMU-510, TMU-520 and all the prototype boards into the table or just say that the "F" model does support both the retail firmware and then list the known prototype firmwares, this would mean that we only need to add the TMU-520.<br>
Sherwood would need 3 tables since the SW and the SW2 are not interchangable (because of the CEC handling which uses hardcoded HDMI stuff), but I like that idea.<br>
So about the "SoftID" and the platform id: Sony never uses the CECHXxx code internally, the same for the motherboard label (e.g. COK-001), the only thing which they use to identify the hardware is '''the platform id, which contains the chassis id''' [[SKU_Models_Nonretail#Prototype_model_names]]. On prototype units it's not only stored in syscon, but also on a label on the board and part of the board_id inside cISD1.<br>
So how they do it is start with the platform id, then get the chassis id which then maps to the numeric model code (1000, 1200, 1300...) and the model type byte inside the IDPS.
The actual SKU name then gets assigned based on what they want it to be marketed as. That's why I think the SKU name and board name are maybe misleading if you don't know how Sony works with them. The platform id is mapped 1:1 to your actual hardware, the SKU codes (especially for the early models) are all over the place. For example there're CECHA/DECHA with COK-001, COK-001 (with COK-002 syscon) and COK-002, also models certified as CECHE are sold as CECHA in some regions. The CECHM either had a VER-001 or DIA-001, completely different architecture and I wonder how many of these cases we haven't identified yet...<br>
[[User:M4j0r|M4j0r]] ([[User talk:M4j0r|talk]]) 13:49, 23 April 2021 (UTC)
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Mullions done, please review the affected pages--[[User:Sandungas|Sandungas]] ([[User talk:Sandungas|talk]]) 00:51, 30 May 2021 (UTC)

== PowerON/off HDMI/CEC, WiFi, Bluetooth, GbLAN, buttons etc ==
*There is no seperate communication processor on the PS3. Powering is handled by syscon.
**This is made by switching a bunch of voltage regulators located around the motherboard (can be considered slaves of syscon), only a few of this connections was documented for PS3 slim models, for reference see the connections of [[SW2-303]] with the [[Talk:Regulators|voltage regulators]]

*Power and eject buttons/switchs are connected with syscon (indirectly), there is no protocol involved, the syscon pins related with this buttons has 2 posible states: 3.3v (when button is not pressed)... or 0v (when button is pressed)

== Multipage Correction ==

=== Clocks ===
SysCon clocks:
 T4 XTAL / T5 EXTAL goes to [X4001] of 16.9344 MHz
 C16 OSCIN / B16 OSCOUT goes to [X4002] of 32.768 kHz
http://oi52.tinypic.com/2s9ziw0.jpg

=== Backup Mode / Diag ===
BACKUP_MODE / DIAG_MODE pins on Gen 2 might be pins 110 and 111. They are pulled low.
Not completely sure, but looking at those pins in relation to what's around them seems like it could be those two.

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SEM-001 CECHG
 Pink is N15 BACKUP_MODE
 Blue is N16 DIAG_MODE
picture: http://psx-scene.com/forums/attachments/f149/26456d1300550098-brick-recovery-research-untitled-1.jpg
source: http://psx-scene.com/forums/780185-post344.html !unverified!

According to schematics, DIAG and BACKUP_MODE are are shown in the following picture for COK-001 and COK-002 Motherboards - http://goput.it/69k.jpg
These pins are tied to 3.3v so grounding them should enable each mode respectively.
!unverified! - DIAG mode has been verified to work - a seperate grounding of the P16 pin on the SYSCON

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=== SoftID ===
A SoftID is just a 0x4 code that tells you the hardware revision of the syscon. This info can be get through the [[More System Information]] method.<br />
You can find them also inside the SYS_CON_FIRMWARE_*********.pkg (Syscon Firmware) at the offset '''0x28E'''
Every SoftID is associated with the ps3 mainboard. this means that you can know if a SC is compatible with your board without opening a PS3 ([[Syscon_Hardware#Serialnumbers_.40_SKU|Syscon Hardware]])

=== Datasheet of SoC similar to syscon ===
* [http://www.alldatasheet.com/datasheet-pdf/pdf/294279/SONY/CXR704060.html Sony CXR704060 datasheet.pdf] [http://mir.cr/LJOMNBFO mirror]

== VER-001 with syscon SW-301 or SW-302 ==
It seems VER-001 is the only PS3 motherboard that was shipped from factory with 2 posible syscon models, either SW-301 or SW-302. If we stick to the random reports in wiki and forums it seems the SW-301 was the more commonly used (and it was also the first retail sherwood) and the SW-302 should be some kind of minor revision<br>
If we keep in mind the special syscons made specifically for the frankensteins COK-001 refurbs with 40nm and 65nm RSX maybe something similar happened with the sw-302. The point is... maybe the SW-302 adds support for a newer revision of one of the critical components of the motherboard<br>
And that component could be CELL... the info we have in wiki about the [[CELL_BE#Serial_Numbers_.40_SKU | CELL revisions]] used in VER-001 is not so clear, but it seems the CELL was upgraded from 65nm to 45nm inmediatly after VER-001 (or in the last produced VER-001 models)
It seems the production of VER-001 lasted for long because it was used in CECHLxx, CECHMxx, CECHPxx, CECHQxx, if we find someone reporting info about one of the newest produced VER-001 motherboards with the sw-302 the next thing we should ask is about the CELL revision to see if this theory is correct

== COK-002 with 0DBF syscon ==

Information:
https://lh5.googleusercontent.com/-UiaHRjhdt50/UesKSGuxdFI/AAAAAAAAGOU/0FV8Fazyl60/s800/TV2013072019053700.jpg

Min ver:
https://lh5.googleusercontent.com/-iUOuidm6v3g/UexEQily6TI/AAAAAAAAGOk/zSfBMpYDRAM/s800/TV2013072117272000.jpg

Board type:
https://lh6.googleusercontent.com/-K1sc66WzJxo/Ue1Mdr5mHeI/AAAAAAAAGO8/rnqlidQAVfY/s800/DSC01591.JPG

Syscon:
https://lh6.googleusercontent.com/-OTxjx3qJV0M/Ue1L2itOfRI/AAAAAAAAGO0/Bv6zli_xQQg/s800/DSC01590.JPG

-This breaks lot of standards/pages/tables in wiki, can you add some notes please ?. E.g: the board came from official repair service, bought in a normal shop, or is a frankenstein made at home ?, it boots correctly and allows firmware updates ?. If it works normally i think this proves CXR713120-20xGB and CXR714120-30xGB shares the same pinout, but the fact that is using 0DBF SoftID is a bit shocking (maybe because is the minimal SoftID allowed by CXR714120-30xGB ?... [[Talk:More_System_Information | check SoftID examples in this table]]) --[[User:Sandungas|Sandungas]] 22:07, 24 July 2013 (MSK)

-The console is a CECHE01 MG (Metal Gear Solid 4 edition) and came with a 3rd generation BD drive (the first type with 2 lens). It had never been to SONY for service. It works normally, correctly and as you could see, has a minimum version which is compatible with the motherboard type. --l_oliveira

== PS2 Mechacon vs PSP Syscon vs PS3 Syscon vs PSVita Syscon vs PS4 Syscon ==

{| class="wikitable"
! Production Start Date (<=) || PS2 Mechacon !! PSP Syscon !! PS3 Syscon !! PSVita Syscon !! PS4 Syscon !! Used IC/CPU Core
|-
| <abbr title="GH-001+">10/1999</abbr> || CXP101064 || - || - || - || - || rowspan="2" | Sony SPC970 (100 pin)
|-
| <abbr title="GH-003+">01/2000</abbr> || CXP102064 || - || - || - || -
|-
| <abbr title="GH-015+">09/2000</abbr> || CXP103049 || - || - || - || - || Sony SPC??? (136 pin)
|- bgcolor="#CCCCCC"
| colspan="7" |
|-
| <abbr title="TMU-001, TMU-002, TA-079, TA-081">08/2004</abbr> || - || BAR''xx'' || - || - || - || NEC <abbr title="D790019">D780032AY</abbr> (78K0/78003xA, 64 pin)
|-
| <abbr title="TA-082, TA-086">07/2005</abbr> || - || B30''x'' || - || - || - || NEC <abbr title="D79F0036">D78F0531</abbr> (78K0/KE2 V2.00, 64 pin)
|-
| <abbr title="TA-085, TA-088, TA-091, TA-094">07/2007</abbr> || - || B40''x'' / 40''xx'' || - || - || - || NEC <abbr title="D79F????">D78F0544</abbr> (78K0/KF2 V2.00, 84 pin)
|-
| <abbr title="TA-090, TA-092, TA-093, TA-095, TA-096, TA-097">07/2008</abbr> || - || 3''xxx'' || - || - || - || NEC <abbr title="D79F????">D78F0534</abbr> (78K0/KE2 V2.00, 64 pin)
|-
|- bgcolor="#CCCCCC"
| colspan="7" |
|-
| <abbr title="GH-023+, XPD-001, XPD-005">03/2003</abbr> || CXR706080 || - || - || - || - || rowspan="3" | Sony SR11 (ARM7TDMI)<br>PS2 (''Dragon''): 164 pin<br>PS3 (''Donkey''): 200 pin
|-
| <abbr title="GH-032+">09/2004</abbr> || CXR716080 || - || CXR713120 || - || -
|-
| <abbr title="GH-061+">07/2007</abbr> || CXR726080 || - || CXR714120 || - || -
|- bgcolor="#CCCCCC"
| colspan="7" |
|-
| 03/2008 || - || - || SW || - || - || NEC <abbr title="D79F0073">D78F11AA</abbr> (78K0R/KH3 V3.40, 128 pin)
|-
| 05/2009 || - || - || SW2 || - || - || NEC <abbr title="D79F0086">D78F11BB</abbr> (78K0R/KH3 V1.00, 128 pin)
|-
| <abbr title="IRT-001, IRT-002, IRS-002, IRS-1001, DOL-1001, DOL-1002">07/2010</abbr> || - || - || - || <abbr title="No official name">"SC"</abbr> || - || NEC <abbr title="No/Matching internal name">D79F0109</abbr> (<abbr title="Mix between 78K0R/KH3 and 78K0R/Kx3-L">78K0R/KH3-L</abbr> V1.00, 121 pin)
|-
| 06/2011 || - || - || SW3 || - || - || NEC <abbr title="D79F0123">D78F11CC</abbr> (78K0R/KG3 V1.00, 100 pin)
|-
|- bgcolor="#CCCCCC"
| colspan="7" |
|-
| <abbr title="CVN-001, SAA-001, SAB-001">07/2013</abbr> || - || - ||- || - || C0L || Renesas R5F100PL (RL78/G13 V3.03, 100 pin)
|-
| <abbr title="USS-1001, USS-1002">08/2013</abbr> || - || - ||- || A0''xxx'' || - || Renesas R5F1ZCRK (RL78/G13 V3.03, 121 pin)
|-
| <abbr title="SAC-001, SAD-001, SAD-002, SAD-003, SAE-001, SAE-002, SAE-003, SAE-004, SAF-004, SAF-006, HAC-001, NVA-001, NVB-003, NVB-004, NVG-001, NVG-002">04/2015</abbr> || - || - ||- || - || C0L2 || Renesas R5F101LL (RL78/G13 V3.03, 64 pin)
|-
|}

* The SPC900 core was designed by Texas Instruments ([https://www.linkedin.com/in/hirakawa-katsunobu-55b09b2])
* ''CXP101064'', ''CXP102064'' are similar to CXP97 (''CXP971000'', ''CXP972032'', '''CXP973064''', ''CXP973F064''), the ''CXP103049'' matches no COTS because of its OCD support
** In-Circuit-Emulator: Mitek NICE-SPC970 ([http://www.hitechfacility.co.jp/details.php?id=E0001913]); Debug software: SVD970; Flash programmer: SFP-2
* A ''F'' inside the model name specifies that the IC contains flash memory.
** Mass-produced CXR/SW units don't have/use program flash memory for updates, instead an encrypted firmware patch is stored on the data-"EEPROM"
* CXR7 series uses Sony SR11 CPU (ARM7TDMI)
** Models with public datasheet: ''CXR702080'', ''CXR702F080'', ''CXR704060''
* Prototype PS3 Syscon's:
** [[CXR713F120A]] Syscon used on (early) pre-release prototypes, e.g. [[CEB-2030]], [[DECR-1000]], [[DEH-H1001-D]], [[DEH-H1000A-E]]
** [[DEH-FH1500J-A]] with [[VERTIGO-02]] board and SW series prototype ''D79F0073''
** [[CBEH-H2001]] with [[SUR-00x#SURTEES-03|SURTEES-03]] board and SW2 series prototype ''D79F0086''
** [[DEH-ML00AK-G]] with [[MPX-001 (Prototype)]] board and SW3 series prototype ''D79F0123''