Editing Syscon Hardware

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<div style="float:right">[[File:Syscon CXR713120-203GB DIE (detail).jpg|300px|thumb| Syscon CX'''R7131'''20-203GB DIE (detail)]]<br />[[File:Pyramid Syscon live probing.jpg|300px|thumb|Pyramid Syscon live probing]]</div>
<div style="float:right">[[File:Syscon R7131 die.jpg|300px|thumb| Syscon CX'''R7131'''20-xxxGB DIE]]<br />[[File:Pyramid Syscon live probing.jpg|300px|thumb|Pyramid Syscon live probing]]</div>


= Description =
= Description =
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== Syscon UART ==
== Syscon UART ==
<div style="float:right">[[File:PCI connector JSD-001 SB and SC UART.jpg|200px|thumb|left|Syscon and southbridge UART testpads in the [[PCI]] connector of a [[JSD-001]] motherboard]]</div>
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! BGA !! Name !! Description
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<gallery>
You can attach a 3.3v TTL cable (LV-TTL) to the UART on syscon (UART0_TxD, UART0_RxD). (Convenient solder points are available on JSD-001 / JTP-001 by the NOR test points. They are marked as '?' in [[:File:JSD-001 NOR - nor testpoints.png|marcan' noraliser / judges' NORway install picture]], closest to the ground at the bottom - RX is left, TX is right) Baud rate is 57600. There is a simple plaintext protocol involved. This varies on different syscon models. Example:
File:COK-001 SC UART testpads.jpg|[[COK-001]] SC UART testpads
File:COK-002 SC UART testpads.jpg|[[COK-002]] SC UART testpads
File:SEM-001 SC UART testpads.jpg|[[SEM-001]] SC UART testpads
File:DIA-001 SC UART testpads.jpg|[[DIA-001]] SC UART testpads
File:DIA-002 SC UART testpads.jpg|[[DIA-002]] SC UART testpads
File:VER-001 SC UART testpads.jpg|[[VER-001]] SC UART testpads
File:DYN-001 SC UART testpads.jpg|[[DYN-001]] SC UART testpads
File:SUR-001 SC and SB UART testpads.jpg|[[SUR-001]] SC and SB UART testpads
File:JTP-001 SC and SB UART testpads.jpg|[[JTP-001]] SC and SB UART testpads
File:JSD-001 SC and SB UART testpads.jpg|[[JSD-001]] SC and SB UART testpads
File:KTE-001 SC and SB UART testpads.jpg|[[KTE-001]] SC and SB UART testpads
File:SW3 SC UART testpads.jpg|SW3 SC UART testpads
</gallery>
 
You can attach a 3.3v TTL cable (LV-TTL) to the UART on syscon (UART0_TxD, UART0_RxD). Baud rate is 57600. There is a simple plaintext protocol involved. This varies on different syscon models. Example:


'''<command>:<hash>'''
'''<command>:<hash>'''
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= Testpads and alternative solder points =
= Testpads and alternative solder points =
*The identification of the syscon UART testpads can be made by grouping the motherboard models in a similar way we was doing with the [[Teensy%2B%2B_2.0#Schematics_by_motherboard_.28retail.29| layouts]] of the hardware flashers, there are 7 retail testpads layouts:
*The identification of most/all the testpads can be made by grouping the motherboard models in the same way we was doing with the [[Teensy%2B%2B_2.0#Schematics_by_motherboard_.28retail.29| hardware flasers layouts]], there are 6 retail syscon UART testpads layouts:
**Layout 1 = COK-001, COK-002 (fat, mullion, NAND)
**Layout 1 = COK-001, COK-002, SEM-001 (fat, mullion, NAND)
**Layout 2 = SEM-001 (fat, mullion, NAND)
**Layout 2 = DIA-001, DIA-002 (fat, mullion, NOR)
**Layout 3 = DIA-001, DIA-002 (fat, mullion, NOR)
**Layout 3 = VER-001 (fat, sherwood, NOR)
**Layout 4 = VER-001 (fat, sherwood, NOR)
**Layout 4 = DYN-001 (slim, sherwood, NOR)
**Layout 5 = DYN-001 (slim, sherwood, NOR)
**Layout 5 = SUR-001, JTP-001, JSD-001, KTE-001 (slim, sherwood, NOR)
**Layout 6 = SUR-001, JTP-001, JSD-001, KTE-001 (slim, sherwood, NOR)
**Layout 6 = MSX-001, MPX-001, NPX-001, PPX-001, PQX-001, RTX-001, REX-001 (superslim, sherwood, NOR/eMMC)
**Layout 7 = MSX-001, MPX-001, NPX-001, PPX-001, PQX-001, RTX-001, REX-001 (superslim, sherwood, NOR/eMMC)


== DIA-001 and DIA-002 ==
== DIA-001 and DIA-002 ==
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