Editing Syscon Hardware

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<div style="float:right">[[File:Syscon CXR713120-203GB DIE (detail).jpg|300px|thumb| Syscon CX'''R7131'''20-203GB DIE (detail)]]<br />[[File:Pyramid Syscon live probing.jpg|300px|thumb|Pyramid Syscon live probing]]</div>
<div style="float:right">[[File:SYSCON_GEN1.JPG|thumb|Syscon 1st Generation (BGA Packaging)]]<br />[[File:Pyramid Syscon live probing.jpg|thumb|Pyramid Syscon live probing]]</div>


= Description =
Syscon is the main power controller chip of the PS3. It is responsible for powering up the various power systems and for configuring and initialising the [[CELL BE|BE]], [[RSX]] and [[South Bridge|SB]] via dedicated SPI buses. The Syscon is a SoC and based on a ARM7TDMI-S (in the [[Mullion]] syscons) or a NEC 78K0R (in the [[Sherwood]] syscons) design. There is external access by "JTAG" (disabled from factory on retail models), an EEPROM programming interface (only on Mullion) and Serial (UART).
The PS3 syscon is the main power controller chip of the PS3. It is responsible for powering up the main 12v rail of the [[Power Supply]] and various power systems by switching different [[Talk:Regulators|voltage regulators]] in the motherboard, and for configuring and initialising the [[CELL BE|BE]], [[RSX]] and [[South Bridge|SB]] via dedicated SPI buses.


The LEDs and buttons of the [[Switch boards|Switch board]] are connected to syscon, as well as the [[Cooling|fan/s]], buzzer, etc.
= Serialnumbers per SKU =


The Syscon is a SoC and based on a ARM7TDMI-S (in the [[Mullion]] syscons) or a NEC 78K0R (in the [[Sherwood]] syscons) design. There is external access by "JTAG" (disabled from factory on retail models), an EEPROM programming interface (only on Mullion) and Serial (UART).
== Retail ==


<!--// Remote Power ON/OFF (from network, HDMI CEC commands, etc...) is managed by devices connected to the southbridge (ethernet/wifi/BT, HDMI controller, etc...) //-->
{| class="wikitable"
 
|-
== PlayStation system controllers ==
! colspan=5 | [[SKU Models|Console]] & [[Motherboard Revisions|Motherboard]] compatibility !! colspan=7 | [[Syscon Hardware|Syscon]]
 
{| class="wikitable" style="font-size:small; line-height:105%"
! Production Start Date (<=) || PS2 Mechacon !! PSP Syscon !! PS3 Syscon !! PSVita Syscon !! PS4 Syscon !! Used IC/CPU Core
|-
|-
| <abbr title="GH-001+">10/1999</abbr> || CXP101064 || - || - || - || - || rowspan="2" | Sony SPC970 (100 pin)
! [[CECHAxx]]<br>[[CECHBxx]] !! [[CECHCxx]]<br>[[CECHExx]] !! [[CECHGxx]] !! [[CECHHxx]] !! [[CECHJxx]]<br>[[CECHKxx]] !! rowspan=2 | Model !! rowspan=2 | [[More System Information#First_section|SoftID]] !! colspan=4 | Memory !! rowspan=2 | Default platform config & notes
|-
|-
| <abbr title="GH-003+">01/2000</abbr> || CXP102064 || - || - || - || -
! [[COK-001]] !! [[COK-002]] !! [[SEM-001]] !! [[DIA-001]] !! [[DIA-002]] !! ROM !! FLASH !! EEPROM !! RAM
|-
|-
| <abbr title="GH-015+">09/2000</abbr> || CXP103049 || - || - || - || - || Sony SPC??? (136 pin)
| {{yes}} || {{no}} || {{no}} || {{no}} || {{no}} || [[CXR713120-201GB]] || 0B8E || rowspan=7 | 384KB || rowspan=7 {{no}}|| rowspan=3 | 32KB || rowspan=7 | 64KB ||  
|-
|-
| style="padding:0px" colspan="7" |
| {{yes}} || {{yes}} || {{no}} || {{no}} || {{no}} || [[CXR713120-202GB]] || 0C16 ||  
|-
|-
| <abbr title="TMU-001, TMU-002, TA-079, TA-081">08/2004</abbr> || - || BAR''xx'' || - || - || - || NEC <abbr title="D790019">D780032AY</abbr> (78K0/78003xA, 64 pin)
| {{yes}} || {{yes}} || {{yes}} || {{no}} || {{no}} || [[CXR713120-203GB]] || 0D52 ||  
|-
|-
| <abbr title="TA-082, TA-086">07/2005</abbr> || - || B30''x'' || - || - || - || NEC <abbr title="D79F0036">D78F0531</abbr> (78K0/KE2 V2.00, 64 pin)
| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{no}} || [[CXR714120-301GB]] || 0DBF || rowspan=4 | 20KB ||
|-
|-
| <abbr title="TA-085, TA-088, TA-091, TA-094">07/2007</abbr> || - || B40''x'' / 40''xx'' || - || - || - || NEC <abbr title="D79F????">D78F0544</abbr> (78K0/KF2 V2.00, 84 pin)
| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || [[CXR714120-302GB]] || 0E69 ||
|-{{cellcolors|#f0f0f0}}
| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || [[CXR714120-303GB]] || 0F29 || [[CECHCxx]]/[[COK-002]] Refurbished, new 65nm RSX, new syscon
|-{{cellcolors|#f0f0f0}}
| {{yes}} || {{yes}} || {{yes}} || {{yes}} || {{yes}} || [[CXR714120-304GB]] || 0F38 || [[CECHAxx]]/[[COK-001]] Refurbished, new 40nm RSX, new syscon
|-
|-
| <abbr title="TA-090, TA-092, TA-093, TA-095, TA-096, TA-097">07/2008</abbr> || - || 3''xxx'' || - || - || - || NEC <abbr title="D79F????">D78F0534</abbr> (78K0/KE2 V2.00, 64 pin)
|}
 
{| class="wikitable"
|-
|-
| style="padding:0px" colspan="7" |
! colspan=3 | PS3 !! colspan=6 | [[Syscon Hardware|Syscon]] !! rowspan=2 | Notes
|-
|-
| <abbr title="GH-023+, XPD-001, XPD-005">03/2003</abbr> || CXR706080 || - || - || - || - || rowspan="3" | Sony SR11 (ARM7TDMI)<br>PS2 (''Dragon''): 164 pin<br>PS3 (''Donkey''): 200 pin
! [[SKU Models|Model]] !! [[Product Sub Code]] !! [[Motherboard Revisions|Motherboard]] !! Model !! [[More System Information#First_section|SoftID]] !! ROM !! FLASH !! EEPROM !! RAM
|-
|-
| <abbr title="GH-032+">09/2004</abbr> || CXR716080 || - || CXR713120 || - || -
| [[CECHLxx]]<br />[[CECHMxx]]<br />[[CECHPxx]]<br />[[CECHQxx]] || 0x08 || [[VER-001]] || [[SW-301]] or<br />[[SW-302]] || 065D || N/A || 512KB || N/A || 50KB ||  
|-
|-
| <abbr title="GH-061+">07/2007</abbr> || CXR726080 || - || CXR714120 || - || -
| [[CECH-20xx]] || 0x09 || [[DYN-001]] || [[SW2-301]] || 0832 || rowspan=10 | N/A || rowspan=10 | 768KB || rowspan=10 | N/A || rowspan=10 | 50KB ||  
|-
|-
| style="padding:0px" colspan="7" |
| [[CECH-21xx]] || 0x0A || [[SUR-001]] || [[SW2-301]] or<br />[[SW2-302]] || 08A0 ||
|-
|-
| 03/2008 || - || - || SW || - || - || NEC <abbr title="D79F0073">D78F11AA</abbr> (78K0R/KH3 V3.40, 128 pin)
| [[CECH-25xx]] || 0x0B || [[JTP-001]] or<br />[[JSD-00x|JSD-001]] || [[SW2-301]] or<br />[[SW2-302]]&nbsp;&nbsp;or<br />[[SW2-303]] || 08C2 ||
|-
|-
| 05/2009 || - || - || SW2 || - || - || NEC <abbr title="D79F0086">D78F11BB</abbr> (78K0R/KH3 V1.00, 128 pin)
| [[CECH-30xx]] || 0x0C || [[KTE-001]] || [[SW3-301]] || 0918 ||  
|-
|-
| <abbr title="IRT-001, IRT-002, IRS-002, IRS-1001, DOL-1001, DOL-1002">07/2010</abbr> || - || - || - || <abbr title="No official name">"SC"</abbr> || - || NEC <abbr title="No/Matching internal name">D79F0109</abbr> (<abbr title="Mix between 78K0R/KH3 and 78K0R/Kx3-L">78K0R/KH3-L</abbr> V1.00, 121 pin)
| [[CECH-40xx]] || 0x0D || [[MSX-001]] or<br />[[MPX-00x|MPX-001]] || [[SW3-302]] || 098F ||  
|-
|-
| 06/2011 || - || - || SW3 || - || - || NEC <abbr title="D79F0123">D78F11CC</abbr> (78K0R/KG3 V1.00, 100 pin)
| [[CECH-42xx]] || ? || [[NPX-001]] || ? || ? ||  
|-
|-
| style="padding:0px" colspan="7" |
| [[CECH-42xx]] || ? || [[PPX-001]] || ? || ? ||  
|-
|-
| <abbr title="CVN-001, SAA-001, SAB-001">07/2013</abbr> || - || - ||- || - || C0L || Renesas R5F100PL (RL78/G13 V3.03, 100 pin)
| [[CECH-42xx]]A || ? || [[PQX-001]] || [[SW3-304]] || ? ||  
|-
|-
| <abbr title="USS-1001, USS-1002">08/2013</abbr> || - || - ||- || A0''xxx'' || - || Renesas R5F1ZCRK (RL78/G13 V3.03, 121 pin)
| [[CECH-43xx]] || ? || [[RTX-001]] || ? || ? ||  
|-
|-
| <abbr title="SAC-001, SAD-001, SAD-002, SAD-003, SAE-001, SAE-002, SAE-003, SAE-004, SAF-004, SAF-006, HAC-001, NVA-001, NVB-003, NVB-004, NVG-001, NVG-002">04/2015</abbr> || - || - ||- || - || C0L2 || Renesas R5F101LL (RL78/G13 V3.03, 64 pin)
| [[CECH-43xx]] || ? || [[REX-001]] || ? || ? ||  
|-
|-
|}
|}
*Notes
**There is no mention in wiki about [[SW3-303]] but probably was used in the early PS3 [[CECH-42xx]] models


* The SPC900 core was designed by Texas Instruments ([https://www.linkedin.com/in/hirakawa-katsunobu-55b09b2])
== Non retail ==
* ''CXP101064'', ''CXP102064'' are similar to CXP97 (''CXP971000'', ''CXP972032'', '''CXP973064''', ''CXP973F064''), the ''CXP103049'' matches no COTS because of its OCD support
** In-Circuit-Emulator: Mitek NICE-SPC970 ([http://www.hitechfacility.co.jp/details.php?id=E0001913]); Debug software: SVD970; Flash programmer: SFP-2
* A ''F'' inside the model name specifies that the IC contains flash memory.
** Mass-produced CXR/SW units don't have/use program flash memory for updates, instead an encrypted firmware patch is stored on the data-"EEPROM"
* CXR7 series uses Sony SR11 CPU (ARM7TDMI)
** Models with public datasheet: ''CXR702080'', ''CXR702F080'', ''CXR704060'' (datasheet: [http://www.alldatasheet.com/datasheet-pdf/pdf/294279/SONY/CXR704060.html 1])
* Prototype PS3 Syscon's:
** [[CXR713F120A]] Syscon used on (early) pre-release prototypes, e.g. [[CEB-2030]], [[DECR-1000]], [[DEH-H1001-D]], [[DEH-H1000A-E]]
** [[DEH-FH1500J-A]] with [[VERTIGO-02]] board and SW series prototype ''[[Media:DEH-FH1500J-A_-_VERTIGO-02_-_Syscon_Hardware.jpg|D79F0073]]''
** [[CBEH-H2001]] with [[SUR-00x#SURTEES-03|SURTEES-03]] board and SW2 series prototype ''D79F0086''
** [[DEH-ML00AK-G]] with MPX-001 (Prototype) board and SW3 series prototype ''[[Media:DEH-ML00AK-G_Board_4.jpg|D79F0123]]''


= PS3 Syscon models =
{| class="wikitable sortable"
{| class="wikitable" style="font-size:small; line-height:105%"
|-
|-
! colspan="10" | [[Mullion]] [[Syscon Hardware|Syscons]] !! rowspan="13" style="padding:1px" | !! colspan="8" | [[SKU Models|PS3 model]] & [[Motherboard Revisions|Motherboard]] compatibility by [[Platform ID]]
! [[SKU Models|Model]] !! [[Product Sub Code]] !! [[Motherboard Revisions|Motherboard]] !! [[Syscon Hardware|Syscon<br />part no.]] !! Syscon<br />[[More System Information#First_section|Soft ID]] !! Active JTAG !! Notes
|-
|-
! Model !! [[Syscon Firmware|Rev.]] !! [[Syscon Firmware|Ver.]] !! <abbr title="Syscon Firmware build date">Year</abbr> !! Package !! ROM !! FLASH !! colspan="2" | [[SC_EEPROM|EEPROM]] !! RAM
| [[CEB-2040]] || - || [[MPU-501]] || CXR713F120<abbr title="A ?">..</abbr> '''GB-000''' || ? || ?No? || Retail prototype. See [[Talk:CXR713F120A]]
! DEH-R10xx<br>[[DECR-1000]] !! [[SKU Models Nonretail|Prototypes]] !! [[CECHAxx]]<br>[[CECHBxx]] !! [[CECHCxx]]<br>[[CECHExx]] !! [[CECHGxx]] !! [[CECHHxx]] !! [[CECHJxx]]<br>[[CECHKxx]] !! [[DECR-1400]]
|-
|-
! style="width:115px; border-top:hidden" | !! style="width:35px; border-top:hidden" | !! style="width:55px; border-top:hidden" | !! style="width:30px; border-top:hidden" | !! style="width:60px; border-top:hidden" | !! style="width:40px; border-top:hidden" | !! style="width:40px; border-top:hidden" | !! style="width:35px" | Total !! style="width:35px" | Used !! style="width:35px; border-top:hidden" |
| [[DEH-H1001-D]] || 0x01 || [[COOKIE-13]] || [[CXR713F120A]] '''GB-???''' || 0B67 || No || Preproduction. See [[Talk:CXR713F120A]]
! [[TMU-510]]<br>[[TMU-520]] !! <!--[[MPU-501]]<br>-->[[COOKIE-13]]<br>[[COK-001 (Prototype)|COK Proto]] !! [[COK-001]] !! [[COK-002]] !! [[SEM-001]] !! [[DIA-001]] !! [[DIA-002]] !! [[DEB-001]]
|-
|-
| colspan="18" style="padding:1px" |
| [[DEH-H1000A(S)(-E(S))]] || 0x01 || [[COK-001 (Prototype)]] || [[CXR713F120A]] '''GB-???''' || 0B67 || No || Preproduction. See [[Talk:CXR713F120A]]
|-
|-
! [[CXR713F120A]]
| [[DECR-1000|DECR1000(A/J)]] || 0x01 || [[TMU-520]] || [[CXR713F120A]] '''GB-101''' || 0F3B || No || Reference tool. See [[Talk:CXR713F120A]]
| colspan="3" style="text-align:center; background:#999; color:#fff" | <abbr title="Depends of the syscon firmware version installed in it">ANY</abbr> || rowspan="8" | [[Template:Syscon pinout BGA 200 pads|BGA 200]] || <abbr title="0x20000>128KB</abbr> || <abbr title="0x60000>384KB</abbr> || rowspan="4" | <abbr title="0x8000>32KB</abbr> || rowspan="3" | <abbr title="0x8000>32KB</abbr> || rowspan="8" | <abbr title="0x10000>64KB</abbr> || {{yes}}, factory || {{yes}}, factory || {{YES}} || {{YES}} || {{YES}} || {{YES}} || {{YES}} || {{YES}}
|-
|-
! [[CXR713120-201GB]]
| [[DECR-1400|DECR1400(A/J)]] || 0x01 || [[DEB-001]] || [[CXR714120-302GB]] || ? || ? || Reference tool
| 0B8E || v1.0.0_k1 || 2006 || rowspan="7" | <abbr title="0x60000>384KB</abbr> || rowspan="7" style="text-align:center; background:lightgrey;" | N/A || {{YES}} ? || {{YES}} ? || {{yes}}, factory || {{no}} || {{no}} || {{no}} || {{no}} || {{no}}
|-
|-
! [[CXR713120-202GB]]
| [[DEH-FH1500J-A]] || 0x08 || [[VERTIGO-02]] || D79F0073 ([[SW-301]]) || 0658 || ?Yes? || Preproduction
| 0C16 || v1.1.3_k1 || 2006 || {{YES}} ? || {{YES}} ? || {{YES}} || {{yes}}, factory || {{no}} || {{no}} || {{no}} || {{no}}
|-
|-
! [[CXR713120-203GB]]
| [[DEH-ML00AK-G]] || 0x0D || [[MPX-001 (Prototype) ]] || D79F0123 ([[SW3-302]]) || 098F || ?No? || Preproduction
| 0D52 || v1.2.3_k1 || 2007 || rowspan="5" | <abbr title="0x5000>20KB</abbr> || {{YES}} ? || {{YES}} ? || {{YES}} || {{YES}} || {{yes}}, factory || {{no}} || {{no}} || {{no}}
|-
|-
! [[CXR714120-301GB]]
| [[DECHA|DECHA00A/J]] || 0x01 || [[COK-001]] || [[CXR713120-201GB]] ? || 0C16 || No || Found when searching for 40nm RSX
| 0DBF || v1.3.3_k1 || 2007 || rowspan="4" | <abbr title="0x5000>20KB</abbr> || {{YES}} ? || {{YES}} ? || {{YES}} || {{yes}}, <abbr title="Found in a CECHE01 MG (Metal Gear Solid 4 edition)">rare</abbr> || {{yes}}, factory || {{yes}}, factory || {{no}} || {{no}}
|-
|-
! [[CXR714120-302GB]]
<!-- Not Prototype debug units - see retail -->
| 0E69 || v1.4.4_k2 || 2007 || {{YES}} ? || {{YES}} ? || {{YES}} || {{YES}} || {{YES}} || {{YES}} || {{yes}}, factory || {{yes}}, factory
|-
! [[CXR714120-303GB]]
| 0F29 || v1.5.0_k2 || 2009 || {{YES}} ? || {{YES}} ? || {{YES}} || {{yes}}, <abbr title="Found in a refurbished CECHCxx/COK-002 with a 65nm RSX">refurb</abbr> || {{YES}} || {{YES}} || {{YES}} || {{YES}}
|-
! [[CXR714120-304GB]]
| 0F38 || v1.5.1_k2 || 2010 || {{YES}} ? || {{YES}} ? || {{yes}}, <abbr title="Found in a refurbished CECHAxx/COK-001 with a 40nm RSX">refurb</abbr> || {{YES}} || {{YES}} || {{yes}}, <abbr title="Found in a refurbished CECHHxx/DIA-001 with a 40nm RSX">refurb</abbr> || {{YES}} || {{YES}}
|}
 
{| class="wikitable" style="font-size:small; line-height:105%"
|-
! colspan="10" | [[Sherwood]] [[Syscon Hardware|Syscons]] !! rowspan="17" style="padding:1px" | !! colspan="10" | [[SKU Models|PS3 model]] & [[Motherboard Revisions|Motherboard]] compatibility by [[Platform ID]]
|-
! Model !! [[Syscon Firmware|Rev.]] !! [[Syscon Firmware|Ver.]] !! <abbr title="Syscon Firmware build date">Year</abbr> !! Package !! ROM !! FLASH !! colspan="2" | [[SC_EEPROM|EEPROM]] !! RAM
! [[SKU Models Nonretail|Prototypes]] !! [[CECHLxx]]<br>[[CECHMxx]]<br>[[CECHPxx]]<br>[[CECHQxx]] || [[SKU Models Nonretail|Prototypes]] || [[CECH-20xx]] !! [[CECH-21xx]] !! [[CECH-25xx]] !! [[SKU Models Nonretail|Prototypes]] || [[CECH-30xx]] !! [[CECH-40xx]] !! [[CECH-42xx]]<br>[[CECH-43xx]]
|-
! style="width:115px; border-top:hidden" | !! style="width:35px; border-top:hidden" | !! style="width:55px; border-top:hidden" | !! style="width:30px; border-top:hidden" | !! style="width:60px; border-top:hidden" | !! style="width:40px; border-top:hidden" | !! style="width:40px; border-top:hidden" | !! style="width:35px" | Total !! style="width:35px" | Used !! style="width:35px; border-top:hidden" |
! [[VERTIGO-02|VERTIGO]]<br><small>prototype</small> !! [[VER-001]] !! [[SUR-00x#SURTEES-03|SURTEES]]<br><small>prototype</small> !! [[DYN-001]] !! [[SUR-001]] !! [[JTP-001]]<br>[[JSD-001]] !! [[MPX-001]]<br><small>prototype</small> !! [[KTE-001]] !! [[MSX-001]]<br>[[MPX-001]]<br>[[NPX-001]] !! [[PPX-001]]<br>[[PQX-001]]<br>[[RTX-001]]<br>[[REX-001]]
|-
| colspan="18" style="padding:1px" |
|-
! [[Media:DEH-FH1500J-A_-_VERTIGO-02_-_Syscon_Hardware.jpg|D79F0073]]
| colspan="3" style="text-align:center; background:#999; color:#fff" | <abbr title="Depends of the syscon firmware version installed in it">ANY</abbr> || rowspan="7" | [[Template:Syscon pinout LQFP 128 pins|LQFP 128]] || rowspan="12" style="text-align:center; background:lightgrey;" | N/A || rowspan="3" | <abbr title="0x80000>512KB</abbr> || rowspan="12" style="text-align:center; background:lightgrey;" | N/A || rowspan="12" style="text-align:center; background:lightgrey;" | <abbr title="0x8000 Emulated inside FLASH">32KB</abbr> || rowspan="12" | <abbr title="0xC800>50KB</abbr> || {{yes}}, factory || {{YES}} || colspan="4" rowspan="3" style="text-align:center; background:#CC5555; color:#FFFFFF;" | No (<abbr title="Different HDMI/CEC handling">HDMI Incompatible</abbr>) || colspan="4" rowspan="7" style="text-align:center; background:#CC5555; color:#FFFFFF;" | No (different package)
|-
! [[SW-301]]
| 065D || 0.17.0 || 2008 || {{YES}} ? || {{yes}}, factory
|-
! [[SW-302]]
| <abbr title="Please help wiki by reporting this ID"><span style="background:#ff4444; color:#ffff00;">'''????'''</span></abbr> || <abbr title="Please help wiki by reporting this ID"><span style="background:#ff4444; color:#ffff00;">'''?.??.?'''</span></abbr> || 2008 || {{YES}} ? || {{yes}}, factory
|-
! D79F0086
| colspan="3" style="text-align:center; background:#999; color:#fff" | <abbr title="Depends of the syscon firmware version installed in it">ANY</abbr> || rowspan="9" | <abbr title="0xC0000>768KB</abbr> || colspan="2" rowspan="4" style="text-align:center; background:#CC5555; color:#FFFFFF;" | No (<abbr title="Different HDMI/CEC handling">HDMI Incompatible</abbr>) || {{yes}}, factory || {{YES}} || {{YES}} || {{YES}}
|-
! [[SW2-301]]
| 0832 || 1.11.0 || 2009 || {{YES}} ? || {{yes}}, factory || {{no}} || {{no}}
|-
! [[SW2-302]]
| 08A0 || 1.16.0 || 2009 || {{YES}} ? || {{YES}} || {{yes}}, factory || {{no}}
|-
! [[SW2-303]]
| 08C2 || 1.21.0 || 2010 || {{YES}} ? || {{YES}} || {{YES}} || {{yes}}, factory
|-
! [[Media:DEH-ML00AK-G_Board_4.jpg|D79F0123]]
| colspan="3" style="text-align:center; background:#999; color:#fff" | <abbr title="Depends of the syscon firmware version installed in it">ANY</abbr> || rowspan="5" | [[Template:Syscon pinout LQFP 100 pins|LQFP 100]] || colspan="6" rowspan="5" style="text-align:center; background:#CC5555; color:#FFFFFF;" | No (different package) || {{yes}}, factory || {{YES}} || {{YES}} || {{YES}}
|-
! [[SW3-301]]
| 0918 || 2.3.0 || 2011 || {{YES}} ? || {{yes}}, factory || {{no}} || {{no}}
|-
! [[SW3-302]]
| 098F || 2.12.0 || 2012 || {{YES}} ? || {{YES}} || {{yes}}, factory || {{no}}
|-
! [[SW3-303]]
| <abbr title="Please help wiki by reporting this ID"><span style="background:#ff4444; color:#ffff00;">'''????'''</span></abbr> || <abbr title="Please help wiki by reporting this ID"><span style="background:#ff4444; color:#ffff00;">'''?.??.?'''</span></abbr> || 2013 || {{YES}} ? || {{YES}} || ? || ?
|-
! [[SW3-304]]
| 09A4 || 2.21.0 || 2013 || {{YES}} ? || {{YES}} || {{YES}} || {{yes}}, factory
|}
|}


Line 411: Line 340:


== Syscon UART ==
== Syscon UART ==
{| class="wikitable"
{| class="wikitable"
! BGA !! Name !! Description
! BGA !! Name !! Description
Line 420: Line 350:
|}
|}


<gallery>
You can attach a 3.3v TTL cable (LV-TTL) to the UART on syscon (UART0_TxD, UART0_RxD). (Convenient solder points are available on JSD-001 / JTP-001 by the NOR test points. They are marked as '?' in [[:File:JSD-001 NOR - nor testpoints.png|marcan' noraliser / judges' NORway install picture]], closest to the ground at the bottom - RX is left, TX is right) Baud rate is 57600. There is a simple plaintext protocol involved. This varies on different syscon models. Example:
File:COK-001 SC UART testpads.jpg|[[COK-001]] SC UART testpads
File:COK-002 SC UART testpads.jpg|[[COK-002]] SC UART testpads
File:SEM-001 SC UART testpads.jpg|[[SEM-001]] SC UART testpads
File:DIA-001 SC UART testpads.jpg|[[DIA-001]] SC UART testpads
File:DIA-002 SC UART testpads.jpg|[[DIA-002]] SC UART testpads
File:VER-001 SC UART testpads.jpg|[[VER-001]] SC UART testpads
File:DYN-001 SC UART testpads.jpg|[[DYN-001]] SC UART testpads
File:SUR-001 SC and SB UART testpads.jpg|[[SUR-001]] SC and SB UART testpads
File:JTP-001 SC and SB UART testpads.jpg|[[JTP-001]] SC and SB UART testpads
File:JSD-001 SC and SB UART testpads.jpg|[[JSD-001]] SC and SB UART testpads
File:KTE-001 SC and SB UART testpads.jpg|[[KTE-001]] SC and SB UART testpads
File:SW3 SC UART testpads.jpg|SW3 SC UART testpads
</gallery>
 
You can attach a 3.3v TTL cable (LV-TTL) to the UART on syscon (UART0_TxD, UART0_RxD). Baud rate is 57600. There is a simple plaintext protocol involved. This varies on different syscon models. Example:


'''<command>:<hash>'''
'''<command>:<hash>'''
Line 536: Line 451:
* Max size of a command on DECR is 135, 140 if you count with C:<hash>:
* Max size of a command on DECR is 135, 140 if you count with C:<hash>:


== Pinouts ==
== Syscon EEPROM (SPI) ==
See:
*https://www.psdevwiki.com/ps3/Template:Syscon_pinout_BGA_200_pads
*https://www.psdevwiki.com/ps3/Template:Syscon_pinout_LQFP_128_pins
*https://www.psdevwiki.com/ps3/Template:Syscon_pinout_LQFP_100_pins


{| class="wikitable" style="float:left; margin:5px;"
{| class="wikitable"
|+Syscon EEPROM (SPI)
! BGA !! Name !! Description
! BGA !! Name !! Description
|-
|-
Line 564: Line 474:
|}
|}


{| class="wikitable" style="float:left; margin:5px;"
== Syscon JTAG ==
|+Syscon BE SPI Bus
 
It is disabled in factory after production on retail models.
 
{| class="wikitable"
! BGA !! Name !! Description
|-
| L8 || JRTCK || Return Test Clock
|-
| K8 || JTCK || Test Clock
|-
| K9 || JTDO || Test Data Out
|-
| L9 || JTMS || Test Mode State / Test Mode Select
|-
| K7 || JTDI || Test Data In
|-
| L7 || JNTRST || Test Reset
|-
|}
 
= Syscon underlying ports =
 
== Syscon BE SPI Bus ==
 
{| class="wikitable"
! BGA !! Name !! Description
! BGA !! Name !! Description
|-
|-
Line 586: Line 520:
|}
|}


{| class="wikitable" style="float:left; margin:5px;"
== Syscon RSX SPI Bus ==
|+Syscon RSX SPI Bus
 
{| class="wikitable"
! BGA !! Name !! Description
! BGA !! Name !! Description
|-
|-
Line 606: Line 541:
|}
|}


{| class="wikitable" style="float:left; margin:5px;"
== Syscon SB SPI Bus ==
|+Syscon SB SPI Bus
 
{| class="wikitable"
! BGA !! Name !! Description
! BGA !! Name !! Description
|-
|-
Line 626: Line 562:
|}
|}


{| class="wikitable" style="float:left; margin:5px;"
<!--// Remote Power ON/OFF (from network, HDMI CEC commands, etc...) is managed by devices connected to the southbridge (ethernet/wifi/BT, HDMI controller, etc...) //-->
|+Syscon JTAG (disabled in factory after production on retail models)
! BGA !! Name !! Description
|-
| L8 || JRTCK || Return Test Clock
|-
| K8 || JTCK || Test Clock
|-
| K9 || JTDO || Test Data Out
|-
| L9 || JTMS || Test Mode State / Test Mode Select
|-
| K7 || JTDI || Test Data In
|-
| L7 || JNTRST || Test Reset
|-
|}
 
= Testpads and alternative solder points =
*The identification of the syscon UART testpads can be made by grouping the motherboard models in a similar way we was doing with the [[Teensy%2B%2B_2.0#Schematics_by_motherboard_.28retail.29| layouts]] of the hardware flashers, there are 7 retail testpads layouts:
**Layout 1 = COK-001, COK-002 (fat, mullion, NAND)
**Layout 2 = SEM-001 (fat, mullion, NAND)
**Layout 3 = DIA-001, DIA-002 (fat, mullion, NOR)
**Layout 4 = VER-001 (fat, sherwood, NOR)
**Layout 5 = DYN-001 (slim, sherwood, NOR)
**Layout 6 = SUR-001, JTP-001, JSD-001, KTE-001 (slim, sherwood, NOR)
**Layout 7 = MSX-001, MPX-001, NPX-001, PPX-001, PQX-001, RTX-001, REX-001 (superslim, sherwood, NOR/eMMC)
 
== DIA-001 and DIA-002 ==
This points are availables to intercept signals by soldering wires, attaching probes, osciloscopes, etc... The photos are only orientatives to follow the traces, there's no need to remove the SYSCON to intercept this signals so can be done while its working
 
All this points has been hardware reverse engineered from a [[CECHHxx|CECHH02]]/[[DIA-00x#DIA-001|DIA-001]] motherboard
{{clear}}
 
=== Topside Pinout ===
<div style="float:right">[[File:syscon_top.jpg|thumbnail|Syscon Top Pinouts<br />[[CECHHxx|CECHH02]]/[[DIA-00x#DIA-001|DIA-001]]]]</div>
 
{|class="wikitable"
! Pin #
! Name
! Description
|-
!B3
|SW_10
|Unknown
|-
!A6
|MC_RESERVED2
|Unknown
|-
!E10
|MUL_CHKSTP_OUT
|Unknown
|-
!C15
|VSS
|Power Ground
|-
!B16
|OSCOUT
|Goes to unpopulated crystal
|-
!C16
|OSCIN
|From unpupulated crystal
|-
!B15
|POW_FAIL
|Power Failure Signal
|-
!H1
|PN5
|Unknown
|-
!H2
|PN6
|Unknown
|-
!R1
|PM7
|Unknown
|-
!R2
|PM6
|Unknown
|-
!M4
|SW9
|Unknown
|-
!M10
|XDR_FET_SCK
|Unknown
|}
 
=== Bottomside Pinout ===
<div style="float:right">[[File:DIA-001 SysCon EPROM Interface.png|thumbnail|[[DIA-001]] [[CECHHxx]] [[SC EEPROM]] Interface]]<br />[[File:syscon_bottom.jpg|thumbnail|Syscon Bottom Pinouts<br />[[CECHHxx|CECHH02]]/[[DIA-00x#DIA-001|DIA-001]]]]<br />[[File:Syscon uart soldered on dia-002.jpg|thumbnail|Syscon UART soldered<br />[[CECHJxx]]/[[CECHKxx]] [[DIA-00x#DIA-002|DIA-002]]]]</div>


{|class="wikitable"
! Pin #
! Name
! Description
|-
!R5
|VDD
| +3.3v
|-
!R7
|DVDD
| +1.8v
|-
!C15
|VSS
|Power Ground
|-
!N16
|DIAG_MODE
|Unknown
|-
!N15
|BACKUP_MODE
|Unknown
|-
!P16
|UART0_TxD
|Serial
|-
!P15
|UART0_RxD
|Serial
|-
!R9
|PQ1
|Unknown
|-
!B12
|POW_SW
|Power Switch
|-
!A12
|EJECT_SW
|Eject Switch
|-
!L7
|JNTAST
|JTAG
|-
!L8
|JRTCK
|JTAG
|-
!L9
|JTMS
|JTAG
|-
!K7
|JTDI
|JTAG
|-
!K8
|JTCK
|JTAG
|-
!K9
|JTDO
|JTAG
|-
!M6
|SW_7_B
|Unknown
|-
!M8
|FANPWM1
|Unknown
|-
!E5
|GX_VSRT
|Unknown
|-
!B5
|DVE_RST
|Unknown
|-
!G4
|HDMI_RST1
|Unknown
|-
!D4
|XDR_FET_RST
|Unknown
|}


{{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude>
{{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude>
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