Editing Syscon Hardware
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== Syscon Pinouts == | |||
Taken from a CECHG02 | |||
[[File:syscon_top.jpg|thumbnail|Alt=Syscon Top Pinouts]] | |||
[[File:syscon_bottom.jpg|thumbnail|Alt=Syscon Bottom Pinouts]] | |||
Topside: | |||
B3 SW_10 | |||
A6 MC_RESERVED2 | |||
E10 MUL_CHKSTP_OUT | |||
C15 VS - Power Ground | |||
B16 OSCOUT - Goto unpopulated crystal | |||
C16 OSCIN - ^^ | |||
B15 POW_FAIL | |||
H1 PN5 | |||
H2 PN6 | |||
R1 PM7 | |||
R2 PM6 | |||
M4 SW9 | |||
M10 XDR_FET_SCK | |||
Bottomside: | |||
R5 VDD (+3.3v) | |||
R7 DVDD (+1.8v) | |||
C15 VSS (GND) | |||
N16 DIAG_MODE (Untested) | |||
N15 BACKUP_MODE (Untested) | |||
P16 UART0_TxD (Serial) | |||
P15 UART0_RxD (Serial) | |||
R9 PQ1 | |||
B12 POW_SW - Switches on front | |||
A12 EJECT_SW - ^^ | |||
L7 JNTAST - JTAG | |||
L8 JRTCK - JTAG | |||
L9 JTMS - JTAG | |||
K7 JTDI - JTAG | |||
K8 JTCK - JTAG | |||
K9 JTDO - JTAG | |||
M6 SW_7_B | |||
M8 FANPWM1 | |||
E5 GX_VSRT | |||
B5 DVE_RST | |||
G4 HDMI_RST1 | |||
D4 XDR_FET_RST | |||