Editing Syscon Hardware
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<div style="float:right">[[File: | <div style="float:right">[[File:SYSCON_GEN1.JPG|thumb|Syscon 1st Generation (BGA Packaging)]]<br />[[File:Pyramid Syscon live probing.jpg|thumb|Pyramid Syscon live probing]]</div> | ||
Syscon is the main power controller chip of the PS3. It is responsible for powering up the various power systems and for configuring and initialising the [[CELL BE|BE]], [[RSX]] and [[South Bridge|SB]] via dedicated SPI buses. The Syscon is a SoC and based on a ARM7TDMI-S (in the [[Mullion]] syscons) or a NEC 78K0R (in the [[Sherwood]] syscons) design. There is external access by "JTAG" (disabled from factory on retail models), an EEPROM programming interface (only on Mullion) and Serial (UART). | |||
= Serialnumbers per SKU = | |||
== Retail == | |||
{| class="wikitable" | |||
{| class="wikitable" | |||
|- | |- | ||
! colspan=5 | [[SKU Models|Console]] & [[Motherboard Revisions|Motherboard]] compatibility !! colspan=7 | [[Syscon Hardware|Syscon]] | |||
|- | |- | ||
! [[CECHAxx]]<br>[[CECHBxx]] !! [[CECHCxx]]<br>[[CECHExx]] !! [[CECHGxx]] !! [[CECHHxx]] !! [[CECHJxx]]<br>[[CECHKxx]] !! rowspan=2 | Model !! rowspan=2 | [[More System Information#First_section|SoftID]] !! colspan=4 | Memory !! rowspan=2 | Default platform config & notes | |||
|- | |- | ||
! [[COK-001]] !! [[COK-002]] !! [[SEM-001]] !! [[DIA-001]] !! [[DIA-002]] !! ROM !! FLASH !! EEPROM !! RAM | |||
|- | |- | ||
| | | {{yes}} (factory) || {{no}} || {{no}} || {{no}} || {{no}} || [[CXR713120-201GB]] || 0B8E || rowspan=7 | 384KB || rowspan=7 {{no}}|| rowspan=3 | 32KB || rowspan=7 | 64KB || | ||
|- | |- | ||
| | | {{YES}} || {{yes}} (factory) || {{no}} || {{no}} || {{no}} || [[CXR713120-202GB]] || 0C16 || | ||
|- | |- | ||
| | | {{YES}} || {{YES}} || {{yes}} (factory) || {{no}} || {{no}} || [[CXR713120-203GB]] || 0D52 || | ||
|- | |- | ||
| <abbr title=" | | {{YES}} || {{yes}} (<abbr title="CECHE01 MG (Metal Gear Solid 4 edition)">special ed.</abbr>) || {{YES}} || {{yes}} (factory) || {{no}} || [[CXR714120-301GB]] || 0DBF || rowspan=4 | 20KB || | ||
|- | |- | ||
| | | {{YES}} || {{YES}} || {{YES}} || {{YES}} || {{yes}} (factory) || [[CXR714120-302GB]] || 0E69 || | ||
|- | |- | ||
| | | {{YES}} || {{yes}} (refurb) || {{YES}} || {{YES}} || {{YES}} || [[CXR714120-303GB]] || 0F29 || [[CECHCxx]]/[[COK-002]] Refurbished, new 65nm RSX, new syscon | ||
|- | |- | ||
| | | {{yes}} (refurb) || {{YES}} || {{YES}} || {{YES}} || {{YES}} || [[CXR714120-304GB]] || 0F38 || [[CECHAxx]]/[[COK-001]] Refurbished, new 40nm RSX, new syscon | ||
|- | |- | ||
| | |} | ||
{| class="wikitable" | |||
|- | |- | ||
| | ! colspan=3 | PS3 !! colspan=6 | [[Syscon Hardware|Syscon]] !! rowspan=2 | Notes | ||
|- | |- | ||
| | ! [[SKU Models|Model]] !! [[Product Sub Code]] !! [[Motherboard Revisions|Motherboard]] !! Model !! [[More System Information#First_section|SoftID]] !! ROM !! FLASH !! EEPROM !! RAM | ||
|- | |- | ||
| | | [[CECHLxx]]<br />[[CECHMxx]]<br />[[CECHPxx]]<br />[[CECHQxx]] || 0x08 || [[VER-001]] || [[SW-301]] or<br />[[SW-302]] || 065D || N/A || 512KB || N/A || 50KB || | ||
|- | |- | ||
| | | [[CECH-20xx]] || 0x09 || [[DYN-001]] || [[SW2-301]] || 0832 || rowspan=10 | N/A || rowspan=10 | 768KB || rowspan=10 | N/A || rowspan=10 | 50KB || | ||
|- | |- | ||
| | | [[CECH-21xx]] || 0x0A || [[SUR-001]] || [[SW2-301]] or<br />[[SW2-302]] || 08A0 || | ||
|- | |- | ||
| | | [[CECH-25xx]] || 0x0B || [[JTP-001]] or<br />[[JSD-00x|JSD-001]] || [[SW2-301]] or<br />[[SW2-302]] or<br />[[SW2-303]] || 08C2 || | ||
|- | |- | ||
| | | [[CECH-30xx]] || 0x0C || [[KTE-001]] || [[SW3-301]] || 0918 || | ||
|- | |- | ||
| | | [[CECH-40xx]] || 0x0D || [[MSX-001]] or<br />[[MPX-00x|MPX-001]] || [[SW3-302]] || 098F || | ||
|- | |- | ||
| | | [[CECH-42xx]] || ? || [[NPX-001]] || ? || ? || | ||
|- | |- | ||
| | | [[CECH-42xx]] || ? || [[PPX-001]] || ? || ? || | ||
|- | |- | ||
| | | [[CECH-42xx]]A || ? || [[PQX-001]] || [[SW3-304]] || ? || | ||
|- | |- | ||
| [[CECH-43xx]] || ? || [[RTX-001]] || ? || ? || | |||
|- | |- | ||
| [[CECH-43xx]] || ? || [[REX-001]] || ? || ? || | |||
|- | |- | ||
|} | |} | ||
*Notes | |||
**There is no mention in wiki about [[SW3-303]] but probably was used in the early PS3 [[CECH-42xx]] models | |||
== Non retail == | |||
{| class="wikitable sortable" | |||
|- | |- | ||
! [[ | ! [[SKU Models|Model]] !! [[Product Sub Code]] !! [[Motherboard Revisions|Motherboard]] !! [[Syscon Hardware|Syscon<br />part no.]] !! Syscon<br />[[More System Information#First_section|Soft ID]] !! Active JTAG !! Notes | ||
|- | |- | ||
| [[CEB-2040]] || - || [[MPU-501]] || CXR713F120<abbr title="A ?">..</abbr> '''GB-000''' || ? || ?No? || Retail prototype. See [[Talk:CXR713F120A]] | |||
| <abbr title=" | |||
|- | |- | ||
| [[DEH-H1001-D]] || 0x01 || [[COOKIE-13]] || [[CXR713F120A]] '''GB-???''' || 0B67 || No || Preproduction. See [[Talk:CXR713F120A]] | |||
| | |||
|- | |- | ||
| [[DEH-H1000A(S)(-E(S))]] || 0x01 || [[COK-001 (Prototype)]] || [[CXR713F120A]] '''GB-???''' || 0B67 || No || Preproduction. See [[Talk:CXR713F120A]] | |||
| | |||
|- | |- | ||
| [[DECR-1000|DECR1000(A/J)]] || 0x01 || [[TMU-520]] || [[CXR713F120A]] '''GB-101''' || 0F3B || No || Reference tool. See [[Talk:CXR713F120A]] | |||
| | |||
|- | |- | ||
| [[DECR-1400|DECR1400(A/J)]] || 0x01 || [[DEB-001]] || [[CXR714120-302GB]] || ? || ? || Reference tool | |||
| | |||
|- | |- | ||
| [[DEH-FH1500J-A]] || 0x08 || [[VERTIGO-02]] || D79F0073 ([[SW-301]]) || 0658 || ?Yes? || Preproduction | |||
|- | |- | ||
| [[DEH-ML00AK-G]] || 0x0D || [[MPX-001 (Prototype) ]] || D79F0123 ([[SW3-302]]) || 098F || ?No? || Preproduction | |||
| | |||
|- | |- | ||
| [[DECHA|DECHA00A/J]] || 0x01 || [[COK-001]] || [[CXR713120-201GB]] ? || 0C16 || No || Found when searching for 40nm RSX | |||
| | |||
|- | |- | ||
! | <!-- Not Prototype debug units - see retail --> | ||
|} | |} | ||
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== Syscon UART == | == Syscon UART == | ||
<div style="float:right">[[File:PCI connector JSD-001 SB and SC UART.jpg|200px|thumb|left|Syscon and southbridge UART testpads in the [[PCI]] connector of a [[JSD-001]] motherboard]]</div> | |||
{| class="wikitable" | {| class="wikitable" | ||
! BGA !! Name !! Description | ! BGA !! Name !! Description | ||
Line 420: | Line 351: | ||
|} | |} | ||
You can attach a 3.3v TTL cable (LV-TTL) to the UART on syscon (UART0_TxD, UART0_RxD). (Convenient solder points are available on JSD-001 / JTP-001 by the NOR test points. They are marked as '?' in [[:File:JSD-001 NOR - nor testpoints.png|marcan' noraliser / judges' NORway install picture]], closest to the ground at the bottom - RX is left, TX is right) Baud rate is 57600. There is a simple plaintext protocol involved. This varies on different syscon models. Example: | |||
File:JSD-001 | |||
'''<command>:<hash>''' | '''<command>:<hash>''' | ||
Line 536: | Line 452: | ||
* Max size of a command on DECR is 135, 140 if you count with C:<hash>: | * Max size of a command on DECR is 135, 140 if you count with C:<hash>: | ||
== | == Syscon EEPROM (SPI) == | ||
{| class="wikitable" | {| class="wikitable" | ||
! BGA !! Name !! Description | ! BGA !! Name !! Description | ||
|- | |- | ||
Line 564: | Line 475: | ||
|} | |} | ||
{| class="wikitable" | == Syscon JTAG == | ||
It is disabled in factory after production on retail models. | |||
{| class="wikitable" | |||
! BGA !! Name !! Description | |||
|- | |||
| L8 || JRTCK || Return Test Clock | |||
|- | |||
| K8 || JTCK || Test Clock | |||
|- | |||
| K9 || JTDO || Test Data Out | |||
|- | |||
| L9 || JTMS || Test Mode State / Test Mode Select | |||
|- | |||
| K7 || JTDI || Test Data In | |||
|- | |||
| L7 || JNTRST || Test Reset | |||
|- | |||
|} | |||
= Syscon underlying ports = | |||
== Syscon BE SPI Bus == | |||
{| class="wikitable" | |||
! BGA !! Name !! Description | ! BGA !! Name !! Description | ||
|- | |- | ||
Line 586: | Line 521: | ||
|} | |} | ||
{| class="wikitable" | == Syscon RSX SPI Bus == | ||
{| class="wikitable" | |||
! BGA !! Name !! Description | ! BGA !! Name !! Description | ||
|- | |- | ||
Line 606: | Line 542: | ||
|} | |} | ||
{| class="wikitable" | == Syscon SB SPI Bus == | ||
{| class="wikitable" | |||
! BGA !! Name !! Description | ! BGA !! Name !! Description | ||
|- | |- | ||
Line 626: | Line 563: | ||
|} | |} | ||
<!--// Remote Power ON/OFF (from network, HDMI CEC commands, etc...) is managed by devices connected to the southbridge (ethernet/wifi/BT, HDMI controller, etc...) //--> | |||
{{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> | {{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude> |