Editing GL852

<div style="float:right">[[File:CECHC GL852- IC3305.JPG|200px|thumb|left|[[GL852]] USB-Hub 64-pin as seen on [[CECHCxx]]]]</div>
<div style="float:right">[[File:Genesys-GL852-MSG-LQFP64.png|200px|thumb|left|64pin LQFP<br />Genesys GL852-MSG02-MT]]</div>
<div style="float:right">[[File:Genesys-GL852-MSG-QFN48.png|200px|thumb|left|48pin QFN<br />Genesys GL852]]</div>

=== GL852-MSG02-MT (USB-Hub 64pin) ===
Part Number: 6-806-862-01 / IC3305 <br />
Datasheet: http://web.archive.org/web/*/http://ps3devwiki.com/files/documents/-Datasheets/USB/Genesys_Logic_GL852.pdf <br />
*Used in PS3 models:
**[[CECHAxx]], [[CECHBxx]] (with [[COK-001]] motherboard)

{| border="1" cellspacing="0" cellpadding="5" border="#999" class="wikitable sortable" style="border:1px solid #999; border-collapse: collapse;" 
|- bgcolor="#cccccc"
! Pin Name !! 64 Pin# !! 48Pin# !! I/O Type !! Description 
|-
| DM0,DP0 || 3,4 || 3,4 || B || USB signals for USPORT 
|-
| DM1,DP1 || 8,9 || 5,6 || B || USB signals for DSPORT1 
|-
| DM2,DP2 || 14,15 || 9,10 || B || USB signals for DSPORT2 
|-
| DM3,DP3 || 25,26 || 17,18 || B || USB signals for DSPORT3 
|-
| DM4,DP4 || 31,32 || 21,22 || B || USB signals for DSPORT4 
|-
| RREF || 17 || 11 || B || A 680Ω resister must be connected between RREF and analog ground (AGND). 
|-
| OVCUR1#~4 || 56,54,42,40 || 42,40,30,28 || I<br />(pu) || Active low. Over current indicator for DSPORT1~4 OVCUR1# is the only over current flag for GANG mode. 
|-
| PWREN1#~4 || 57,55,43,41 || 43,41,31,29 || O || Active low. Power enable output for DSPORT1~4 <br />PWREN1# is the only power-enable output for GANG mode. 
|-
| GREEN1~4 || 60,48,44,34 || 45,35,32,23 || 1,3,4: O<br />2: B<br />(pd) || Green LED indicator for DSPORT1~4<br />*GREEN[1~2] are also used to access the external EEPROM. For detailed information, please refer to Chapter 5. 
|-
| AMBER1~4 || 61,49,45,35 || 46,36,33,24 || O<br />(pd) || Amber LED indicator for DSPORT1~4<br />*Amber [1~2] are also used to access the external EEPROM
|-
| PSELF || 50 || 37 || I || 0: GL852 is bus-powered.<br /> 1: GL852 is self-powered.
|-
| PGANG/<br />SUSPND || 53 || 39 || B || This pin is default put in input mode after power-on reset. Individual/gang mode is strapped during this period. After the strapping period, this pin will be set to output mode, and then output high for normal mode. When GL852 is suspended, this pin will output low. *For detailed explanation, please see Chapter 5<br />
Gang       input:1, output: 0@normal, 1@suspend <br />
Individual   input:0, output: 1@normal, 0@suspend 
|-
| X1 || 20 || 14 || I || 12MHz crystal clock input. 
|-
| X2 || 21 || 15 || O || 12MHz crystal clock output. 
|-
| RESET# || 38 || 26 || I || Active low. External reset input, default pull high 10KΩ. When RESET# = low, whole chip is reset to the initial state. 
|-
| TEST || 39 || 27 || I<br />(pd) || 0: Normal operation.<br />1: Chip will be put in test mode. 
|-
| AVDD || 11,18,22,28,64 || 1,7,12,16,19 || P || 3.3V analog power input for analog circuits. 
|-
| AGND || 1,12,19,23,29 || 2,8,13,20 || P || Analog ground input for analog circuits. 
|-
| DVDD || 37,47,52,59 || 25,34,38,44,48 || P || 3.3V digital power input for digital circuits 
|-
| DGND || 36,46,51,58,62 || 47 || P || Digital ground input for digital circuits. 
|-
| NC || 2,5~7,10,13,16,24,27,30,33 || - || - || No connection 
|-
|}
<pre> Type
 O     Output 
 I     Input 
 B     Bi-directional 
 B/I   Bi-directional, default input 
 B/O   Bi-directional, default output 
 P     Power / Ground 
 A     Analog 
 SO    Automatic output low when suspend
 pu    Internal pull up 
 pd    Internal pull down 
 odpu  Open drain with internal pull up</pre>

=== GL852 (USB-Hub 64pin) ===
*Used in PS3 models:
**[[CECHCxx]], [[CECHExx]] (with [[COK-002]] motherboard)
**Probably same pinout than GL852-MSG02-MT ...in other words the same part number

=== GL852 (USB-Hub 48pin) ===
*Used in PS3 models:
**[[CECHGxx]] (with [[SEM-001]] motherboard)
**[[CECHHxx]] (with [[DIA-001]] motherboard)
**[[CECHJxx]], [[CECHKxx]] (with [[DIA-002]] motherboard)
**[[CECHLxx]], [[CECHMxx]], [[CECHPxx]], [[CECHQxx]] (with [[VER-001]] motherboard)

{{Motherboard Components}}<noinclude>[[Category:Main]]</noinclude>