Editing Documented SPU Channels

== List of channels ==
{| class="wikitable"
|-
!Channel Name
!Number (hex)
!Notes
|-
|SPU Write Outbound Interrupt Mailbox
|0x1E
|
|-
|SPU Read Inbound Mailbox
|0x1D
|
|-
|SPU Write Outbound Mailbox
|0x1C
|
|-
|MFC Read Atomic Command Status
|0x1B
|
|-
|MFC Write List Stall-and-Notify Tag Acknowledgment
|0x1A
|
|-
|MFC Read List Stall-and-Notify Tag Status
|0x19
|
|-
|MFC Read Tag Group Status
|0x18 
|
|-
|MFC Write Tag Status Update Request
|0x17 
|
|-
|MFC Write Tag Group Query Mask
|0x16 
|
|-
|MFC Command Opcode
|0x15 
|lower 16 bits
|-
|MFC Class ID
|0x15 
|upper 16 bits
|-
|MFC Tag ID
|0x14 
|
|-
|MFC Transfer Size or List Size
|0x13 
|
|-
|MFC Effective Address Low or List Address
|0x12 
|
|-
|MFC Effective Address High
|0x11 
|
|-
|MFC LS Address
|0x10 
|
|-
|SPU Read State Save-and-Restore
|0x0F 
|
|-
|SPU Write State Save-and-Restore
|0x0E 
|
|-
|SPU Read Machine Status
|0x0D 
|
|-
|MFC Read Tag Group Query Mask Channel
|0x0C 
|
|-
|SPU Read Event Mask
|0x0B 
|
|-
|MFC Write Multisource Synchronization Request
|0x09 
|
|-
|SPU Read Decrementer
|0x08 
|
|-
|SPU Write Decrementer
|0x07 
|
|-
|SPU Signal Notification 2
|0x04 
|
|-
|SPU Signal Notification 1
|0x03 
|
|-
|SPU Write Event Acknowledgment
|0x02 
|
|-
|SPU Write Event Mask
|0x01 
|
|-
|SPU Read Event Status
|0x00 
|
|-
|}

* The rest of the 64 channels are reserved.
* There is a total of 128 channels (64 documented channels and 64 undocumented ones)