Editing CXM4024R
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| 31 || {{cellcolors|#6666ff|#ffff00}} RESET || <strike>VO_RST1 ? / Connected to [[RSX]] pad AK38 ([[Template:RSX pad layout 41x41|RSX layout 41x41]]) ?</strike> or<br>Connected to [[Syscon Hardware|Syscon]] pad B5 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) | | 31 || {{cellcolors|#6666ff|#ffff00}} RESET || <strike>VO_RST1 ? / Connected to [[RSX]] pad AK38 ([[Template:RSX pad layout 41x41|RSX layout 41x41]]) ?</strike> or<br>Connected to [[Syscon Hardware|Syscon]] pad B5 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]) | ||
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| 32 || {{cellcolors|#f6f}} NTPAL || | | 32 || {{cellcolors|#f6f}} NTPAL || NT_PL00 ? / Connected to [[RSX]] pad AU33 ([[Template:RSX pad layout 41x41|RSX layout 41x41]]) or<br>NT_PL01 ? / Connected to [[RSX]] pad AA37 ([[Template:RSX pad layout 41x41|RSX layout 41x41]]) ? | ||
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| 33 || {{cellcolors|#333|#fff}} VSS || | | 33 || {{cellcolors|#333|#fff}} VSS || | ||
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| 34 || {{cellcolors|#f6f}} FLD0 || | | 34 || {{cellcolors|#f6f}} FLD0 || FLDO0 ? / Connected to [[RSX]] pad AW22 ([[Template:RSX pad layout 41x41|RSX layout 41x41]]) ? | ||
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| 35 || {{cellcolors|#6666ff|#ffff00}} SCL / DVE_I2C_SCL || Connected to [[Syscon Hardware|Syscon]] pad A10 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin 121 ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) | | 35 || {{cellcolors|#6666ff|#ffff00}} SCL / DVE_I2C_SCL || Connected to [[Syscon Hardware|Syscon]] pad A10 ([[Template:Syscon_pinout_BGA_200_pads|BGA 200 pads layout]]), or pin 121 ([[Template:Syscon_pinout_LQFP_128_pins|LQFP 128 pins layout]]) |