Memory Map

EE Virtual/Physical Memory Map

• KUSEG: 00000000h-7FFFFFFFh User segment
• KSEG0: 80000000h-9FFFFFFFh Kernel segment 0
• KSEG1: A0000000h-BFFFFFFFh Kernel segment 1
• KSSEG: C0000000h-DFFFFFFFh Supervisor segment
• KSEG3: E0000000h-FFFFFFFFh Kernel segment 3

Virtual	Physical	Size	Description
00000000h	00000000h	32 MB	Main RAM (first 1 MB reserved for kernel)
20000000h	00000000h	32 MB	Main RAM, uncached
30100000h	00100000h	31 MB	Main RAM, uncached and accelerated
10000000h	10000000h	64 KB	I/O registers
11000000h	11000000h	4 KB	VU0 code memory
11004000h	11004000h	4 KB	VU0 data memory
11008000h	11008000h	16 KB	VU1 code memory
1100C000h	1100C000h	16 KB	VU1 data memory
12000000h	12000000h	8 KB	GS privileged registers
1C000000h	1C000000h	2 MB	IOP RAM
1FC00000h	1FC00000h	4 MB	BIOS, uncached (rom0)
9FC00000h	1FC00000h	4 MB	BIOS, cached (rom09)
BFC00000h	1FC00000h	4 MB	BIOS, uncached (rom0b)
70000000h	---------	16 KB	Scratchpad RAM (only accessible via virtual addressing)

IOP Physical Memory Map

• KUSEG: 00000000h-7FFFFFFFh User segment
• KSEG0: 80000000h-9FFFFFFFh Kernel segment 0
• KSEG1: A0000000h-BFFFFFFFh Kernel segment 1

Physical	Size	Description
00000000h	2 MB	Main RAM (same as on PSX)
1D000000h		SIF registers
1F800000h	64 KB	Various I/O registers
1F900000h	1 KB	SPU2 registers
1FC00000h	4 MB	BIOS (rom0) - Same as EE BIOS
FFFE0000h		Cache control (KSEG2)

Hardware Mapped Registers

EE Map

EE Timers

Timer 0
Address	Size	Description
10000000h		T0_COUNT
10000010h		T0_MODE
10000020h		T0_COMP
10000030h		T0_HOLD
Timer 1
Address	Size	Description
10000800h		T1_COUNT
10000810h		T1_MODE
10000820h		T1_COMP
10000830h		T1_HOLD
Timer 2
Address	Size	Description
10001000h		T2_COUNT
10001010h		T2_MODE
10001020h		T2_COMP
Timer 3
Address	Size	Description
10001800h		T3_COUNT
10001810h		T3_MODE
10001820h		T3_COMP

Image Processing Unit (IPU)

Address	Size	Description
10002000h	8h	IPU Command
10002010h	4h	IPU Control
10002020h	4h	IPU bit pointer control
10002030h	8h	Top of bitstream
10007000h	10h	Out FIFO (read)
10007010h	10h	In FIFO (write)

Graphics Interface (GIF)

Address	Size	Description
10003000h	4h	GIF_CTRL - Control register
10003010h	4h	GIF_MODE - Mode setting
10003020h	4h	GIF_STAT - Status
10003040h	4h	GIF_TAG0 - Bits 0-31 of tag before
10003050h	4h	GIF_TAG1 - Bits 32-63 of tag before
10003060h	4h	GIF_TAG2 - Bits 64-95 of tag before
10003070h	4h	GIF_TAG3 - Bits 96-127 of tag before
10003080h	4h	GIF_CNT - Transfer status counter
10003090h	4h	GIF_P3CNT - PATH3 transfer status counter
100030A0h	4h	GIF_P3TAG - Bits 0-31 of PATH3 tag when interrupted
10006000h	10h	GIF FIFO

DMA Controller (DMAC)

VIF0 - Channel 0
Address	Size	Description
10008000h	4h	D0_CHCR
10008010h	4h	D0_MADR
10008020h	4h	D0_QWC
10008030h	4h	D0_TADR
10008040h	4h	D0_ASR0
10008050h	4h	D0_ASR1
VIF1 - Channel 1
Address	Size	Description
10009000h	4h	D1_CHCR
10009010h	4h	D1_MADR
10009020h	4h	D1_QWC
10009030h	4h	D1_TADR
10009040h	4h	D1_ASR0
10009050h	4h	D1_ASR1
GIF - Channel 2
Address	Size	Description
1000A000h	4h	D2_CHCR
1000A010h	4h	D2_MADR
1000A020h	4h	D2_QWC
1000A030h	4h	D2_TADR
1000A040h	4h	D2_ASR0
1000A050h	4h	D2_ASR1
from IPU - Channel 3
Address	Size	Description
1000B000h	4h	D3_CHCR
1000B010h	4h	D3_MADR
1000B020h	4h	D3_QWC
to IPU - Channel 4
Address	Size	Description
1000B400h	4h	D4_CHCR
1000B410h	4h	D4_MADR
1000B420h	4h	D4_QWC
1000B430h	4h	D4_TADR
SIF0 - Channel 5
Address	Size	Description
1000C000h	4h	D5_CHCR
1000C010h	4h	D5_MADR
1000C020h	4h	D5_QWC
SIF1 - Channel 6
Address	Size	Description
1000C400h	4h	D6_CHCR
1000C410h	4h	D6_MADR
1000C420h	4h	D6_QWC
1000C430h	4h	D6_TADR
SIF2 - Channel 7
Address	Size	Description
1000C800h	4h	D7_CHCR
1000C810h	4h	D7_MADR
1000C820h	4h	D7_QWC
from SPR - Channel 8
Address	Size	Description
1000D000h	4h	D8_CHCR
1000D010h	4h	D8_MADR
1000D020h	4h	D8_QWC
1000D080h	4h	D8_SADR
to SPR - Channel 9
Address	Size	Description
1000D400h	4h	D9_CHCR
1000D410h	4h	D9_MADR
1000D420h	4h	D9_QWC
1000D430h	4h	D9_TADR
1000D480h	4h	D9_SADR
Common Registers
Address	Size	Description
1000E000h	4h	D_CTRL - DMAC control
1000E010h	4h	D_STAT - DMAC interrupt status
1000E020h	4h	D_PCR - DMAC priority control
1000E030h	4h	D_SQWC - DMAC skip quadword
1000E040h	4h	D_RBSR - DMAC ringbuffer size
1000E050h	4h	D_RBOR - DMAC ringbuffer offset
1000E060h	4h	D_STADR - DMAC stall address
1000F520h	4h	D_ENABLER - DMAC disabled status
1000F590h	4h	D_ENABLEW - DMAC disable

Interrupt Controller (INTC)

Address	Size	Description
1000F000h	4h	INTC_STAT - Interrupt status
1000F010h	4h	INTC_MASK - Interrupt mask

Subsystem Interface (SIF)

Address	Size	Description
1000F200h	4h	MSCOM - EE->IOP communication
1000F210h	4h	SMCOM - IOP->EE communication
1000F220h	4h	MSFLAG - EE->IOP flags
1000F230h	4h	SMFLAG - IOP->EE flags
1000F240h	4h	Control register

Privileged GS registers

Address	Size	Description
12000000h	8h	PMODE - various PCRTC controls
12000010h	8h	SMODE1
12000020h	8h	SMODE2
12000030h	8h	SRFSH
12000040h	8h	SYNCH1
12000050h	8h	SYNCH2
12000060h	8h	SYNCV
12000070h	8h	DISPFB1 - display buffer for output circuit 1
12000080h	8h	DISPLAY1 - output circuit 1 control
12000090h	8h	DISPFB2 - display buffer for output circuit 2
120000A0h	8h	DISPLAY2 - output circuit 2 control
120000B0h	8h	EXTBUF
120000C0h	8h	EXTDATA
120000D0h	8h	EXTWRITE
120000E0h	8h	BGCOLOR - background color
12001000h	8h	GS_CSR - control register
12001010h	8h	GS_IMR - GS interrupt control
12001040h	8h	BUSDIR - transfer direction
12001080h	8h	SIGLBLID - signal

IOP Map

Subsystem Interface (SIF)

Address	Size	Description
1D000000h	4h	MSCOM - EE->IOP communication
1D000010h	4h	SMCOM - IOP->EE communication
1D000020h	4h	MSFLAG - EE->IOP flags
1D000030h	4h	SMFLAG - IOP->EE flags
1D000040h	4h	Control register

CDVD Drive

Address	Size	Description
1F402004h	1h	Current N command
1F402005h	1h	N command status (R)
1F402005h	1h	N command params (W)
1F402006h	1h	Error
1F402007h	1h	Send BREAK command
1F402008h	1h	CDVD I_STAT - interrupt register
1F402009h	1h	MSF mode
1F40200Ah	1h	Drive status
1F40200Bh	1h	Drive sticky status
1F40200Ch	1h	Minute
1F40200Dh	1h	Second
1F40200Eh	1h	Frame
1F40200Fh	1h	Disk type
1F402013h	1h	Spindle control
1F402014h	1h	Mechacon compatibility commands (only for emulation in ps1 mode?)
1F402016h	1h	Current S command
1F402017h	1h	S command status
1F402018h	1h	S command params
1F402038h	1h	Cdvd key is valid (heavily used by SCCS region)

Interrupt Control

Address	Size	Description
1F801070h	4h	I_STAT - Interrupt status
1F801074h	4h	I_MASK - Interrupt mask
1F801078h	1h	I_CTRL - Global interrupt disable

DMA registers

MDECin - channel 0
Address	Size	Description
1F801080h	4h	D0_MADR
1F801084h	4h	D0_BCR
1F801088h	4h	D0_CHCR
MDECout - channel 1
Address	Size	Description
1F801090h	4h	D1_MADR
1F801094h	4h	D1_BCR
1F801098h	4h	D1_CHCR
SIF2 (GPU) - channel 2
Address	Size	Description
1F8010A0h	4h	D2_MADR
1F8010A4h	4h	D2_BCR
1F8010A8h	4h	D2_CHCR
CDVD - channel 3
Address	Size	Description
1F8010B0h	4h	D3_MADR
1F8010B4h	4h	D3_BCR
1F8010B8h	4h	D3_CHCR
SPU2 Core0 - channel 4
Address	Size	Description
1F8010C0h	4h	D4_MADR
1F8010C4h	4h	D4_BCR
1F8010C8h	4h	D4_CHCR
PIO - channel 5
Address	Size	Description
1F8010D0h	4h	D5_MADR
1F8010D4h	4h	D5_BCR
1F8010D8h	4h	D5_CHCR
OTC - channel 6
Address	Size	Description
1F8010E0h	4h	D6_MADR
1F8010E4h	4h	D6_BCR
1F8010E8h	4h	D6_CHCR
SPU2 Core1 - channel 7
Address	Size	Description
1F801500h	4h	D7_MADR
1F801504h	4h	D7_BCR
1F801508h	4h	D7_CHCR
DEV9 - channel 8
Address	Size	Description
1F801510h	4h	D8_MADR
1F801514h	4h	D8_BCR
1F801518h	4h	D8_CHCR
SIF0 - channel 9
Address	Size	Description
1F801520h	4h	D9_MADR
1F801524h	4h	D9_BCR
1F801528h	4h	D9_CHCR
1F80152Ch	4h	D9_TADR
SIF1 - channel 10
Address	Size	Description
1F801530h	4h	D10_MADR
1F801534h	4h	D10_BCR
1F801538h	4h	D10_CHCR
SIO2in - channel 11
Address	Size	Description
1F801540h	4h	D11_MADR
1F801544h	4h	D11_BCR
1F801548h	4h	D11_CHCR
SIO2out - channel 12
Address	Size	Description
1F801550h	4h	D12_MADR
1F801554h	4h	D12_BCR
1F801558h	4h	D12_CHCR
Common Registers
1F8010F0h	4h	DPCR - DMA priority control
1F8010F4h	4h	DICR - DMA interrupt control
1F801570h	4h	DPCR2 - DMA priority control 2
1F801574h	4h	DICR2 - DMA priority control 2
1F801578h	4h	DMACEN - Global DMA Enable
1F80157Ch	4h	DMACINTEN - Global DMA Interrupt Enable

IOP Timers

Timer 0
Address	Size	Description
1F801100h		T0_COUNT
1F801104h		T0_MODE
1F801108h		T0_TARGET
Timer 1
Address	Size	Description
1F801110h		T1_COUNT
1F801114h		T1_MODE
1F801118h		T1_TARGET
Timer 2
Address	Size	Description
1F801120h		T2_COUNT
1F801124h		T2_MODE
1F801128h		T2_TARGET
Timer 3
Address	Size	Description
1F801480h		T3_COUNT
1F801484h		T3_MODE
1F801488h		T3_TARGET
Timer 4
Address	Size	Description
1F801490h		T4_COUNT
1F801494h		T4_MODE
1F801498h		T4_TARGET
Timer 5
Address	Size	Description
1F8014A0h		T5_COUNT
1F8014A4h		T5_MODE
1F8014A8h		T5_TARGET

Serial Interface (SIO2)

Address	Size	Description
1F808200h	40h	SEND3 buffer
1F808240h	20h	SEND1/2 buffers
1F808260h	1h	In FIFO
1F808264h	1h	Out FIFO
1F808268h	4h	SIO2 control
1F80826Ch	4h	RECV1
1F808270h	4h	RECV2
1F808274h	4h	RECV3

Sound Processing Unit (SPU2)

Core 0
Address	Size	Description
1F900000h	180h	Core0 Voice 0-23 registers
1F900190h	4h	Key ON 0/1
1F900194h	4h	Key OFF 0/1
1F90019Ah	2h	Core attributes
1F90019Ch	4h	Interrupt address H/L
1F9001A8h	4h	DMA transfer address H/L
1F9001ACh	2h	Internal transfer FIFO
1F9001B0h	2h	AutoDMA status
1F9001C0h	120h	Core0 Voice 0-23 start/loop/next addresses
1F900340h	4h	ENDX 0/1
1F900344h	2h	Status register
Core 1
Address	Size	Description
1F900400h	180h	Core1 Voice 0-23 registers
1F900590h	4h	Key ON 0/1
1F900594h	4h	Key OFF 0/1
1F90059Ah	2h	Core attributes
1F90059Ch	4h	Interrupt address H/L
1F9005A8h	4h	DMA transfer address H/L
1F9005ACh	2h	Internal transfer FIFO
1F9005B0h	2h	AutoDMA status
1F9005C0h	120h	Core1 Voice 0-23 start/loop/next addresses
1F900740h	4h	ENDX 0/1
1F900744h	2h	Status register
Misc
Address	Size	Description
1F900760h	2h	Master Volume Left
1F900762h	2h	Master Volume Right
1F900764h	2h	Effect Volume Left
1F900766h	2h	Effect Volume Right
1F900768h	2h	Core1 External Input Volume Left
1F90076Ah	2h	Core1 External Input Volume Right

References

• https://psi-rockin.github.io/ps2tek/#memorymap
• https://problemkaputt.de/psx-spx.htm#memorymap