Service Connectors: Difference between revisions

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! Pin !! Name !! Description
! Pin !! Name !! Description !! Notes
|-
|-
| 1 || GND ||  
| 1 || GND || ||
|-
|-
| 2 ||  || Connected to JL Pin (Bottom left 1st)
| 2 ||  || Connected to JL Pin (Bottom left 1st) ||
|-
|-
| 3 || GND ||  
| 3 || GND || ||
|-
|-
| 4 ||  || Connected to JL Pin (Top left 1st)
| 4 ||  || Connected to JL Pin (Top left 1st) ||
|-
|-
| 5 || GND ||  
| 5 || GND || ||
|-
|-
| 6 || Jack Pin 4 || Connected to JL Pin (Bottom left 2nd)
| 6 || Jack Pin 4 || Connected to JL Pin (Bottom left 2nd) ||
|-
|-
| 7 || UART RX0 || Connected to JL Pin (Top left 2nd)
| 7 || UART RX0 || Connected to JL Pin (Top left 2nd) ||
|-
|-
| 8 ||  || Connected to JL Pin (Top left 3rd)
| 8 ||  || Connected to JL Pin (Top left 3rd) ||
|-
|-
| 9 || GND ||  
| 9 || GND || ||
|-
|-
| 10 || GND ||  
| 10 || GND || ||
|-
|-
| 11 ||  || Connected to CL Pin (Leftmost 1st)
| 11 ||  || Connected to CL Pin (Leftmost 1st) ||
|-
|-
| 12 ||  || Connected to CL Pin (Leftmost 2nd)
| 12 ||  || Connected to CL Pin (Leftmost 2nd) ||
|-
|-
| 13 || MOSI || Connected to JL Pin (Bottom left 3rd)
| 13 || MOSI || Connected to JL Pin (Bottom left 3rd) ||
|-
|-
| 14 || MISO || Connected to JL Pin (Bottom left 4th)
| 14 || MISO || Connected to JL Pin (Bottom left 4th) ||
|-
|-
| 15 || GND ||  
| 15 || GND || ||
|-
|-
| 16 || GND ||  
| 16 || GND || ||
|-
|-
| 17 ||  || Connected to CL Pin (Leftmost 3rd bottom)
| 17 ||  || Connected to CL Pin (Leftmost 3rd bottom) ||
|-
|-
| 18 ||  || Connected to CL Pin (Leftmost 4th top)
| 18 ||  || Connected to CL Pin (Leftmost 4th top) ||
|-
|-
| 19 || UART TX0 || Connected to JL Pin (Top left 4th)
| 19 || UART TX0 || Connected to JL Pin (Top left 4th) ||
|-
|-
| 20 || UART RTS0 || Connected to JL Pin (Bottom left 5th)
| 20 || UART RTS0 || Connected to JL Pin (Bottom left 5th) ||
|-
|-
| 21 || GND ||  
| 21 || GND || ||
|-
|-
| 22 || GND ||  
| 22 || GND || ||
|-
|-
| 23 || VDD ||  
| 23 || VDD || ||
|-
|-
| 24 || VDD ||  
| 24 || VDD || ||
|-
|-
|}
|}

Revision as of 03:54, 14 September 2022

JTAG/UART/SPI/Diagnostic I/O used in Sony repair centers if a PSVita couldn't be fixed by software.

Pictures

<imgur>cWujmwt.png</imgur> <imgur w="250">KUCQvJF.jpg</imgur>

Pinout

Pin Name Description Notes
1 GND
2 Connected to JL Pin (Bottom left 1st)
3 GND
4 Connected to JL Pin (Top left 1st)
5 GND
6 Jack Pin 4 Connected to JL Pin (Bottom left 2nd)
7 UART RX0 Connected to JL Pin (Top left 2nd)
8 Connected to JL Pin (Top left 3rd)
9 GND
10 GND
11 Connected to CL Pin (Leftmost 1st)
12 Connected to CL Pin (Leftmost 2nd)
13 MOSI Connected to JL Pin (Bottom left 3rd)
14 MISO Connected to JL Pin (Bottom left 4th)
15 GND
16 GND
17 Connected to CL Pin (Leftmost 3rd bottom)
18 Connected to CL Pin (Leftmost 4th top)
19 UART TX0 Connected to JL Pin (Top left 4th)
20 UART RTS0 Connected to JL Pin (Bottom left 5th)
21 GND
22 GND
23 VDD
24 VDD