Service Connectors: Difference between revisions
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| 7 || UARTx2 RX0 || Connected to JL Pin (Top left 2nd) | | 7 || UARTx2 RX0 || Connected to JL Pin (Top left 2nd) | ||
|- | |- | ||
| 8 || || Connected to JL Pin (Top left 3rd) | | 8 || || Connected to JL Pin (Top left 3rd), probably UARTz2 TX0 | ||
|- | |- | ||
| 9 || GND || | | 9 || GND || | ||
Revision as of 22:31, 23 October 2018
JTAG/UART/SPI/Diagnostic I/O used in Sony repair centers if a PSVita couldn't be fixed by software.
Pictures
<imgur>cWujmwt.png</imgur> <imgur w="250">KUCQvJF.jpg</imgur>
Pinout
| Pin | Name | Description |
|---|---|---|
| 1 | GND | |
| 2 | Connected to JL Pin (Bottom left 1st) | |
| 3 | GND | |
| 4 | Connected to JL Pin (Top left 1st) | |
| 5 | GND | |
| 6 | Jack Pin 4 | Connected to JL Pin (Bottom left 2nd) |
| 7 | UARTx2 RX0 | Connected to JL Pin (Top left 2nd) |
| 8 | Connected to JL Pin (Top left 3rd), probably UARTz2 TX0 | |
| 9 | GND | |
| 10 | GND | |
| 11 | Connected to CL Pin (Leftmost 1st) | |
| 12 | Connected to CL Pin (Leftmost 2nd) | |
| 13 | SPI UART0 TX | Connected to JL Pin (Bottom left 3rd) |
| 14 | SPI UART0 RX | Connected to JL Pin (Bottom left 4th) |
| 15 | GND | |
| 16 | GND | |
| 17 | Connected to CL Pin (Leftmost 3rd bottom) | |
| 18 | Connected to CL Pin (Leftmost 4th top) | |
| 19 | Connected to JL Pin (Top left 4th), probably UARTx2 CTS0 | |
| 20 | UARTx2 RTS0 | Connected to JL Pin (Bottom left 5th) |
| 21 | GND | |
| 22 | GND | |
| 23 | VDD | |
| 24 | VDD |