Media Engine
The Media Engine (or shortly ME) — is a second MIPS based CPU core, that was not directly accessible by licensed developers. Instead, Sony runs code on the ME to facilitate decoding audio and video assets, along with the help of more specialized hardware like the Virtual Mobile Engine and "AVC".
Overview
The ME runs at the same clock frequency as the main CPU core. It seems to have the same instruction set.
The ME has two co-processors:
- COP0: general system control
- COP1: 32-bit Floating Point Unit
It has three instructions the main CPU doesn't have (or used):
DBREAK(also present on other MIPS processors): used only once in the ME firmwareMTVMEMFVME
These two last instructions actually have the same opcodes as LDL and SDL, which this CPU doesn't have. The instructions are actually encoded like this:
ldl $reg, off($a3) <=> mfvme $reg, $off sdl $reg, off($a3) <=> mtvme $reg, $off
They might be used to store and retrieve information from and to the VME. They seem to be only used for video decoding.
Memory mapping
| Start | End | Size | Description |
|---|---|---|---|
| 0x00000000 | 0x001FFFFF | 0x00200000 (2MiB) | ME Memory |
| 0x04000000 | 0x041FFFFF | 0x00200000 (2MiB) | Graphics Engine VRAM |
| 0x040F8000 | 0x04100000 | 0x00008000 (32KiB) | VME Memory (Need confirmation, collide with GE mem) |
| 0x08000000 | 0x087FFFFF | 0x00800000 (8MiB) | Allegrex Kernel memory (RAM) (ME program is loaded at 0x8300000 - 0x837FFFF) |
| 0x08800000 | 0x09FFFFFF | 0x01800000 (24MiB) | Allegrex User memory (RAM) |
| 0x1C000000 | ? | ? | Hardware Registers |
| 0x1FC00000 | 0x1FDFFFFF | 0x00200000 | MIPS Reset Vector |