Virtual Mobile Engine: Difference between revisions
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(Created page with "The VME appears to be one half of Sony's "Virtual Mobile Engine Concept 2" where a CPU would take care of "lightweight control tasks" and reconfigurable hardware logic (the VME) would do all of the "heavy work in a power efficient manner". See Virtual Mobile Engine - LSI that "Changes its Spots". It might be something like a reconfigurable DSP; noone has been able to interpret its "firmware" yet. It can be accessed from the ME through the mfvme/mtvme instructions or th...") |
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It might be something like a reconfigurable DSP; noone has been able to interpret its "firmware" yet. | It might be something like a reconfigurable DSP; noone has been able to interpret its "firmware" yet. | ||
It can be accessed from the ME through the mfvme/mtvme instructions or through DMA with addresses from 0x440F8000 to 0x44100000 (excluded). | |||
===Features=== | |||
*Works as Dynamic Reconfigurable vector engine | |||
*Reconfigured on the fly | |||
*One cycle context switch | |||
*Coarse grain heterogeneous type | |||
*Native 24bit data-width | |||
*Max Clock Freq. 166MHz | |||
==Chip Layout== | ==Chip Layout== | ||
___________________128bit BUS_____________________ | ___________________128bit BUS_____________________ |
Latest revision as of 18:52, 26 March 2024
The VME appears to be one half of Sony's "Virtual Mobile Engine Concept 2" where a CPU would take care of "lightweight control tasks" and reconfigurable hardware logic (the VME) would do all of the "heavy work in a power efficient manner". See Virtual Mobile Engine - LSI that "Changes its Spots".
It might be something like a reconfigurable DSP; noone has been able to interpret its "firmware" yet. It can be accessed from the ME through the mfvme/mtvme instructions or through DMA with addresses from 0x440F8000 to 0x44100000 (excluded).
Features[edit | edit source]
- Works as Dynamic Reconfigurable vector engine
- Reconfigured on the fly
- One cycle context switch
- Coarse grain heterogeneous type
- Native 24bit data-width
- Max Clock Freq. 166MHz
Chip Layout[edit | edit source]
___________________128bit BUS_____________________ /\ || |------||----------------------------------------| | |----\/---| VME |---------------| | | | Bus | | | | | |Interface| | Local Memory | | | | |<--------------->| | | | | | |----/\------/\-| | | | DMAC | || || | | | | |---------| |----||---| || | | | | | |-->|Address | || | | | Control |-->| Context | |Generator| || | | |Registers| |Registers| |---------| || | | |---------| | | || | | | | |------------\/--| | | | |-->| | | | |---------| | Reconfigurable | | | | Datapath | | | |----------------| | |------------------------------------------------|