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[[File:PSP CXD2962GG.jpg|thumb|PSP CXD2962GG]]
[[File:PSP CXD2962GG.jpg|thumb|PSP CXD2962GG]]


<b>Tachyon</b> is the codename of the PSP main CPU SoC IC. It is a Sony custom-made LSI which holds the main CPU (Allegrex), the VFPU coprocessor, the Media Engine CPU and its embedded DRAM, the Graphics Engine, the AVC decoder, the Virtual Mobile Engine DSP, the [[Kirk]] and [[Spock]] crypto engines, and the 4KB embedded mask ROM which holds the [[iplloader]] and routines to boot into service mode.
<b>Tachyon</b> is the codename of the PSP main CPU SoC IC. It is a Sony custom-made LSI which holds the main CPU (Allegrex), the VFPU coprocessor, the Media Engine CPU and its embedded DRAM, the Graphics Engine, the AVC decoder, the Virtual Mobile Engine DSP, the [[Kirk]] and [[Spock]] crypto engines, and the 4KB embedded mask ROM which holds the [[PRE-IPL|iplloader]] and routines to boot into service mode.


Tachyon has one primary CPU core which is responsible for running the [[XMB]] and games, and a second CPU core (<i>[[Media Engine]]</i>) which implements the audio and video decoding functionality of the PSP.
Tachyon has one primary CPU core which is responsible for running the [[XMB]] and games, and a second CPU core (<i>[[Media Engine]]</i>) which implements the audio and video decoding functionality of the PSP.
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See [[Media Engine]].
See [[Media Engine]].
== Graphics Engine ==
: <i>See main article: <b>[[Graphics]]</b></i>


== Virtual Mobile Engine ==
== Virtual Mobile Engine ==


See [[Virtual Mobile Engine]].
The VME appears to be one half of Sony's "Virtual Mobile Engine Concept 2" where a CPU would take care of "lightweight control tasks" and reconfigurable hardware logic (the VME) would do all of the "heavy work in a power efficient manner". See [https://www.yumpu.com/en/document/read/10961029/virtual-mobile-enginetm-vme-sony Virtual Mobile Engine - LSI that "Changes its Spots"].


== Graphics Engine ==
It might be something like a reconfigurable DSP; noone has been able to interpret its "firmware" yet.


: <i>See main article: <b>[[Graphics]]</b></i>
It can be accessed from the ME through the mfvme/mtvme instructions or through DMA with addresses from 0x440F8000 to 0x44100000 (excluded).


== Memory mapping ==
== Memory mapping ==
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