Editing Tachyon

[[File:PSP CXD2962GG.jpg|thumb|PSP CXD2962GG]]

<b>Tachyon</b> is the codename of the PSP main CPU SoC IC. It is a Sony custom-made LSI which holds the main CPU (Allegrex), the VFPU coprocessor, the Media Engine CPU and its embedded DRAM, the Graphics Engine, the AVC decoder, the Virtual Mobile Engine DSP, the [[Kirk]] and [[Spock]] crypto engines, and the 4KB embedded mask ROM which holds the [[iplloader]] and routines to boot into service mode.

Tachyon has one primary CPU core which is responsible for running the [[XMB]] and games, and a second CPU core (<i>[[Media Engine]]</i>) which implements the audio and video decoding functionality of the PSP.

== Main Core "SC" ==

See [[Allegrex]].

== Media Engine ==

See [[Media Engine]].

== Graphics Engine ==

: <i>See main article: <b>[[Graphics]]</b></i>

== Virtual Mobile Engine ==

The VME appears to be one half of Sony's "Virtual Mobile Engine Concept 2" where a CPU would take care of "lightweight control tasks" and reconfigurable hardware logic (the VME) would do all of the "heavy work in a power efficient manner". See [https://www.yumpu.com/en/document/read/10961029/virtual-mobile-enginetm-vme-sony Virtual Mobile Engine - LSI that "Changes its Spots"].

It might be something like a reconfigurable DSP; noone has been able to interpret its "firmware" yet.

It can be accessed from the ME through the mfvme/mtvme instructions or through DMA with addresses from 0x440F8000 to 0x44100000 (excluded).

== Memory mapping ==

This memory mapping is shared by the SC, the GE & the ME, except the VRAM which is accessible only by the SC and the GE.

{| class="wikitable"
|-
! Start !! End !! Size !! Description
|-
| 0x00010000 || 0x00013FFF || 0x00004000 (<i>16KiB</i>) || Allegrex Scratchpad
|-
| 0x04000000 || 0x041FFFFF || 0x00200000 (<i>2MiB</i>)  || Graphics Engine VRAM
|-
| 0x08000000 || 0x087FFFFF || 0x00800000 (<i>8MiB</i>)  || Allegrex Kernel memory (RAM)
|-
| 0x08800000 || 0x09FFFFFF || 0x01800000 (<i>24MiB</i>) || Allegrex User memory (RAM)
|-
| 0x1C000000 || ?          || ?                         || Hardware registers
|-
| 0x1FC00000 || 0x1FDFFFFF || 0x00200000                || MIPS Reset Vector
|-
| 0x1FE00000 || ?          || ?                         || Hardware registers
|-
|}

See [[Hardware Registers]] for details about the hardware registers.

Access can be cached & privileged or not by changing the first 4 bits (<i>31-28 bits</i>) of the address using this virtual memory mapping:
{| class="wikitable"
|-
! Address !! Name !! Is it cached? !! Permission || Description
|-
| 0x<b>0</b>0000000 || KU0   || Cached   || User/Supervisor/Kernel || Main memory
|-
| 0x<b>4</b>0000000 || KU1   || Uncached || User/Supervisor/Kernel || Often used for VRAM
|-
| 0x<b>8</b>0000000 || K0    || Cached   || Kernel || Main kernel memory
|-
| 0x<b>A</b>0000000 || K1    || Uncached || Kernel || Mainly used for hardware registers
|-
| 0x<b>C</b>0000000 || K2/KS || Cached   || Supervisor/Kernel || Usage unknown/unconfirmed
|-
| 0x<b>E</b>0000000 || K3    || Cached   || Kernel || Usage unknown/unconfirmed
|-
|}

== PSP-1000 VFPU bug ==

PSP-1000 CPU has broken <code>ulv.q</code> instruction, that causes FPU registers corruption.

You can see more about it [https://sites.google.com/a/davidgf.es/davidgf-net/home/psp-dev/vfpu-test?tmpl=%2Fsystem%2Fapp%2Ftemplates%2Fprint%2F here].

== Versions == 

=== PSP-1000 ===

*CPU and DDR are discrete ICs on the motherboard
*32 MiB main memory (DDR)
*2 MiB Media Engine memory (eDRAM)

=== PSP-2000 and later ===

*DDR is brought into the CPU's package
*64 MiB main memory (DDR)
*4 MiB Media Engine memory (eDRAM)

== See also ==

* https://www.zdnet.com/article/sony-reveals-some-specs-for-psp-handheld/ (2004)

* https://www.extremetech.com/extreme/56942-sony-details-psp-chip-specs

* https://www.copetti.org/writings/consoles/playstation-portable/