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  bit:
  bit:
     0 = Used in GP0(E3-E4h) handler.
     0 = Used in GP0(E3-E4h) handler.
     1 = Related to Drawing Area right X2 coordinate (it seems to crop right side of drawing area by 1 pixel)
     1 = Related to Set Drawing Area bottom X2 coordinate (it seems to crop right side of drawing area by 1 pixels)
     2 = Used in GP0(A0h) handler.
     2 = Used in GP0(A0h) handler.
     3 = Force NTSC timings. While this setting should only affect PAL releases, sony for some reason used it also on 5 NTSC releases.
     3 = Used in vblank related function.
        FUTURE COP L.A.P.D, NUCLEAR SRTIKE, SOVIET STRIKE, VIB RIBBON and WING COMMANDER IV. This could be simply copy paste error from PAL releases (NUCLEAR STRIKE's config is copied over from SOVIET STRIKE). Use only in conjunction with command 0x0B, otherwise no image is displayed.
     4 = Used in gpu dma related function.
     4 = Used in gpu dma related function.
     5 = Used in GP0(2x-3xh) commands handler.
     5 = Used in GP0(2x-3xh) commands handler.
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     7 = Spu irq address (0x1F801DA4) related setting.
     7 = Spu irq address (0x1F801DA4) related setting.
     8 = Spu reverb related setting.
     8 = Spu reverb related setting.
     9 = Spu dma related setting. Return 1 instead of transferred size. Probably hack to make SPU DMA chunk transfer to always take 1 cycle.
     9 = Spu dma related setting.
   10 = Cdrom Play cmd related, active only when cdr mode REPORT bit is enabled.
   10 = Cdrom related, when enabled seems to update msf/lba more frequently.
   12 = While this bit is used in Timers event related function, it's really affecting SPU code. When bit is active SPU related internal counters are not updated.
   12 = Counters/timers related setting.
        Worth to add that mentioned SPU counters are also not updated if currently checked Timer counter is 0x4000 or lower at this point,
        but are updated for example on applying volume by cdr register write... Seems to be very specific hack.
   13 = Cdrom related setting. When enabled max_disc_lba_without_lead_out is used instead of second_track_lba in one function.
   13 = Cdrom related setting. When enabled max_disc_lba_without_lead_out is used instead of second_track_lba in one function.
        This config practically does what cdda enabler plugin did, same branch that is patched by cdda enabler is forced to be true here.
        Warning! This bit is patched to be ALWAYS ENABLED for custom eboots in Vita Adrenaline. This is bad idea and can affect compatibility.
   15 = Allows discs to be swapped when game didn't request to change ps1 gpu drawing parameters for long enough (60x this check).
   15 = Allows discs to be swapped when game didn't request to change ps1 gpu drawing parameters for long enough (60x this check).
   16 = Skip some additional checks for Pause/ReadS/ReadN/GetTN/Setmode cmds during cdrom command processing.
   16 = Skip some additional checks for Pause/ReadS/ReadN/GetTN/Setmode cmds during cdrom command processing.
   17 = Used in MDEC related functions.
   17 = Used in MDEC related functions.  
  18 = Load/Store opcodes related. When other conditions are met, skips some code.
  19 = Skip great chunk of code in Load/Store opcodes emitter, but only if rs is 29 (when load/store use stack pointer as base address).
   20 = Use second nBuf in sceCtrlPeekBufferNegative instead of first one and change controller sampling cycles from 0 to 8341 in sceCtrlSetSamplingCycle.
   20 = Use second nBuf in sceCtrlPeekBufferNegative instead of first one and change controller sampling cycles from 0 to 8341 in sceCtrlSetSamplingCycle.
   23 = Allows discs to be swapped at any time, regardless of game prompting to or not.
   23 = Allows discs to be swapped at any time, regardless of game prompting to or not.
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| 0x00 || Yes || Code analyzer flags, 16 bits usable, but only 6 bits seems to have any effect. Cfg 0x0C and 0x0D override this setting when used (only for selected pc). When set to 0xFFFFFFFF (default), value 3 (bit 0-1) is used.
| 0x00 || Yes || Code analyzer flags, 16 bits usable, but only 6 bits seems to have any effect. Cfg 0x0C and 0x0D override this setting when used (only for selected pc). When set to 0xFFFFFFFF (default), value 3 (bit 0-1) is used.
  bit:
  bit:
     0 = Force code cache clear in one of recompiler functions.
     0 = Force code cache clear in one of recompiler function.s
     1 = Skips check if opcode rd is $zero (seems to be related to branches/jumps).
     1 = Skips check if opcode rd is $zero (seems to be related to branches/jumps).
     2 = Analyze grater address range at once. PC + 0x2000, instead of default PC + 0xC00.
     2 = Analyze grater address range at once. PC + 0x2000, instead of default PC + 0xC00.
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| 0x01 || No || Set minimal "Y2" drawing area. This setting overrides what game set in GP0(E4h) command (Set Drawing Area bottom Y2 coordinate). Setting is used only when given value is lower than what game originally sends. In simple words, this work as a crop for the bottom of drawing area. ''Warning! This setting can have bad effect when copied straight from PAL to NTSC game and vice versa.''
| 0x01 || No || Set minimal "Y2" drawing area. This setting overrides what game set in GP0(E4h) command (Set Drawing Area bottom Y2 coordinate). Setting is used only when given value is lower than what game originally sends. In simple words, this work as a crop for the bottom of drawing area. ''Warning! This setting can have bad effect when copied straight from PAL to NTSC game and vice versa.''
|-
|-
| 0x02 || No || Set minimal "Y1" drawing area. Value is rows of pixels to crop from top of screen.
| 0x02 || Unk ||
|-
|-
| 0x03 || No || Crop MDEC video drawing only. Value is rows of pixels to crop from top of screen.
| 0x03 || Unk ||
|-
|-
| 0x04 || Yes || This config is multi-command for cdrom behavior. Value is bitfield, but not usual one. This config default value is 0xFFFFFFFF, to "enable" bits we need to really disable them. Windows programmer mode calculator in dword mode should shed some light here. To see enabled bits just use NOT operator. Vita use 3 additional (10/11/12) bits not available on PSP.
| 0x04 || Yes || This config is multi-command for cdrom behavior. Value is bitfield, but not usual one. This config default value is 0xFFFFFFFF, to "enable" bits we need to really disable them. Windows programmer mode calculator in dword mode should shed some light here. To see enabled bits just use NOT operator.
bit:
    0 = Used in function which perform seek to sector.
    1 = Used in function which perform seek to sector. When enabled fast seek takes 3 times more cycles, and slow seek takes 8 times more cycles.
    2 = Used in cdr Pause command. When enabled something takes 6 times more cycles than normally.
        Seems to be related to motor stop timing, maybe how long it takes on idle before motor is stopped?
    4 = Used in function which perform seek to sector. Seems to force seek time to take no longer than 1185408 cycles.
    5 = Used in function which perform seek to sector.
    6 = Used in Read commands. Enabled adds 5419008 cycles, but only if there is no pending setloc. 
    7 = Used in Setmode cdr command. When new bits of mode register request speed change and motor is on,
        unknown event (likely speed change) will take 10000 instead of 33868800 cycles.
    8 = Unknown, used in GetlocP cdr command.
vita only bits:
  10 = When reading cdr status register if BFRD bit of request register is active force DRQSTS bit in status register to 1.
        This can be easily replaced by patch to game code for PSP.
  11 = Weird hack for even weirder value. This bit force result of psp sceKernelGetSystemTimeLow to 0. This value is later used in few cdr commands.
        Hard to tell what purpose of that is, none of open-source emulators use something similar in their code.
  12 = On cdr Setfilter command force unknown value related to ADCPM to 1.
        This value is not bool itself but if not 0 ADPBUSY bit is set to 1 when reading cdr status register.
        Only game that can be potentially affected beside Parappa is "underwater music in R-Type Delta". 
|-
|-
| 0x05 || No || Value is PS1 cpu cycles that will be added to currently passed cycles, eventually triggering events test earlier. Config is used only on BLEZ/BGTZ/BEQ/BNE/B PS1 opcodes. Emulator adds 1 to this value before using it, so default 0xFFFFFFFF = 0.  
| 0x05 || No || Value is PS1 cpu cycles that will be added to currently passed cycles, eventually triggering events test earlier. Config is used only on BLEZ/BGTZ/BEQ/BNE/B PS1 opcodes. Emulator adds 1 to this value before using it, so default 0xFFFFFFFF = 0.  
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| 0x0A || No ||
| 0x0A || No ||
|-
|-
| 0x0B || No || 2x u16 value. Lower bits value is used as a Divider at some point, upper 16 bits (actually 15 bits, because value & 0x7FFF) is substrated from lower 16 bits and practically used only to trigger cfg as active if result is more than 0.
| 0x0B || No || Value is used as an Divider at some point, only u16 is used.
|-
|-
| 0x0C || No || Value is PS1 memory address. Set code analyzer memory range end address. This config has some restrictions and outcome depends on bit 2 of cfg 0x00. Pseudocode looks like this:
| 0x0C || No || Value is PS1 memory address. Set code analyzer memory range end address. This config has some restrictions and outcome depends on bit 2 of cfg 0x00. Pseudocode looks like this:
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| 0x13 || No || When value is 0 or higher, store it on addr. Only u8 seems to be used.
| 0x13 || No || When value is 0 or higher, store it on addr. Only u8 seems to be used.
|-
|-
| 0x14 || Partially || SPU emulation related command. Command use 2x u8 value.
| 0x14 || No || SPU emulation related command. Command use 2x u8 value.
  value1 = cmdValue & 0xFF        // Used only to compare for equality with some value at some point.
  value1 = cmdValue & 0xFF        // Used only to compare for equality with some value at some point.
  value2 = (cmdValue >> 8) & 0xFF // Used if compare mentioned above is true.
  value2 = (cmdValue >> 8) & 0xFF // Used if compare mentioned above is true.
If whole s16 cmd is higher than 0 different code path is used in SPU DMA handler.  
Additionally, if whole s16 cmd is higher than 0 different code path is used in SPU DMA handler.  
Additionally on Vita this command has "hidden" setting by bit 18. This setting is seeming to be not available on PSP
|-
|-
| 0x15 || No || Set shell open for little longer during disc swap. Some games take a while to realize that shell is opened, this setting helps them. Value is multiplier for predefined value, 1 is taking around 3,5 seconds, 2 around 7 seconds, etc.
| 0x15 || No || Cdrom related.
|-
|-
| 0x16 || No || When value is not less than 0, run some additional code related to vblank (seems to be scheduling some event).
| 0x16 || No || When value is not less than 0, run some additional code related to vblank (seems to be scheduling some event).
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| 0x1B || No || Initialize PSX scratchpad memory to given value + 1. Similar setting is found in ps1_netemu on PS3. Only one game seems to rely on it.
| 0x1B || No || Initialize PSX scratchpad memory to given value + 1. Similar setting is found in ps1_netemu on PS3. Only one game seems to rely on it.
|-
|-
| 0x1C || Unk || Vita only.
| 0x1C || Unk || Seems to be unused on PSP.
|-
|-
| 0x1D || Unk || Vita only. Drawing area related.
| 0x1D || Unk || Seems to be unused on PSP.
|-
|-
| 0x1E || Yes || Vita only. Multi command
| 0x1E || Unk || Seems to be unused on PSP.
bit:
    2 = SPU related
    3 = SPU related
    4 = SPU related
    5 = Enable to trigger additional checks for SPU status register, and eventually raise IRQ if needed.
    6 = SPU related
    7 = SPU related
    8 = Used in GPU GP0(2x-3xh and 6x-7xh) commands handler.
  10 = Different handling for JR/JALR opcodes
  11 = Used in GPU GP0(?) commands handler.
  12 = Used in GPU DMA related function.
  14 = Used in GPU GP0(6x-7xh) commands handler.
  29 = GPU related, used close to code which use command 0x01
  31 = Used in GPU GP0(E3h) command handler. Drawing Area top left X1 related.
        Very specific hack which check if Y drawing are starts at 0, and X at 0x401 (which is invalid value for this setting),
        and force X to 0x001 if conditions are met.
|-
|-
| 0x1F || Unk || Unused(?)
| 0x1F || Unk || Seems to be unused on PSP.
|-
|-
|}
|}
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|}
|}
Additionally, emulator adds "penalty" cycles for every opcode if currently executed memory is not PS1 main memory. 2 cycles are added to every opcode when emu is running PS1 ROM (0x1FC00000 - 0x1FC80000), and 5 cycles are added when emu is running PS1 Scratchpad (is that even possible?).
Additionally, emulator adds "penalty" cycles for every opcode if currently executed memory is not PS1 main memory. 2 cycles are added to every opcode when emu is running PS1 ROM (0x1FC00000 - 0x1FC80000), and 5 cycles are added when emu is running PS1 Scratchpad (is that even possible?).
==Version Differences==
Known version differences. Obviously, info here is missing many code changes. Only already known info is here.
===3.30===
*Fast GTE math using VFPU is no longer available for RTPT/RTPS/MVMVA (so it's also no longer default option for RTPS/RTPT). Now integer math is used instead.
*Config system changes, totally different -1 cmd. Options like accurate RTPS/RTPT and fast MVMVA no longer available.
===3.50===
*Disc IDs in configs list are now hashed with simple algo. There is no longer simple way to check which game use which compatibility settings.
===3.71===
*Changed compiler used for POPS, new type of relocations used (possibly affected all firmware files, not only pops).
*Added special config for PSRM Disc ID. This is not real PS1 ID, currently is unknown what can it be.
===3.80===
*All handwritten assembly or patched code is now placed before entry point (start) function in memory.
*SPU emulator moved to start of ELF file.
===3.95===
*While playing PSone games on your PSP, you can now customize how the buttons are assigned by going to [Controller Settings] > [Assign Buttons] and select [Custom].
===4.01===
*Changes to config system.
*New SPU emulator available. Now we have 2... Selectable thru cfg -01 bit 25.
===5.00===
*Removed additional SPU emulator and option to enable it thru cfg. Changes to SPU emulator itself, code looks much closer to what can be found in latest POPS.
===6.00===
*Screen mode "Custom" has been added in pops with PSOne Classics for perfect zooming.
*Added new separate pops_04g.prx file for 4th generation PSP (TA-093 board)
===6.10===
*Added new separate pops_05g.prx file for 5th generation PSP (TA-091/TA-094 board)
===6.35===
*Removed pops.prx completely, now every retail PSP motherboard version use separate pops_XXg.prx. Version available are:
**pops_01g.prx - used for TA-079, TA-081, TA-082, TA-086 boards.
**pops_02g.prx - used for TA-085, TA-088, TA-090v1 boards.
**pops_03g.prx - used for TA-090v2, TA-090v3, TA-092 boards.
**pops_04g.prx - used for TA-093 boards.
**pops_05g.prx - used for TA-091, TA-094 boards.
**pops_07g.prx - used for TA-095v3/TA-095v4 boards.
**pops_09g.prx - used for TA-095v1/TA-095v2 boards.
===6.50===
*Added pops_11g.prx used for TA-096, TA-097 boards.
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