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<b>COP1</b> is the nomenclature for PSP's CPU Floating Point Unit, or shortly FPU.
COP1 is the nomenclature for PSP's CPU Floating point unit (FPU).


== Specifications ==
PSP's COP1 can only operate with 32-bit single precision floating-point numbers, <b>it does not support 64-bit floating-point numbers</b>.


* It has 32 32-bit registers (<code>$f0</code>-<code>$f31</code>).
'''Specs'''
* It is IEEE 754 compliant.
  * 32-bit single precision
 
  * 32 32-bit registers
== Operations execution time ==
  * IEEE 754 compliant
{| class="wikitable"
  * Sqrt (28 cycles), div(28 cycles), most others 1 cycle
! Operation
! Time (in cycles)
|-
| <b>Square root</b> (sqrt)
| <b>28</b> cycles
|-
| <b>Division</b> (div)
| <b>28</b> cycles
|-
| <i>... (most others)</i>
| <b>1</b> cycle
|}
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