CXD90060GG: Difference between revisions
Jump to navigation
Jump to search
(Created pinout table and added first box of pins) |
m (→Pinout: Table no longer collapsed initially by request) |
||
Line 3: | Line 3: | ||
== Pinout == | == Pinout == | ||
Section currently WIP | Section currently WIP | ||
{| class="wikitable mw-collapsible | {| class="wikitable mw-collapsible" | ||
|+ | |+ | ||
!Pad | !Pad |
Revision as of 19:33, 11 December 2024
APU Chip RDNA2 2.23GHz
Pinout
Section currently WIP