Service Connectors: Difference between revisions

From PS5 Developer wiki
Jump to navigation Jump to search
No edit summary
 
(5 intermediate revisions by one other user not shown)
Line 29: Line 29:
! PIN # (24 PIN#) !! Meaning !! Notes
! PIN # (24 PIN#) !! Meaning !! Notes
|-
|-
| 1 || Ground || Ground Plane
| 1 || GND || Ground Plane
|-
|-
| 2(7) || Transmit EMC || Used to send commands to EMC. command always <com>:<chk>\r\n
| 2(7) || SSB_UART0_TX || SouthBridge UART0 Transmit. Used to send commands to EMC. command always <com>:<chk>\r\n
|-
|-
| 3(6) || Receive EMC || Used to recv responses from EMC. response always <res>:<chk>\r\n
| 3(6) || SSB_UART0_RX || SouthBridge UART0 Receive. Used to receive responses from EMC. response always <res>:<chk>\r\n
|-
|-
| 4(14) || titania uart1 tx || titania uart1 tx (bootrom: 460800, eap fw, apu: 230400)  
| 4(14) || FC_UART2_TX || Flash Controller UART2 Transmit. (bootrom: 460800, eap fw, apu: 230400)  
|-
|-
| 5(13) || titania uart1 rx || titania uart1 rx (bootrom: 460800, eap fw, apu: 230400)  
| 5(13) || FC_UART2_RX || Flash Controller UART2 Receive. (bootrom: 460800, eap fw, apu: 230400)  
|-
|-
|}
|}
Line 43: Line 43:
== 24 Pins ==
== 24 Pins ==


* Major credits to shuffle2 for the complete pinout
* Major credits to shuffle2 for the complete pinout.


{| class="wikitable sortable"
{| class="wikitable sortable"
Line 56: Line 56:
| 4 || GND || Ground Plane
| 4 || GND || Ground Plane
|-
|-
| 5 || emc gpio a1 || pulling low at emc boot causes emc rom to enter uart shell @ 460800
| 5 || SSB_BOOT_STRAP_1 || SouthBridge Boot Strap 1. pulling low at emc boot causes emc rom to enter uart shell @ 460800
|-
|-
| 6 || SSB_UART0_RX || Used to recv responses from EMC. response always <res>:<chk>\r\n (uart rx emc 115200)
| 6 || SSB_UART0_RX || SouthBridge UART0 Receive. Used to receive responses from EMC. response always <res>:<chk>\r\n (uart rx emc 115200)
|-
|-
| 7 || SSB_UART0_TX || Used to send commands to EMC. command always <com>:<chk>\r\n (uart tx emc 115200)
| 7 || SSB_UART0_TX || SouthBridge UART0 Transmit. Used to send commands to EMC. command always <com>:<chk>\r\n (uart tx emc 115200)
|-
|-
| 8 || 3v3 || goes low when emc resets
| 8 || 3v3 || goes low when [[EMC]] resets
|-
|-
| 9 || 0v || 0v
| 9 || 0v || 0v
Line 68: Line 68:
| 10 || GND || Ground Plane
| 10 || GND || Ground Plane
|-
|-
| 11 || titania uart0 tx || titania uart0 tx (efc fw: 460800)
| 11 || FC_UART1_TX || Flash Controller UART1 Transmit. (efc fw: 460800)
|-
|-
| 12 || titania uart0 rx || titania uart0 rx (efc fw: 460800)
| 12 || FC_UART1_RX || Flash Controller UART1 Receive. (efc fw: 460800)
|-
|-
| 13 || FC_UART2_RX || titania uart1 rx (bootrom: 460800, eap fw, apu: 230400)
| 13 || FC_UART2_RX || Flash Controller UART2 Receive. (bootrom: 460800, eap fw, apu: 230400)
|-
|-
| 14 || FC_UART2_TX || titania uart1 tx (bootrom: 460800, eap fw, apu: 230400)
| 14 || FC_UART2_TX || Flash Controller UART2 Transmit. (bootrom: 460800, eap fw, apu: 230400)
|-
|-
| 15 || GND || Ground Plane
| 15 || GND || Ground Plane
Line 84: Line 84:
| 18 || 5v || 5v
| 18 || 5v || 5v
|-
|-
| 19 || emc gpio a49 || emc gpio a49
| 19 || emc gpio a49 || [[EMC]] GPIO a49
|-
|-
| 20 || emc gpio a27 || emc gpio a27. main power switch
| 20 || emc gpio a27 || [[EMC]] GPIO a27. main power switch
|-
|-
| 21 || i2c data || i2c data (i2c_bus_4)
| 21 || i2c data || i2c data (i2c_bus_4)
|-
|-
| 22 || i2c clock || (i2c_bus_4)
| 22 || i2c clock || i2c clock (i2c_bus_4)
|-
|-
| 23 || GND || Ground Plane
| 23 || GND || Ground Plane
|-
|-
| 24  || /SSB_RESET || emc reset#
| 24  || /SSB_RESET || SouthBridge Reset. emc reset#
|}
|}

Latest revision as of 11:27, 9 December 2024

There are two Service Connectors on the PS5:

Pictures[edit | edit source]

First Connector (5 Pins)[edit | edit source]

I2NazzQ.png 5 Pin Service Layout Proto.jpg

Second Connector (24 Pins)[edit | edit source]

Qdw8Nxb.png 24 Pin Service Connector Proto.png Screenshot 2023-11-24 at 9.38.03 PM.png

Third Connector (24 Pins) (Bluray)[edit | edit source]

24 Pin Bluray Service Connector Proto.png

Meaning of Pins[edit | edit source]

  • Starts at Leftmost (Indicated by Arrow)

5 Pins[edit | edit source]

PIN # (24 PIN#) Meaning Notes
1 GND Ground Plane
2(7) SSB_UART0_TX SouthBridge UART0 Transmit. Used to send commands to EMC. command always <com>:<chk>\r\n
3(6) SSB_UART0_RX SouthBridge UART0 Receive. Used to receive responses from EMC. response always <res>:<chk>\r\n
4(14) FC_UART2_TX Flash Controller UART2 Transmit. (bootrom: 460800, eap fw, apu: 230400)
5(13) FC_UART2_RX Flash Controller UART2 Receive. (bootrom: 460800, eap fw, apu: 230400)

24 Pins[edit | edit source]

  • Major credits to shuffle2 for the complete pinout.
PIN # Meaning Notes
1 VDD 5v
2 VDD 5v
3 GND Ground Plane
4 GND Ground Plane
5 SSB_BOOT_STRAP_1 SouthBridge Boot Strap 1. pulling low at emc boot causes emc rom to enter uart shell @ 460800
6 SSB_UART0_RX SouthBridge UART0 Receive. Used to receive responses from EMC. response always <res>:<chk>\r\n (uart rx emc 115200)
7 SSB_UART0_TX SouthBridge UART0 Transmit. Used to send commands to EMC. command always <com>:<chk>\r\n (uart tx emc 115200)
8 3v3 goes low when EMC resets
9 0v 0v
10 GND Ground Plane
11 FC_UART1_TX Flash Controller UART1 Transmit. (efc fw: 460800)
12 FC_UART1_RX Flash Controller UART1 Receive. (efc fw: 460800)
13 FC_UART2_RX Flash Controller UART2 Receive. (bootrom: 460800, eap fw, apu: 230400)
14 FC_UART2_TX Flash Controller UART2 Transmit. (bootrom: 460800, eap fw, apu: 230400)
15 GND Ground Plane
16 emc gpio c5 ("GPI SW" (only used if devif_det# active))
17 0v 0v
18 5v 5v
19 emc gpio a49 EMC GPIO a49
20 emc gpio a27 EMC GPIO a27. main power switch
21 i2c data i2c data (i2c_bus_4)
22 i2c clock i2c clock (i2c_bus_4)
23 GND Ground Plane
24 /SSB_RESET SouthBridge Reset. emc reset#
Retrieved from "http://www.psdevwiki.com/ps5/index.php?title=Service_Connectors&oldid=3104"