Editing K4A4G085WF-BCTD

Jump to navigation Jump to search
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then publish the changes below to finish undoing the edit.

Latest revision Your text
Line 13: Line 13:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|A2
|A2
Line 19: Line 19:
|GND
|GND
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Ground
|Ground
|-
|-
|A3
|A3
Line 25: Line 25:
|
|
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|Termination Data Strobe
|
|-
|-
|A7
|A7
Line 31: Line 31:
|S50_FC_DDR_DM
|S50_FC_DDR_DM
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Input Data Mask and Data Bus Inversion
|
|-
|-
|A8
|A8
Line 37: Line 37:
|GND
|GND
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Ground
|Ground
|-
|-
|A9
|A9
Line 49: Line 49:
|2.5V_DDR4_VPP
|2.5V_DDR4_VPP
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DRAM Activation Power Supply: 2.5V (2.375V min , 2.75 max)
|
|-
|-
|B2
|B2
Line 55: Line 55:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|B3
|B3
Line 61: Line 61:
|D90_FC_DDR_DQS0_N
|D90_FC_DDR_DQS0_N
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Strobe
|
|-
|-
|B7
|B7
Line 67: Line 67:
|S50_FC_DDR_D0
|S50_FC_DDR_D0
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Input/ Output
|
|-
|-
|B8
|B8
Line 73: Line 73:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|B9
|B9
Line 79: Line 79:
|GND
|GND
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Reference Pin for ZQ calibration
|Ground
|-
|-
|C1
|C1
Line 85: Line 85:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|C2
|C2
Line 91: Line 91:
|S50_FC_DDR_D3
|S50_FC_DDR_D3
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Input/ Output
|
|-
|-
|C3
|C3
Line 97: Line 97:
|D90_FC_DDR_DQS0_P
|D90_FC_DDR_DQS0_P
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Strobe
|
|-
|-
|C7
|C7
Line 103: Line 103:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|C8
|C8
Line 115: Line 115:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|D1
|D1
Line 121: Line 121:
|GND
|GND
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Ground
|Ground
|-
|-
|D2
|D2
Line 127: Line 127:
|S50_FC_DDR_D4
|S50_FC_DDR_D4
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Input/ Output
|
|-
|-
|D3
|D3
Line 133: Line 133:
|S50_FC_DDR_D5
|S50_FC_DDR_D5
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Input/ Output
|
|-
|-
|D7
|D7
Line 139: Line 139:
|S50_FC_DDR_D2
|S50_FC_DDR_D2
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Input/ Output
|
|-
|-
|D8
|D8
Line 145: Line 145:
|S50_FC_DDR_D1
|S50_FC_DDR_D1
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Input/ Output
|
|-
|-
|D9
|D9
Line 151: Line 151:
|GND
|GND
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Ground
|Ground
|-
|-
|E1
|E1
Line 163: Line 163:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|E3
|E3
Line 169: Line 169:
|S50_FC_DDR_D6
|S50_FC_DDR_D6
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Input/ Output
|
|-
|-
|E7
|E7
Line 175: Line 175:
|S50_FC_DDR_D7
|S50_FC_DDR_D7
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|[[File:IC-Pin-Out.png|alt=Others|frameless]]
|Data Input/ Output
|
|-
|-
|E8
|E8
Line 181: Line 181:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DQ Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|E9
|E9
Line 193: Line 193:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|F2
|F2
Line 199: Line 199:
|
|
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|No Connect
|
|-
|-
|F3
|F3
Line 205: Line 205:
|S50_FC_DDR_ODT0
|S50_FC_DDR_ODT0
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|On Die Termination
|
|-
|-
|F7
|F7
Line 211: Line 211:
|D90_FC_DDR_CLOCK0_P
|D90_FC_DDR_CLOCK0_P
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Clock
|
|-
|-
|F8
|F8
Line 217: Line 217:
|D90_FC_DDR_CLOCK0_N
|D90_FC_DDR_CLOCK0_N
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Clock
|
|-
|-
|F9
|F9
Line 223: Line 223:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|G1
|G1
Line 235: Line 235:
|
|
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|No Connect
|
|-
|-
|G3
|G3
Line 241: Line 241:
|S50_FC_DDR_CKE0
|S50_FC_DDR_CKE0
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Clock Enable
|
|-
|-
|G7
|G7
Line 247: Line 247:
|S50_FC_DDR_CS0N
|S50_FC_DDR_CS0N
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Chip Select
|
|-
|-
|G8
|G8
Line 253: Line 253:
|
|
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|No Connect
|
|-
|-
|G9
|G9
|NC_G9
|NC_G9
|TEN
|GND
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Connectivity Test Mode Enable
|Ground
|-
|-
|H1
|H1
Line 265: Line 265:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|H2
|H2
Line 271: Line 271:
|S50_FC_DDR_WEN
|S50_FC_DDR_WEN
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Command Inputs
|
|-
|-
|H3
|H3
Line 277: Line 277:
|S50_FC_DDR_A14
|S50_FC_DDR_A14
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Activision Command Input
|
|-
|-
|H7
|H7
Line 283: Line 283:
|S50_/FC_DDR_CASN
|S50_/FC_DDR_CASN
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Command Inputs
|
|-
|-
|H8
|H8
Line 289: Line 289:
|S50_/FC_DDR_RASN
|S50_/FC_DDR_RASN
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Command Inputs
|
|-
|-
|H9
|H9
Line 301: Line 301:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Reference voltage for CA
|
|-
|-
|J2
|J2
Line 307: Line 307:
|S50_FC_DDR_BA2
|S50_FC_DDR_BA2
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Bank Group Inputs
|
|-
|-
|J3
|J3
Line 313: Line 313:
|S50_FC_DDR_A10
|S50_FC_DDR_A10
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Auto-precharge
|
|-
|-
|J7
|J7
Line 319: Line 319:
|S50_FC_DDR_A12
|S50_FC_DDR_A12
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Burst Chop
|
|-
|-
|J8
|J8
Line 325: Line 325:
|S50_FC_DDR_A15
|S50_FC_DDR_A15
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Bank Group Inputs
|
|-
|-
|J9
|J9
Line 331: Line 331:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|K1
|K1
Line 343: Line 343:
|S50_FC_DDR_BA0
|S50_FC_DDR_BA0
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Bank Address Inputs
|
|-
|-
|K3
|K3
Line 349: Line 349:
|S50_FC_DDR_A4
|S50_FC_DDR_A4
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|K7
|K7
Line 355: Line 355:
|S50_FC_DDR_A3
|S50_FC_DDR_A3
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|K8
|K8
Line 361: Line 361:
|S50_FC_DDR_BA1
|S50_FC_DDR_BA1
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Bank Address Inputs
|
|-
|-
|K9
|K9
Line 373: Line 373:
|S50_/FC_DDR_RSTN
|S50_/FC_DDR_RSTN
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Active Low Asynchronous Reset
|
|-
|-
|L2
|L2
Line 379: Line 379:
|S50_FC_DDR_A6
|S50_FC_DDR_A6
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|L3
|L3
Line 385: Line 385:
|S50_FC_DDR_A0
|S50_FC_DDR_A0
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|L7
|L7
Line 391: Line 391:
|S50_FC_DDR_A1
|S50_FC_DDR_A1
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|L8
|L8
Line 397: Line 397:
|S50_FC_DDR_A5
|S50_FC_DDR_A5
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|L9
|L9
Line 403: Line 403:
|S50_/FC_DDR_ALERTN
|S50_/FC_DDR_ALERTN
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Alert
|
|-
|-
|M1
|M1
Line 409: Line 409:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|M2
|M2
Line 415: Line 415:
|S50_FC_DDR_A8
|S50_FC_DDR_A8
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|M3
|M3
Line 421: Line 421:
|S50_FC_DDR_A2
|S50_FC_DDR_A2
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|M7
|M7
Line 427: Line 427:
|S50_FC_DDR_A9
|S50_FC_DDR_A9
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|M8
|M8
Line 433: Line 433:
|S50_FC_DDR_A7
|S50_FC_DDR_A7
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|M9
|M9
Line 439: Line 439:
|2.5V_DDR4_VPP
|2.5V_DDR4_VPP
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|DRAM Activation Power Supply: 2.5V (2.375V min , 2.75 max)
|
|-
|-
|N1
|N1
Line 451: Line 451:
|S50_FC_DDR_A11
|S50_FC_DDR_A11
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|N3
|N3
Line 457: Line 457:
|S50_FC_DDR_PAR
|S50_FC_DDR_PAR
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Command and Address Parity Input
|
|-
|-
|N7
|N7
Line 463: Line 463:
|
|
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|[[File:Pin-nc.png|alt=Not connected|frameless]]
|No Connect
|
|-
|-
|N8
|N8
Line 469: Line 469:
|S50_FC_DDR_A13
|S50_FC_DDR_A13
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Address Inputs
|
|-
|-
|N9
|N9
Line 475: Line 475:
|1.2V_FC_VDDQMIO
|1.2V_FC_VDDQMIO
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|[[File:IC-Pin-in.png|alt=Input|frameless]]
|Power Supply: 1.2 V +/- 0.06 V
|
|-
|-
|}
|}
Please note that all contributions to PS5 Developer wiki are considered to be released under the GNU Free Documentation License 1.2 (see PS5 Developer wiki:Copyrights for details). If you do not want your writing to be edited mercilessly and redistributed at will, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource. Do not submit copyrighted work without permission!

To protect the wiki against automated edit spam, we kindly ask you to solve the following hCaptcha:

Cancel Editing help (opens in new window)
Retrieved from "http://www.psdevwiki.com/ps5/K4A4G085WF-BCTD"