Editing CXD90061GG
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The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then publish the changes below to finish undoing the edit.
Latest revision | Your text | ||
Line 1: | Line 1: | ||
EMC/EAP Chip (with SysCon bundled?) | EMC/EAP Chip (with SysCon bundled?) | ||
* Credit to dan2wik for the third , fourth and fifth picture | * Credit to dan2wik for the third , fourth and fifth picture | ||
= Pictures = | |||
[[File:CXD90061GG.png]] | |||
[[File:CXD90061GG_Proto.png]] | |||
[[File:Image.png]] | |||
[[File:Image2.png]] | |||
[[File:Image3.png]] | |||
= Pinout = | = Pinout = | ||
* TODO | |||
{| class="wikitable sortable" | {| class="wikitable sortable" | ||
|+CXD90061GG Pin Out (WIP*) | |+CXD90061GG Pin Out (WIP*) | ||
Line 62: | Line 68: | ||
|1.15V_SS_PG3_SATA1 | |1.15V_SS_PG3_SATA1 | ||
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|- | |- | ||
|A10 | |A10 | ||
Line 74: | Line 80: | ||
|3.3V_SS_SATA_PG3 | |3.3V_SS_SATA_PG3 | ||
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|- | |- | ||
|A13 | |A13 | ||
Line 80: | Line 86: | ||
|D90_SSB_USB2_DPLS | |D90_SSB_USB2_DPLS | ||
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|- | |- | ||
|A15 | |A15 | ||
Line 86: | Line 92: | ||
|/FC_CLK_REQ_N | |/FC_CLK_REQ_N | ||
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|- | |- | ||
|A16 | |A16 | ||
Line 116: | Line 122: | ||
|3.3V_SS_PG1_XTAL | |3.3V_SS_PG1_XTAL | ||
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|B3 | |B3 | ||
Line 176: | Line 182: | ||
|D90_SSB_USB2_DMNS | |D90_SSB_USB2_DMNS | ||
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|B14 | |B14 | ||
Line 182: | Line 188: | ||
|N/C (?) | |N/C (?) | ||
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|B15 | |B15 | ||
Line 188: | Line 194: | ||
|/SSB_WIFI_CLKREQ | |/SSB_WIFI_CLKREQ | ||
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|B16 | |B16 | ||
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|SSB_GPI | |SSB_GPI | ||
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|B18 | |B18 | ||
Line 224: | Line 230: | ||
|1.8V_SS_PG1_CLK | |1.8V_SS_PG1_CLK | ||
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|C4 | |C4 | ||
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|Ground | |Ground | ||
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|test | |||
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|} | |} | ||