Editing PS2 Emulation

| --ee-jit-pagefault-threshold  || {{Exclusive}} || 0-254 || {{1 Byte}} ||Ignore JIT pagefaults, usually caused by data placed right after code. JIT try to recompile it, and obviously hit some bad opcodes. This command reduces the occurrence of crashes the higher it is. || --ee-jit-pagefault-threshold=40

| --ee-regalloc-scalar  || {{Universal}} || 0,none,ReadOnly,WriteOnly,RW || {{string}}|| Register allocation setting. Setting it to 0 may prevent crashes. ||  

| --ee-block-validation  || {{Universal}} || PageProt, PageProtection, Hash, Full, none || {{String}} || way of validating that block been modified, and require recompilation. [[https://github.com/PCSX2/pcsx2/blob/4db6b287cda817345f7ed4268a8a68f9fda76f26/pcsx2/Memory.cpp#L869| Some info about PageProt way]] || --ee-block-validation=None

| --ee-shorthash-len  || {{Exclusive}} || inst_count/integer || || Length of shorthash in instruction/opcode count. Require --ee-block-validation=Hash ||  

| --ee-const-folding  || {{Universal}} || None,Gpr,Fpu,All || {{String}} || EE constant folding. "All" seems to be the default option. || --ee-const-folding=none  

| --ee-ignore-segfault  || {{Exclusive}} || none, read, write, readwrite || {{String}} || Ignore segmentation fault. Ignore rw from/to unmapped memory, known in pcsx2 as TLB miss (load.store) || --ee-ignore-segfault=readwrite

| --ee-native-function  || {{Exclusive}} || memset, memcpy, strlen, strcmp, strcasecmp, litodp, dptoli, floatdidf, fptoui, fptodp, dptofp, fabs, fabsf, ieee754_atan2f, ieee754_asinf, ieee754_acosf, ieee754_sinf, ieee754_cosf, ieee754_sqrtf, asinf, acosf, sinf, cosf, sqrtf. || || Hook mips function with HLE x64 native version. Much faster, but tricky to keep correct timings on ps2 VM. || --ee-native-function=memcpy,0x11e328

| --ee-jit-disasm  || {{Universal}} || 0 or 1 for mips and 2 for x86 || {{Semi-Binary}} || Emotion engine Just in Time disassembler mode (Likely a debug log option) || --ee-jit-disasm=1

| --ee-ignore-break  || {{Exclusive}} || 0, 1 || {{Binary}}|| Turns a BREAK instruction into a NOP Instruction. ||  

| --ee-break-as-nop  || {{Exclusive}} || 0, 1 ||{{Binary}} || Turns a BREAK instruction into a NOP Instruction. || --ee-break-as-nop=1

| --ee-jit-opt-debug  || {{Exclusive}} || 0, 1 || {{Binary}}|| ||

| --ee-pc-coherency  || {{Universal}} || 0, 1 || {{Binary}}|| Flush PC register to memory on every mips opcode. Result in more accurate EE PC reg reads. ||  

| --ee-insn-flush-pc  || {{Exclusive}} || 0, 1 || {{Binary}}|| Flush PC register to memory on every mips opcode. Result in more accurate EE PC reg reads. ||

| --ee-inst-marking  || {{Universal}} || 0,1? || || ||

| --ee-insn-marking  || {{Exclusive}} || 0,1? || || ||

| --ee-kernel-hle  || {{Universal}} ||  0, 1 || {{Binary}}|| High-level emulation kernel. Apply HLE patches (used in mast1c0re part 2 Vulnerability 2). Apply EE kernel patches which run previously prepared x64 code instead of recompiling real code part. ||  

| --ee-injection-kernel  || {{Exclusive}} || 0, 1 || {{Binary}}|| Just like --ee-kernel-hle, except using a different name. ||

| --ee-injection-title  || {{Exclusive}} || 0, 1 || {{Binary}}|| Apply HLE patches (used in mast1c0re part 2 Vulnerability 2). Apply per title patches which run previously prepared x64 code instead of recompiling real code part. ||

| --ee-validate-kernel  || {{Universal}} || 0, 1 ||{{Binary}} || ||

| --ee-regalloc-simd  || {{Universal}} || readwrite, writeonly, readonly || {{String}} || register allocation setting ||  

| --ee-regalloc-preserve-scalar  || {{Universal}}||  LoadOnly, LO, StoreOnly, SO, LoadStore,  LS || {{String}} || EE JIT Scalar/Int Regalloc Mode || --ee-regalloc-preserve-scalar=LoadStore

| --ee-inline-limit-full  || {{Exclusive}} || Default = 48 || {{4 Bytes}}|| Unknown.||

| --ee-inline-limit-partial  || {{Exclusive}} || Default = 14 || {{4 Bytes}}|| Unknown.||

| --ee-stlf-cycle-threshold  || {{Exclusive}} || Default = 0<br> ||{{4 Bytes}} ||Unknown.||