Talk:Undocumented SPU Channels: Difference between revisions

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<code>uint8_t expectedConfigRing65[];
<pre>uint8_t expectedConfigRing65[];
uint8_t expectedConfigRing90[];
uint8_t expectedConfigRing90[];
    
    
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     }
     }
    
    
}</code>
}</pre>


== Channel 64 ==
== Channel 64 ==


Other values written to channel 64 (on bootldr): 0x00, 0x02, 0x20000
Other values written to channel 64 (on bootldr): 0x00, 0x02, 0x20000

Revision as of 22:24, 6 August 2012


Channel 67

Used to get the config ring.

Use is similar to channel 73.


uint8_t expectedConfigRing65[];
uint8_t expectedConfigRing90[];
   
function _start+1340() { //extracted from bootloader on 0x1A datecode console
   
    uint64_t vr = getSPU_VR(); //First active SPE priv1 SPU_VR register
    uint32_t toIgnore;
    uint32_t toRead;
    uint8_t expectedConfigRing;
    uint8_t readedConfigRing[];
    switch (vr) {
        case 0x201:
        case 0x202:
            //90nm console
            toIgnore = 0xA6;
            toRead = 0x156;
            expectedConfigRing = expectedConfigRing90;
            break;
        default:
            //65nm console
            toIgnore = 0xBB;
            toRead = 0x152;
            expectedConfigRing = expectedConfigRing90;
    }
    unsigned int index;
    for (index = 0; index < toIgnore>>3; index++) {
        rdch(67);
    }
    for (index = 0; index < toRead; index++) {
        readedConfigRing[index] = rdch(67) & 0xFF;
    }
    while (moreBitFieldsToCheck) {
        checkConfigRingField(expectedConfigRing, readedConfigRing, field, .....);
    }
   
}

Channel 64

Other values written to channel 64 (on bootldr): 0x00, 0x02, 0x20000