Template:Repository Node Table
Jump to navigation
Jump to search
| Name | Notes |
|---|---|
| be | Read the physical BE processor node id. |
| be.0 | Read the physical BE processor id. |
| be.0.bp | |
| be.0.bp_base | |
| be.0.clock | |
| be.0.fir.l2_em | |
| be.0.fir.l2_ee | |
| be.0.fir.biu_em | |
| be.0.fir.biu_ee | |
| be.0.fir.ciu_em | |
| be.0.fir.ciu_ee | |
| be.0.fir.ioc_em | |
| be.0.fir.ioc_ee | |
| be.0.fir.mic | |
| be.0.fir.mic_f0 | |
| be.0.fir.mic_f1 | |
| be.0.fir.ras_ee | |
| be.0.fir.spu0 | |
| be.0.fir.spu0_ee | |
| be.0.fir.spu0_em | |
| be.0.fir.spu1 | |
| be.0.fir.spu1_ee | |
| be.0.fir.spu1_em | |
| be.0.fir.spu2 | |
| be.0.fir.spu2_ee | |
| be.0.fir.spu2.em | |
| be.0.fir.spu3 | |
| be.0.fir.spu3_ee | |
| be.0.fir.spu3.em | |
| be.0.fir.spu4 | |
| be.0.fir.spu4_ee | |
| be.0.fir.spu4.em | |
| be.0.fir.spu5 | |
| be.0.fir.spu5_ee | |
| be.0.fir.spu5.em | |
| be.0.fir.spu6 | |
| be.0.fir.spu6_ee | |
| be.0.fir.spu6.em | |
| be.0.fir.spu7 | |
| be.0.fir.spu7_ee | |
| be.0.fir.spu7.em | |
| be.0.ioif0.addr | |
| be.0.ioif1.addr | |
| be.0.lpm.lpar | |
| be.0.lpm.priv | |
| be.0.nclk | |
| be.0.ref_clk | |
| be.0.spu.faultbm | |
| be.0.tb_clk | Timebase clock - Hardcoded to 0x4C1A6C0. |
| ben | Number of physical BE processors in the system. |
| bi.boot.paramete | |
| bi.boot_dat.address | |
| bi.boot_dat.info | |
| bi.boot_dat.size | |
| bi.pu | Read the logical PU id |
| bi.pu.1.mu | |
| bi.pu.1.rm_addr | Real mode memory base address. |
| bi.pu.1.rm_size | Real mode memory size. |
| bi.pun | Number of logical PU processors for this lpar |
| bi.rgnn | |
| bi.rgntotal | Read region total |
| bi.spun | Number of physical spus reserved |
| bi.spursvn | Number of spu resource reservations |
| bi.spursv.0 | spu resource reservation id value |
| bi.spursv.1 | |
| bi.spursv.2 | |
| bi.spursv.3 | |
| bi.spursv.4 | |
| bi.spursv.5 | |
| bi.spursv.6 | |
| bi.vir_uart.port.sysmgr | |
| bi.vir_uart.port.avset | |
| bus.0 | |
| bus.dev.0 | |
| bus.dev.blk_size | |
| bus.dev.id | |
| bus.dev.intr | |
| bus.dev.meddling | |
| bus.dev.n_blocks | |
| bus.dev.n_regs | |
| bus.dev.port | |
| bus.dev.reg.data | |
| bus.dev.reg.type | |
| bus.dev.region | |
| bus.dev.region.crypto | |
| bus.dev.region.id | |
| bus.dev.region.size | |
| bus.dev.region.start | |
| bus.dev.type | |
| bus.id | |
| bus.type | |
| bus.num_dev | |
| cp.channel.bitmap | |
| mu | |
| mu.1.size | |
| mun | |
| plat.id | Motherboard Revision |
| pme.memory.size | |
| ios.net.eurus.lpar | |
| lc.allow.large | |
| lv1.buildid | |
| lv1.heap.afill | |
| lv1.heap.rfill | |
| lv1.heap.check | |
| lv1.maxplgid | |
| lv1.ram.biu | |
| lv1.ram.biu_modesetup1 | |
| lv1.ram.biu_modesetup2 | |
| lv1.ram.enable | |
| lv1.ram.ioc | |
| lv1.ram.ioc_ioif0_quethshld | |
| lv1.ram.ioc_ioif1_quethshld | |
| lv1.ram.mic | |
| lv1.ram.mic_tm_threshold_0 | |
| lv1.ram.mic_tm_threshold_1 | |
| lv1.ram.ppe | |
| lv1.ram.spe | |
| lv1.ram.spe_ragid | |
| lv1.ram.tkm | |
| lv1.ram.tkm_cr | |
| lv1.ram.tkm_mbar | |
| lv1.ram.tkm_ioif0_ar | |
| lv1.ram.tkm_ioif1_ar | |
| lv1.ram.tkm_pr | |
| lv1.rsx.enable | |
| lv1.specver | |
| lv1.ts.size | |
| lv1.ts.start | |
| rsx.ioif0.bus | |
| rsx.rdcy.1 | |
| rsx.rdcy.2 | |
| rsx.rdcy.3 | |
| rsx.rdcy.4 | |
| rsx.rdcy.5 | |
| rsx.rdcy.6 | |
| rsx.rdcy.7 | |
| rsx.rdcy.8 | |
| spider.gbe0.macaddr.0 | GbLAN MAC Address 0 |
| spider.gbe0.macaddr.1 | GbLAN MAC Address 1 |
| spider.gbe0.macaddr.2 | GbLAN MAC Address 2 |
| spider.gbe0.macaddr.3 | GbLAN MAC Address 3 |
| ss.common.printf.enabled | |
| ss.laid | |
| ss.param.bank.#1.rvkpkg | |
| ss.param.bank.#1.os | |
| ss.param.debug.support | current debug flag (0x48C50) |
| ss.param.fself.control | current fself flag (0x48C06) |
| ss.param.hddcopy.mode | current hddcopy flag (0x48C42) |
| ss.param.product.mode | current product mode flag (0x48C07) |
| ss.param.qa.flag | current qa flag (0x48C0A) |
| ss.param.recover.mode | current recovery mode flag (0x48C61) |
| ss.param.update.status | current update status flag (0x48C60) |
| ss.ss_init.#10 | |
| sys.ac.sd | |
| sys.ac.misc | |
| sys.ac.misc2 | |
| sys.ac.product_code | |
| sys.ac.sd | |
| sys.be.0.spursvsl | |
| sys.be.0.ausrspun | |
| sys.be.0.asysspun | |
| sys.bootup.status | |
| sys.cellos.flags | |
| sys.cellos.spu.configure | |
| sys.dbgcard.dgbe | |
| sys.dbgcard.dgbe.index | |
| sys.debug.device | |
| sys.dgbe.gateway | |
| sys.dgbe.ipaddr | |
| sys.dgbe.netmask | |
| sys.flash.boot | |
| sys.flash.ext | |
| sys.flash.fmt | |
| sys.hvlog.size | |
| sys.hw.config | |
| sys.hw.config.version | |
| sys.hw.config_version | |
| sys.hw.model.emulate | |
| sys.hw.model_emulate | |
| sys.lc.polling.time | |
| sys.load.image.in_rom | |
| sys.lv0.version | |
| sys.lv0.revision | |
| sys.lv0.address | |
| sys.lv0.size | |
| sys.lv1.ahcr | |
| sys.lv1.be | |
| sys.lv1.be_ras | |
| sys.lv1.dump | |
| sys.lv1.dump_mmio | |
| sys.lv1.emuioif0irq | |
| sys.lv1.iofaultmsg | |
| sys.lv1.iosysenable | |
| sys.lv1.iosys.errorhandler | |
| sys.lv1.iosys.network | |
| sys.lv1.iosys.pci.d.thread | |
| sys.lv1.iosys.pci.retry | |
| sys.lv1.iosys.pciex | |
| sys.lv1.iosys.storage | |
| sys.lv1.iso_enbl | |
| sys.lv1.large | |
| sys.lv1.large_pciex | |
| sys.lv1.rsxenable | |
| sys.lv1.rsxdebug | |
| sys.lv1.rsxmemcheck | |
| sys.lv1console.mode | Set to 2 to output over southbridge TTY. |
| sys.lv1log.size | |
| sys.mambo.version | |
| sys.mmio.map | |
| sys.mmio.map_allow | |
| sys.param.load.rom1st | |
| sys.pci.share | |
| sys.platform.mode | |
| sys.qaf.qafen | |
| sys.rom.addr | |
| sys.sata.param | |
| sys.syscon.protocol | |
| sys.syscon.protocol_version | |
| sys.syscon.pversion | |
| sys.tmp_storage.size | |
| sys.wake_source | |
| sysmgr.boot.ps2.1st |